From 8c075fb4a3711edf275dea817aeaee0085e93e58 Mon Sep 17 00:00:00 2001 From: Yufeng Zhang Date: Wed, 2 Jan 2013 15:13:54 +0000 Subject: aarch64-cores.def: Add entries for "cortex-a53" and "cortex-a57". gcc/ 2013-01-02 Yufeng Zhang * config/aarch64/aarch64-cores.def: Add entries for "cortex-a53" and "cortex-a57". * config/aarch64/aarch64-tune.md: Re-generate. From-SVN: r194807 --- gcc/ChangeLog | 6 ++++++ gcc/config/aarch64/aarch64-cores.def | 2 ++ gcc/config/aarch64/aarch64-tune.md | 2 +- 3 files changed, 9 insertions(+), 1 deletion(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 10592b8..e8b7a34 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2013-01-02 Yufeng Zhang + + * config/aarch64/aarch64-cores.def: Add entries for "cortex-a53" and + "cortex-a57". + * config/aarch64/aarch64-tune.md: Re-generate. + 2013-01-02 Richard Biener * tree-vect-stmts.c (vectorizable_load): When vectorizing an diff --git a/gcc/config/aarch64/aarch64-cores.def b/gcc/config/aarch64/aarch64-cores.def index 06cc982..4b77009 100644 --- a/gcc/config/aarch64/aarch64-cores.def +++ b/gcc/config/aarch64/aarch64-cores.def @@ -34,5 +34,7 @@ This list currently contains example CPUs that implement AArch64, and therefore serves as a template for adding more CPUs in the future. */ +AARCH64_CORE("cortex-a53", cortexa53, 8, AARCH64_FL_FPSIMD, generic) +AARCH64_CORE("cortex-a57", cortexa57, 8, AARCH64_FL_FPSIMD, generic) AARCH64_CORE("example-1", large, 8, AARCH64_FL_FPSIMD, generic) AARCH64_CORE("example-2", small, 8, AARCH64_FL_FPSIMD, generic) diff --git a/gcc/config/aarch64/aarch64-tune.md b/gcc/config/aarch64/aarch64-tune.md index a654a91..02699e3 100644 --- a/gcc/config/aarch64/aarch64-tune.md +++ b/gcc/config/aarch64/aarch64-tune.md @@ -1,5 +1,5 @@ ;; -*- buffer-read-only: t -*- ;; Generated automatically by gentune.sh from aarch64-cores.def (define_attr "tune" - "large,small" + "cortexa53,cortexa57,large,small" (const (symbol_ref "((enum attr_tune) aarch64_tune)"))) -- cgit v1.1