From 83c3a2d826778223e827ab541ada1c3ffde04034 Mon Sep 17 00:00:00 2001
From: Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
Date: Wed, 23 Dec 2009 16:36:40 +0000
Subject: re PR target/42093 (Compressed switch tables for Thumb2 have signed
 offsets)

Fix PR target/42093


2009-12-23  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

        PR target/42093
        * config/arm/arm.h (CASE_VECTOR_PC_RELATIVE): Fix macro usage
        to TARGET_THUMB1.
        (CASE_VECTOR_SHORTEN_MODE): Allow signed offsets
        only for TARGET_THUMB1.

2009-12-23  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>

        PR target/42093
        * gcc.target/arm/pr42093.c: New test.

From-SVN: r155428
---
 gcc/ChangeLog                          |  8 ++++++
 gcc/config/arm/arm.h                   |  4 +--
 gcc/testsuite/ChangeLog                |  5 ++++
 gcc/testsuite/gcc.target/arm/pr42093.c | 51 ++++++++++++++++++++++++++++++++++
 4 files changed, 66 insertions(+), 2 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/arm/pr42093.c

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index c22b10f..be26088 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,11 @@
+2009-12-23  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
+
+        PR target/42093
+        * config/arm/arm.h (CASE_VECTOR_PC_RELATIVE): Fix macro usage
+        to TARGET_THUMB1.
+        (CASE_VECTOR_SHORTEN_MODE): Allow signed offsets
+        only for TARGET_THUMB1.
+
 2009-12-23  Ramana Radhakrishnan  <ramrad01@arm.com>
 
 	PR target/40670
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 691a860..26ffaf8 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -2118,11 +2118,11 @@ typedef struct
 #define CASE_VECTOR_MODE Pmode
 
 #define CASE_VECTOR_PC_RELATIVE (TARGET_THUMB2				\
-				 || (TARGET_THUMB			\
+				 || (TARGET_THUMB1			\
 				     && (optimize_size || flag_pic)))
 
 #define CASE_VECTOR_SHORTEN_MODE(min, max, body)			\
-  (TARGET_THUMB								\
+  (TARGET_THUMB1							\
    ? (min >= 0 && max < 512						\
       ? (ADDR_DIFF_VEC_FLAGS (body).offset_unsigned = 1, QImode)	\
       : min >= -256 && max < 256					\
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index b571757..da6d3b1 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,8 @@
+2009-12-23  Ramana Radhakrishnan  <ramana.radhakrishnan@arm.com>
+
+        PR target/42093
+        * gcc.target/arm/pr42093.c: New test.
+
 2009-12-23  Ramana Radhakrishnan  <ramrad01@arm.com>
 
 	PR target/40670
diff --git a/gcc/testsuite/gcc.target/arm/pr42093.c b/gcc/testsuite/gcc.target/arm/pr42093.c
new file mode 100644
index 0000000..5d43982
--- /dev/null
+++ b/gcc/testsuite/gcc.target/arm/pr42093.c
@@ -0,0 +1,51 @@
+/* { dg-options "-mthumb -O2" }  */
+/* { dg-require-effective-target arm_thumb2_ok } */
+/* { dg-final { scan-assembler-not "tbb" } } */
+/* { dg-final { scan-assembler-not "tbh" } } */
+
+#include <stdlib.h>
+
+int gbl;
+int foo (int *buf, int n)
+{
+  int ctr = 0;
+  int c;
+  while (1)
+    {
+      c = buf[ctr++];
+      switch (c)
+        {
+        case '\n':
+          gbl++;
+          break;
+
+        case ' ': case '\t' : case '\f' : case '\r':
+          break;
+
+        case ';':
+          do
+            c = buf [ctr++];
+          while (c != '\n' && c != -1);
+          gbl++;
+          break;
+
+        case '/':
+          {
+            int prevc;
+            c = buf [ctr++];
+            if (c != '*')
+              abort ();
+
+            prevc = 0;
+            while ((c = buf[ctr++]) && c != -1)
+              {
+                if (c == '\n')
+                  gbl++;
+              }
+            break;
+          }
+        default:
+          return c;
+        }
+    }
+}
-- 
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