From 6288c6af4b071233a4d9c84012e2f4ac4ac3f918 Mon Sep 17 00:00:00 2001
From: Andrew Stubbs <ams@codesourcery.com>
Date: Mon, 3 Apr 2023 12:16:11 +0100
Subject: amdgcn: Add 64-bit vector not

gcc/ChangeLog:

	* config/gcn/gcn-valu.md (one_cmpl<mode>2<exec>): New.
---
 gcc/ChangeLog.omp          |  4 ++++
 gcc/config/gcn/gcn-valu.md | 17 +++++++++++++++++
 2 files changed, 21 insertions(+)

diff --git a/gcc/ChangeLog.omp b/gcc/ChangeLog.omp
index d8aa0ab..9b57f00 100644
--- a/gcc/ChangeLog.omp
+++ b/gcc/ChangeLog.omp
@@ -1,3 +1,7 @@
+2023-04-03  Andrew Stubbs  <ams@codesourcery.com>
+
+	* config/gcn/gcn-valu.md (one_cmpl<mode>2<exec>): New.
+
 2023-04-03  Thomas Schwinge  <thomas@codesourcery.com>
 
 	* doc/invoke.texi (-foffload-memory=pinned): Document.
diff --git a/gcc/config/gcn/gcn-valu.md b/gcc/config/gcn/gcn-valu.md
index 44d1071..c0b43fc 100644
--- a/gcc/config/gcn/gcn-valu.md
+++ b/gcc/config/gcn/gcn-valu.md
@@ -2791,6 +2791,23 @@
     DONE;
   })
 
+(define_insn_and_split "one_cmpl<mode>2<exec>"
+  [(set (match_operand:V_DI 0 "register_operand"  "=   v")
+        (not:V_DI
+          (match_operand:V_DI 1 "gcn_alu_operand" "vSvDB")))]
+  ""
+  "#"
+  "reload_completed"
+  [(set (match_dup 3) (not:<VnSI> (match_dup 5)))
+   (set (match_dup 4) (not:<VnSI> (match_dup 6)))]
+  {
+    operands[3] = gcn_operand_part (<VnDI>mode, operands[0], 0);
+    operands[4] = gcn_operand_part (<VnDI>mode, operands[0], 1);
+    operands[5] = gcn_operand_part (<VnDI>mode, operands[1], 0);
+    operands[6] = gcn_operand_part (<VnDI>mode, operands[1], 1);
+  }
+  [(set_attr "type" "mult")])
+
 ;; }}}
 ;; {{{ FP binops - special cases
 
-- 
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