From 575d952c5d634cc02760c73f94b8769cbb09f1b3 Mon Sep 17 00:00:00 2001 From: Alexander Ivchenko Date: Fri, 12 Sep 2014 07:36:59 +0000 Subject: AVX-512. Extend max/min insn patterns. gcc/ * config/i386/sse.md (VI128_256): Delete. (define_mode_iterator VI124_256): New. (define_mode_iterator VI124_256_AVX512F_AVX512BW): Ditto. (define_expand "3"): Delete. (define_expand "3"): New. (define_insn "*avx2_3"): Rename from "*avx2_3" and update mode iterator. (define_expand "3_mask"): New. (define_insn "*avx512bw_3"): Ditto. (define_insn "3"): Update mode iterator. (define_expand "3"): Update pettern generation in presence of AVX-512. Co-Authored-By: Andrey Turetskiy Co-Authored-By: Anna Tikhonova Co-Authored-By: Ilya Tocar Co-Authored-By: Ilya Verbin Co-Authored-By: Kirill Yukhin Co-Authored-By: Maxim Kuznetsov Co-Authored-By: Michael Zolotukhin From-SVN: r215202 --- gcc/ChangeLog | 23 +++++++++ gcc/config/i386/sse.md | 130 ++++++++++++++++++++++++++++++------------------- 2 files changed, 103 insertions(+), 50 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4c9a370..d6cdc26 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -7,6 +7,29 @@ Kirill Yukhin Michael Zolotukhin + * config/i386/sse.md (VI128_256): Delete. + (define_mode_iterator VI124_256): New. + (define_mode_iterator VI124_256_AVX512F_AVX512BW): Ditto. + (define_expand "3"): Delete. + (define_expand "3"): New. + (define_insn "*avx2_3"): Rename from + "*avx2_3" and update mode iterator. + (define_expand "3_mask"): New. + (define_insn "*avx512bw_3"): Ditto. + (define_insn "3"): Update mode + iterator. + (define_expand "3"): Update pettern generation + in presence of AVX-512. + +2014-09-12 Alexander Ivchenko + Maxim Kuznetsov + Anna Tikhonova + Ilya Tocar + Andrey Turetskiy + Ilya Verbin + Kirill Yukhin + Michael Zolotukhin + * config/i386/sse.md (define_expand "_gathersi"): Rename from "avx512f_gathersi". diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 40b8f83..92f94b9 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -290,9 +290,6 @@ (define_mode_iterator VI8_256_512 [V8DI (V4DI "TARGET_AVX512VL")]) -(define_mode_iterator VI128_256 - [V4DI V2DI V4SI (V16QI "TARGET_AVX512BW") (V8HI "TARGET_AVX512BW")]) - (define_mode_iterator VI1_AVX2 [(V32QI "TARGET_AVX2") V16QI]) @@ -499,8 +496,12 @@ (define_mode_iterator VI48_128 [V4SI V2DI]) ;; Various 256bit and 512 vector integer mode combinations -(define_mode_iterator VI124_256_48_512 - [V32QI V16HI V8SI (V8DI "TARGET_AVX512F") (V16SI "TARGET_AVX512F")]) +(define_mode_iterator VI124_256 [V32QI V16HI V8SI]) +(define_mode_iterator VI124_256_AVX512F_AVX512BW + [V32QI V16HI V8SI + (V64QI "TARGET_AVX512BW") + (V32HI "TARGET_AVX512BW") + (V16SI "TARGET_AVX512F")]) (define_mode_iterator VI48_256 [V8SI V4DI]) (define_mode_iterator VI48_512 [V16SI V8DI]) (define_mode_iterator VI4_256_8_512 [V8SI V8DI]) @@ -9449,71 +9450,100 @@ [(set_attr "prefix" "evex") (set_attr "mode" "")]) -(define_expand "3" - [(set (match_operand:VI124_256_48_512 0 "register_operand") - (maxmin:VI124_256_48_512 - (match_operand:VI124_256_48_512 1 "") - (match_operand:VI124_256_48_512 2 "")))] - "TARGET_AVX2 && && " +(define_expand "3" + [(set (match_operand:VI124_256_AVX512F_AVX512BW 0 "register_operand") + (maxmin:VI124_256_AVX512F_AVX512BW + (match_operand:VI124_256_AVX512F_AVX512BW 1 "nonimmediate_operand") + (match_operand:VI124_256_AVX512F_AVX512BW 2 "nonimmediate_operand")))] + "TARGET_AVX2" "ix86_fixup_binary_operands_no_copy (, mode, operands);") -(define_insn "*avx2_3" - [(set (match_operand:VI124_256_48_512 0 "register_operand" "=v") - (maxmin:VI124_256_48_512 - (match_operand:VI124_256_48_512 1 "" "%v") - (match_operand:VI124_256_48_512 2 "" "")))] - "TARGET_AVX2 && ix86_binary_operator_ok (, mode, operands) - && && " - "vp\t{%2, %1, %0|%0, %1, %2}" +(define_insn "*avx2_3" + [(set (match_operand:VI124_256 0 "register_operand" "=v") + (maxmin:VI124_256 + (match_operand:VI124_256 1 "nonimmediate_operand" "%v") + (match_operand:VI124_256 2 "nonimmediate_operand" "vm")))] + "TARGET_AVX2 && ix86_binary_operator_ok (, mode, operands)" + "vp\t{%2, %1, %0|%0, %1, %2}" [(set_attr "type" "sseiadd") (set_attr "prefix_extra" "1") - (set_attr "prefix" "maybe_evex") + (set_attr "prefix" "vex") (set_attr "mode" "OI")]) +(define_expand "3_mask" + [(set (match_operand:VI48_AVX512VL 0 "register_operand") + (vec_merge:VI48_AVX512VL + (maxmin:VI48_AVX512VL + (match_operand:VI48_AVX512VL 1 "nonimmediate_operand") + (match_operand:VI48_AVX512VL 2 "nonimmediate_operand")) + (match_operand:VI48_AVX512VL 3 "vector_move_operand") + (match_operand: 4 "register_operand")))] + "TARGET_AVX512F" + "ix86_fixup_binary_operands_no_copy (, mode, operands);") + +(define_insn "*avx512bw_3" + [(set (match_operand:VI48_AVX512VL 0 "register_operand" "=v") + (maxmin:VI48_AVX512VL + (match_operand:VI48_AVX512VL 1 "nonimmediate_operand" "%v") + (match_operand:VI48_AVX512VL 2 "nonimmediate_operand" "vm")))] + "TARGET_AVX512F && ix86_binary_operator_ok (, mode, operands)" + "vp\t{%2, %1, %0|%0, %1, %2}" + [(set_attr "type" "sseiadd") + (set_attr "prefix_extra" "1") + (set_attr "prefix" "maybe_evex") + (set_attr "mode" "")]) + (define_insn "3" - [(set (match_operand:VI128_256 0 "register_operand" "=v") - (maxmin:VI128_256 - (match_operand:VI128_256 1 "register_operand" "v") - (match_operand:VI128_256 2 "nonimmediate_operand" "vm")))] - "TARGET_AVX512VL" + [(set (match_operand:VI12_AVX512VL 0 "register_operand" "=v") + (maxmin:VI12_AVX512VL + (match_operand:VI12_AVX512VL 1 "register_operand" "v") + (match_operand:VI12_AVX512VL 2 "nonimmediate_operand" "vm")))] + "TARGET_AVX512BW" "vp\t{%2, %1, %0|%0, %1, %2}" [(set_attr "type" "sseiadd") (set_attr "prefix" "evex") (set_attr "mode" "")]) (define_expand "3" - [(set (match_operand:VI8_AVX2 0 "register_operand") - (maxmin:VI8_AVX2 - (match_operand:VI8_AVX2 1 "register_operand") - (match_operand:VI8_AVX2 2 "register_operand")))] + [(set (match_operand:VI8_AVX2_AVX512BW 0 "register_operand") + (maxmin:VI8_AVX2_AVX512BW + (match_operand:VI8_AVX2_AVX512BW 1 "register_operand") + (match_operand:VI8_AVX2_AVX512BW 2 "register_operand")))] "TARGET_SSE4_2" { - enum rtx_code code; - rtx xops[6]; - bool ok; + if (TARGET_AVX512F + && (mode == V8DImode || TARGET_AVX512VL)) + ix86_fixup_binary_operands_no_copy (, mode, operands); + else + { + enum rtx_code code; + rtx xops[6]; + bool ok; - xops[0] = operands[0]; - if ( == SMAX || == UMAX) - { - xops[1] = operands[1]; - xops[2] = operands[2]; - } - else - { - xops[1] = operands[2]; - xops[2] = operands[1]; - } + xops[0] = operands[0]; + + if ( == SMAX || == UMAX) + { + xops[1] = operands[1]; + xops[2] = operands[2]; + } + else + { + xops[1] = operands[2]; + xops[2] = operands[1]; + } - code = ( == UMAX || == UMIN) ? GTU : GT; + code = ( == UMAX || == UMIN) ? GTU : GT; - xops[3] = gen_rtx_fmt_ee (code, VOIDmode, operands[1], operands[2]); - xops[4] = operands[1]; - xops[5] = operands[2]; + xops[3] = gen_rtx_fmt_ee (code, VOIDmode, operands[1], operands[2]); + xops[4] = operands[1]; + xops[5] = operands[2]; - ok = ix86_expand_int_vcond (xops); - gcc_assert (ok); - DONE; + ok = ix86_expand_int_vcond (xops); + gcc_assert (ok); + DONE; + } }) (define_expand "3" -- cgit v1.1