From 1bb3e2c0ce6ed363c72caf814a6ba6d7b17c3e0a Mon Sep 17 00:00:00 2001 From: Jakub Jelinek Date: Thu, 29 Apr 2021 11:34:50 +0200 Subject: aarch64: Fix ICE in aarch64_add_offset_1_temporaries [PR100302] In PR94121 I've changed aarch64_add_offset_1 to use absu_hwi instead of abs_hwi because offset can be HOST_WIDE_INT_MIN. As can be seen with the testcase below, aarch64_add_offset_1_temporaries suffers from the same problem and should be in sync with aarch64_add_offset_1, i.e. for HOST_WIDE_INT_MIN it needs a temporary. 2021-04-29 Jakub Jelinek PR target/100302 * config/aarch64/aarch64.c (aarch64_add_offset_1_temporaries): Use absu_hwi instead of abs_hwi. * gcc.target/aarch64/sve/pr100302.c: New test. --- gcc/config/aarch64/aarch64.c | 2 +- gcc/testsuite/gcc.target/aarch64/sve/pr100302.c | 12 ++++++++++++ 2 files changed, 13 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/sve/pr100302.c diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index a863af1..c2f4b27 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -4736,7 +4736,7 @@ aarch64_mov128_immediate (rtx imm) static unsigned int aarch64_add_offset_1_temporaries (HOST_WIDE_INT offset) { - return abs_hwi (offset) < 0x1000000 ? 0 : 1; + return absu_hwi (offset) < 0x1000000 ? 0 : 1; } /* A subroutine of aarch64_add_offset. Set DEST to SRC + OFFSET for diff --git a/gcc/testsuite/gcc.target/aarch64/sve/pr100302.c b/gcc/testsuite/gcc.target/aarch64/sve/pr100302.c new file mode 100644 index 0000000..de6e8f2 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/sve/pr100302.c @@ -0,0 +1,12 @@ +/* PR target/100302 */ +/* { dg-do compile } */ +/* { dg-options "-march=armv8.2-a+sve -O1 -ftree-loop-vectorize -fno-tree-scev-cprop --param vect-partial-vector-usage=0 -fvect-cost-model=unlimited" } */ + +long int x; + +void +foo (void) +{ + for (x = 0; x >= 0; ++x) + ; +} -- cgit v1.1