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2021-05-14Update ChangeLog and version files for releasereleases/gcc-8.5.0releases/gcc-8Jakub Jelinek2-0/+8
2021-04-27Daily bump.GCC Administrator1-0/+11
2021-04-26[PATCH] Backport fix for PR target/989r2Michael Meissner1-4/+2
The test in the PowerPC 32-bit trampoline support is backwards. It aborts if the trampoline size is greater than the expected size. It should abort when the trampoline size is less than the expected size. I fixed the test so the operands are reversed. I then folded the load immediate into the compare instruction. I verified this by creating a 32-bit trampoline program and manually changing the size of the trampoline to be 48 instead of 40. The program aborted with the larger size. I updated this code and ran the test again and it passed. I added a test case that runs on PowerPC 32-bit Linux systems and it calls the __trampoline_setup function with a larger buffer size than the compiler uses. The test is not run on 64-bit systems, since the function __trampoline_setup is not called. I also limited the test to just Linux systems, in case trampolines are handled differently in other systems. libgcc/ 2021-04-26 Michael Meissner <meissner@linux.ibm.com> PR target/98952 * config/rs6000/tramp.S (__trampoline_setup, elfv1 #ifdef): Fix trampoline size comparison in 32-bit by reversing test and combining load immediate with compare. Fix backported from trunk change on 4/23, 886b6c1e8af502b69e3f318b9830b73b88215878. (__trampoline_setup, elfv2 #ifdef): Fix trampoline size comparison in 32-bit by reversing test and combining load immediate with compare. gcc/testsuite/ 2021-04-26 Michael Meissner <meissner@linux.ibm.com> PR target/98952 * gcc.target/powerpc/pr98952.c: New test. Test backported from trunk change on 4/23, 886b6c1e8af502b69e3f318b9830b73b88215878.
2021-01-14Daily bump.GCC Administrator1-0/+10
2021-01-13hurd: libgcc unwinding over signal trampolines with SIGINFOSamuel Thibault1-13/+47
When the application sets SA_SIGINFO, the signal trampoline parameters are different to follow POSIX. libgcc/ * config/i386/gnu-unwind.h (x86_gnu_fallback_frame_state): Add the posix siginfo case to struct handler_args. Detect between legacy and siginfo from the second parameter, which is a small sigcode in the legacy case, and a pointer in the siginfo case. (cherry picked from commit 2b356e689c334ca4765a9ffd95a76cf715447200)
2020-11-26Daily bump.GCC Administrator1-0/+16
2020-11-25libgcc: fix the handling of return address mangling [PR94891]Szabolcs Nagy2-53/+16
Mangling, currently only used on AArch64 for return address signing, is an internal representation that should not be exposed via __builtin_return_address return value, __builtin_eh_return handler argument, _Unwind_DebugHook handler argument. Note that a mangled address might not even fit into a void *, e.g. with AArch64 ilp32 ABI the return address is stored as 64bit, so the mangled return address cannot be accessed via _Unwind_GetPtr. This patch changes the unwinder hooks as follows: MD_POST_EXTRACT_ROOT_ADDR is removed: root address comes from __builtin_return_address which is not mangled. MD_POST_EXTRACT_FRAME_ADDR is renamed to MD_DEMANGLE_RETURN_ADDR, it now operates on _Unwind_Word instead of void *, so the hook should work when return address signing is enabled on AArch64 ilp32. (But for that __builtin_aarch64_autia1716 should be fixed to operate on 64bit input instead of a void *.) MD_POST_FROB_EH_HANDLER_ADDR is removed: it is the responsibility of __builtin_eh_return to do the mangling if necessary. 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com> libgcc/ChangeLog: PR target/94891 * config/aarch64/aarch64-unwind.h (MD_POST_EXTRACT_ROOT_ADDR): Remove. (MD_POST_FROB_EH_HANDLER_ADDR): Remove. (MD_POST_EXTRACT_FRAME_ADDR): Rename to ... (MD_DEMANGLE_RETURN_ADDR): This. (aarch64_post_extract_frame_addr): Rename to ... (aarch64_demangle_return_addr): This. (aarch64_post_frob_eh_handler_addr): Remove. * unwind-dw2.c (uw_update_context): Demangle return address. (uw_frob_return_addr): Remove. (cherry picked from commit b097c7a27fb0796b2653a1d003cbf6b7a69d8961)
2020-08-08Daily bump.GCC Administrator1-0/+9
2020-08-07aarch64: Fix up __aarch64_cas16_acq_rel fallbackJakub Jelinek1-1/+1
As mentioned in the PR, the fallback path when LSE is unavailable writes incorrect registers to the memory if the previous content compares equal to x0, x1 - it writes copy of x0, x1 from the start of function, but it should write x2, x3. 2020-08-03 Jakub Jelinek <jakub@redhat.com> PR target/96402 * config/aarch64/lse.S (__aarch64_cas16_acq_rel): Use x2, x3 instead of x(tmp0), x(tmp1) in STXP arguments. * gcc.target/aarch64/pr96402.c: New test. (cherry picked from commit 90b43856fdff7d96d93d22970eca8a86c56e0ddc)
2020-06-18Daily bump.GCC Administrator1-0/+9
2020-06-18hurd: libgcc unwinding support over signal trampolinesSamuel Thibault2-1/+114
libgcc/ * config.host (md_unwind_header) <i[34567]86-*-gnu*>: Set to 'i386/gnu-unwind.h' * config/i386/gnu-unwind.h: New file. Signed-off-by: Thomas Schwinge <thomas@codesourcery.com> (cherry picked from commit 5e2eebc80d6eeca24745c27a925afdb64292ed22)
2020-05-30Daily bump.GCC Administrator1-0/+14
2020-05-29[AArch64] Use __getauxval instead of getauxval in LSE detection code in libgccKyrylo Tkachov1-8/+9
This version of the fix uses __getauxval instead of getauxval. The whole thing is guarded simply on __gnu_linux__. __getauxval was introduced in 2.16 but the aarch64 port was added in 2.17 so in practice I expect all aarch64 glibcs to support __getauxval. Bootstrapped and tested on aarch64-none-linux-gnu. Also tested on aarch64-none-elf. 2020-05-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * config/aarch64/lse-init.c (init_have_lse_atomics): Use __getauxval instead of getauxval. (AT_HWCAP): Define. (HWCAP_ATOMICS): Define. Guard detection on __gnu_linux__. (cherry picked from commit 1266778548e20de82983b6446f3cb685068cfb1e)
2020-05-29gcov-tool: Flexible endian adjustment for merging coverage dataMartin Liska2-4/+3
gcc/ChangeLog: 2020-05-27 Dong JianQiang <dongjianqiang2@huawei.com> PR gcov-profile/95332 * gcov-io.c (gcov_var::endian): Move field. (from_file): Add IN_GCOV_TOOL check. * gcov-io.h (gcov_magic): Ditto. libgcc/ChangeLog: 2020-05-27 Dong JianQiang <dongjianqiang2@huawei.com> PR gcov-profile/95332 * libgcov-util.c (read_gcda_file): Call gcov_magic. * libgcov.h (gcov_magic): Disable GCC poison. (cherry picked from commit 17d1594bfe08f3c768e024b180816cbe37ac08ac)
2020-05-21x86: Update VPCLMULQDQ checkH.J. Lu2-2/+11
Update VPCLMULQDQ check to support processors with AVX version of VPCLMULQDQ. Backport from master PR target/91695 * config/i386/cpuinfo.c (get_available_features): Fix VPCLMULQDQ check. (cherry picked from commit 1e46a443f25d26816536c0c480211714b123a1d5)
2020-05-21x86: Update GFNI checkH.J. Lu2-2/+11
Update GFNI check to support processors with SSE and AVX versions of GFNI. Backport from master PR target/95220 * config/i386/cpuinfo.c (get_available_features): Fix FEATURE_GFNI check. (cherry picked from commit 1e46a443f25d26816536c0c480211714b123a1d5)
2020-05-14aarch64, libgcc: Fix unwinding from pac-ret to normal frames [PR94514]Szabolcs Nagy2-0/+11
With -mbranch-protection=pac-ret the debug info toggles the signedness state of the return address so the unwinder knows when the return address needs pointer authentication. The unwind context flags were not updated according to the dwarf frame info. This causes unwinding across frames that were built without pac-ret to incorrectly authenticate the return address wich corrupts the return address on a system where PAuth is enabled. Note: This even affects systems where all code use pac-ret because unwinding across a signal frame the return address is not signed. Changed branch-protection=pac-ret to sign-return-address=all etc in the tests for the backport. gcc/testsuite/ChangeLog: Backport from mainline. 2020-04-23 Szabolcs Nagy <szabolcs.nagy@arm.com> PR target/94514 * g++.target/aarch64/pr94514.C: Require lp64. * gcc.target/aarch64/pr94514.c: Likewise. Backport from mainline. 2020-04-21 Szabolcs Nagy <szabolcs.nagy@arm.com> PR target/94514 * g++.target/aarch64/pr94514.C: New test. * gcc.target/aarch64/pr94514.c: New test. libgcc/ChangeLog: Backport from mainline. 2020-04-21 Szabolcs Nagy <szabolcs.nagy@arm.com> PR target/94514 * config/aarch64/aarch64-unwind.h (aarch64_frob_update_context): Update context->flags accroding to the frame state.
2020-04-22aarch64: Fix bootstrap with old binutils [PR93053]Andre Vieira5-8/+128
As reported in the PR, GCC 10 (and also 9.3.1 but not 9.3.0) fails to build when using older binutils which lack LSE support, because those instructions are used in libgcc. Thanks to Kyrylo's hint, the following patches (hopefully) allow it to build even with older binutils by using .inst directive if LSE support isn't available in the assembler. 2020-04-16 Andre Vieira <andre.simoesdiasvieira@arm.com> Backport from mainline 2020-04-15 Jakub Jelinek <jakub@redhat.com> PR target/93053 * configure.ac (LIBGCC_CHECK_AS_LSE): Add HAVE_AS_LSE checking. * config/aarch64/lse.S: Include auto-target.h, if HAVE_AS_LSE is not defined, use just .arch armv8-a. (B, M, N, OPN): Define. (COMMENT): New .macro. (CAS, CASP, SWP, LDOP): Use .inst directive if HAVE_AS_LSE is not defined. Otherwise, move the operands right after the glue? and comment out operands where the macros are used. * configure: Regenerated. * config.in: Regenerated.
2020-04-22aarch64: Configure for sys/auxv.h in libgcc for lse-init.cAndre Vieira5-9/+42
2020-04-16 Andre Vieira <andre.simoesdiasvieira@arm.com> Backport from mainline 2019-09-25 Richard Henderson <richard.henderson@linaro.org> PR target/91833 * config/aarch64/lse-init.c: Include auto-target.h. Disable initialization if !HAVE_SYS_AUXV_H. * configure.ac (AC_CHECK_HEADERS): Add sys/auxv.h. * config.in, configure: Rebuild.
2020-04-22aarch64: Fix store-exclusive in load-operate LSE helpersAndre Vieira2-2/+11
2020-04-16 Andre Vieira <andre.simoesdiasvieira@arm.com> Backport from mainline 2019-09-25 Richard Henderson <richard.henderson@linaro.org> PR target/91834 * config/aarch64/lse.S (LDNM): Ensure STXR output does not overlap the inputs.
2020-04-22aarch64: Add out-of-line functions for LSE atomicsAndre Vieira5-0/+338
This is the libgcc part of the interface -- providing the functions. Rationale is provided at the top of libgcc/config/aarch64/lse.S. 2020-04-16 Andre Vieira <andre.simoesdiasvieira@arm.com> Backport from mainline 2019-09-19 Richard Henderson <richard.henderson@linaro.org> * config/aarch64/lse-init.c: New file. * config/aarch64/lse.S: New file. * config/aarch64/t-lse: New file. * config.host: Add t-lse to all aarch64 tuples.
2020-04-19i386: Remove unneeded assignments when triggering SSE exceptionsUros Bizjak2-6/+5
According to "Intel 64 and IA32 Arch SDM, Vol. 3": "Because SIMD floating-point exceptions are precise and occur immediately, the situation does not arise where an x87 FPU instruction, a WAIT/FWAIT instruction, or another SSE/SSE2/SSE3 instruction will catch a pending unmasked SIMD floating-point exception." Remove unneeded assignments to volatile memory. libgcc/ChangeLog: * config/i386/sfp-exceptions.c (__sfp_handle_exceptions) [__SSE_MATH__]: Remove unneeded assignments to volatile memory. libatomic/ChangeLog: * config/x86/fenv.c (__atomic_feraiseexcept) [__SSE_MATH__]: Remove unneeded assignments to volatile memory. libgfortran/ChangeLog: * config/fpu-387.h (local_feraiseexcept) [__SSE_MATH__]: Remove unneeded assignments to volatile memory.
2020-03-04i386: Properly pop restore token in signal frameH.J. Lu2-0/+52
Linux CET kernel places a restore token on shadow stack for signal handler to enhance security. The restore token is 8 byte and aligned to 8 bytes. It is usually transparent to user programs since kernel will pop the restore token when signal handler returns. But when an exception is thrown from a signal handler, now we need to pop the restore token from shadow stack. For x86-64, we just need to treat the signal frame as normal frame. For i386, we need to search for the restore token to check if the original shadow stack is 8 byte aligned. If the original shadow stack is 8 byte aligned, we just need to pop 2 slots, one restore token, from shadow stack. Otherwise, we need to pop 3 slots, one restore token + 4 byte padding, from shadow stack. This patch also includes 2 tests, one has a restore token with 4 byte padding and one without. Tested on Linux/x86-64 CET machine with and without -m32. libgcc/ Backport from mainline PR libgcc/85334 * config/i386/shadow-stack-unwind.h (_Unwind_Frames_Increment): New. (cherry picked from commit bf6465d0461234ccd45ae34d5e2375a0bee0081d)
2020-03-04Update ChangeLog and version files for releasereleases/gcc-8.4.0Jakub Jelinek2-0/+8
2019-11-17linux-atomic.c (__kernel_cmpxchg): Change argument 1 to volatile void *.John David Anglin2-100/+129
* config/pa/linux-atomic.c (__kernel_cmpxchg): Change argument 1 to volatile void *. Remove trap check. (__kernel_cmpxchg2): Likewise. (FETCH_AND_OP_2): Adjust operand types. (OP_AND_FETCH_2): Likewise. (FETCH_AND_OP_WORD): Likewise. (OP_AND_FETCH_WORD): Likewise. (COMPARE_AND_SWAP_2): Likewise. (__sync_val_compare_and_swap_4): Likewise. (__sync_bool_compare_and_swap_4): Likewise. (SYNC_LOCK_TEST_AND_SET_2): Likewise. (__sync_lock_test_and_set_4): Likewise. (SYNC_LOCK_RELEASE_1): Likewise. Use __kernel_cmpxchg2 for release. (__sync_lock_release_4): Adjust operand types. Use __kernel_cmpxchg for release. (__sync_lock_release_8): Remove. From-SVN: r278379
2019-11-04backport: lib2funcs.S (__gcc_plt_call): Load branch target to %r21.John David Anglin3-14/+33
Backport from mainline 2019-10-12 John David Anglin <danglin@gcc.gnu.org> * config/pa/lib2funcs.S (__gcc_plt_call): Load branch target to %r21. Load PIC register after branch target. Fix white space. * config/pa/milli64.S ($$dyncall): Separate LINUX and non LINUX implementations. Load PIC register after branch target. Don't clobber function pointer when it points to function descriptor. Use nullification instead of branch in LINUX implementation. From-SVN: r277806
2019-11-04backport: fptr.c (_dl_read_access_allowed): Change argument to unsigned int.John David Anglin2-6/+21
Backport from mainline 2019-10-15 John David Anglin <danglin@gcc.gnu.org> * config/pa/fptr.c (_dl_read_access_allowed): Change argument to unsigned int. Adjust callers. (__canonicalize_funcptr_for_compare): Change plabel type to volatile unsigned int *. Load relocation offset before function pointer. Add barrier to ensure ordering. From-SVN: r277805
2019-10-31[Darwin] Some TLC for older Darwin versions.Iain Sandoe5-22/+29
The library handling and some of the options for creating the crts for the older PPC Darwin versions had bit-rotted somewhat. This adjusts the build criteria for the crts to avoid newer ld64 versions warnings about mismatches in build and object versions. Added to some of the comments to documented why the specs are as they are. gcc/ 2019-10-31 Iain Sandoe <iain@sandoe.co.uk> Backport from mainline 2019-07-03 Iain Sandoe <iain@sandoe.co.uk> * config/darwin.h (REAL_LIBGCC_SPEC): Adjust for earlier Darwin. (STARTFILE_SPEC): Split crt3 into a separate spec. (DARWIN_EXTRA_SPECS): Add crt2 and crt3 spec. (DARWIN_CRT2_SPEC): New. (DARWIN_CRT3_SPEC): New. (MIN_LD64_OMIT_STUBS): Revise to 62.1. * config/rs6000/darwin.h (DARWIN_CRT2_SPEC): Revise conditions. (DARWIN_CRT3_SPEC): New. libgcc/ 2019-10-31 Iain Sandoe <iain@sandoe.co.uk> Backport from mainline. 2019-07-03 Iain Sandoe <iain@sandoe.co.uk> * config.host (powerpc-*-darwin*,powerpc64-*-darwin*): Revise crt list. * config/rs6000/t-darwin: Build crt3_2 for older systems. Revise mmacosx-version-min for crts to run across all system versions. * config/rs6000/t-darwin64 (LIB2ADD): Remove. * config/t-darwin: Revise mmacosx-version-min for crts to run across system versions >= 10.4. From-SVN: r277693
2019-10-31[Darwin, PPC] Move the out of line register save/restore to an endfile.Iain Sandoe4-11/+49
272660 We have been including this in libgcc, which means that we have to append -lgcc even when using shared libgcc. In preparation for revision of libgcc split this into an endfile. 272759 Correct whitespace in specs. gcc/ 2019-10-31 Iain Sandoe <iain@sandoe.co.uk> Backport from mainline 2019-06-27 Iain Sandoe <iain@sandoe.co.uk> * config/rs6000/darwin.h (ENDFILE_SPEC): Correct whitespace in the spec. Backport from mainline 2019-06-25 Iain Sandoe <iain@sandoe.co.uk> * config/rs6000/darwin.h (ENDFILE_SPEC): New. libgcc/ 2019-10-31 Iain Sandoe <iain@sandoe.co.uk> Backport from mainline. 2019-06-25 Iain Sandoe <iain@sandoe.co.uk> * config.host: Add libef_ppc.a to the extra files for powerpc-darwin. * config/rs6000/t-darwin: (PPC_ENDFILE_SRC, PPC_ENDFILE_OBJS): New. Build objects for the out of line save/restore register functions so that they can be used for any supported Darwin version. * config/t-darwin: Default the build Darwin version to Darwin8 (MacOS 10.4). From-SVN: r277692
2019-08-27[Darwin, PPC, libgcc] Ensure unwinder is built with altivec enabled.Iain Sandoe2-0/+11
Fix bootstrap fail when building for 10.4. When libgcc is built on Darwin, it is usually built for the earliest potential target (Darwin8, 10.4). Build for that revision default to assuming that the processor might be G3 (without vector ops) and there is an outlined function used for save/restore that checks whether the processor is G3 or G4+ at run- time. However, the unwinder itself needs to be built with the assumption of vector usage so that the relevant outlined functions are called. 2019-08-27 Iain Sandoe <iain@sandoe.co.uk> Backport from mainline. 2019-06-06 Iain Sandoe <iain@sandoe.co.uk> * config/rs6000/t-darwin: Ensure that the unwinder is built with altivec enabled. From-SVN: r274969
2019-08-16[darwin, ppc] backport Fix .machine directive in vecsave asm.Iain Sandoe2-1/+14
The asm file fails to build if we use a modern assembler which checks that the machine is consistent with the filetype. Fixed by adjusting in a similar manner to other assembler. libgcc/ 2019-08-16 Iain Sandoe <iain@sandoe.co.uk> Backport from mainline. 2019-05-12 Iain Sandoe <iain@sandoe.co.uk> * config/rs6000/darwin-vecsave.S: Set .machine appropriately. From-SVN: r274584
2019-02-22Update ChangeLog and version files for releasereleases/gcc-8.3.0GCC Administrator2-0/+8
From-SVN: r269116
2019-02-19unwind-dw2.c (_Unwind_GetGR): Compare regno instead of index to DWARF_ZERO_REG.Uros Bizjak2-13/+18
* unwind-dw2.c (_Unwind_GetGR) [DWARF_ZERO_REG]: Compare regno instead of index to DWARF_ZERO_REG. From-SVN: r269022
2018-10-03i386: Remove _Unwind_Frames_IncrementH.J. Lu2-5/+8
CET kernel has been changed to place a restore token on shadow stack for signal handler to enhance security. It is usually transparent to user programs since kernel will pop the restore token when signal handler returns. But when an exception is thrown from a signal handler, now we need to remove _Unwind_Frames_Increment to pop the the restore token from shadow stack. Otherwise, we get FAIL: g++.dg/torture/pr85334.C -O0 execution test FAIL: g++.dg/torture/pr85334.C -O1 execution test FAIL: g++.dg/torture/pr85334.C -O2 execution test FAIL: g++.dg/torture/pr85334.C -O3 -g execution test FAIL: g++.dg/torture/pr85334.C -Os execution test FAIL: g++.dg/torture/pr85334.C -O2 -flto -fno-use-linker-plugin -flto-partition=none execution test Backport from mainline 2018-07-27 H.J. Lu <hongjiu.lu@intel.com> PR libgcc/85334 * config/i386/shadow-stack-unwind.h (_Unwind_Frames_Increment): Removed. From-SVN: r264814
2018-08-17backport: pa.md (UNSPEC_MEMORY_BARRIER): New unspec enum.John David Anglin2-39/+42
Backport from mainline 2018-08-11 John David Anglin <danglin@gcc.gnu.org> gcc * config/pa/pa.md (UNSPEC_MEMORY_BARRIER): New unspec enum. Update comment for atomic instructions. (atomic_storeqi, atomic_storehi, atomic_storesi, atomic_storesf, atomic_loaddf, atomic_loaddf_1, atomic_storedf, atomic_storedf_1): Remove. (atomic_loaddi): Revise fence expansion to only emit fence prior to load for __ATOMIC_SEQ_CST model. (atomic_loaddi_1): Remove float register target. (atomic_storedi): Handle CONST_INT values. (atomic_storedi_1): Remove float register source. Add special case for zero value. (memory_barrier): New expander and insn. libgcc * config/pa/linux-atomic.c: Update comment. (FETCH_AND_OP_2, OP_AND_FETCH_2, FETCH_AND_OP_WORD, OP_AND_FETCH_WORD, COMPARE_AND_SWAP_2, __sync_val_compare_and_swap_4, SYNC_LOCK_TEST_AND_SET_2, __sync_lock_test_and_set_4): Use __ATOMIC_RELAXED for atomic loads. (SYNC_LOCK_RELEASE_1): New define. Use __sync_synchronize() and unordered store to release lock. (__sync_lock_release_8): Likewise. (SYNC_LOCK_RELEASE_2): Remove define. From-SVN: r263637
2018-07-26Update ChangeLog and version files for releasereleases/gcc-8.2.0GCC Administrator2-0/+8
From-SVN: r262992
2018-06-22backport: re PR target/85358 (PowerPC: Using -mabi=ieeelongdouble ↵Michael Meissner3-2/+11
-mcpu=power9 breaks __ibm128) [gcc] 2018-06-22 Michael Meissner <meissner@linux.ibm.com> Back port from trunk 2018-06-18 Michael Meissner <meissner@linux.ibm.com> PR target/85358 * config/rs6000/rs6000-modes.def (toplevel): Rework the 128-bit floating point modes, so that IFmode is numerically greater than TFmode, which is greater than KFmode using FRACTIONAL_FLOAT_MODE to declare the ordering. This prevents IFmode from being converted to TFmode when long double is IEEE 128-bit on an ISA 3.0 machine. Include rs6000-modes.h to share the fractional values between genmodes* and the rest of the compiler. (IFmode): Likewise. (KFmode): Likewise. (TFmode): Likewise. * config/rs6000/rs6000-modes.h: New file. * config/rs6000/rs6000.c (rs6000_debug_reg_global): Change the meaning of rs6000_long_double_size so that 126..128 selects an appropriate 128-bit floating point type. (rs6000_option_override_internal): Likewise. * config/rs6000/rs6000.h (toplevel): Include rs6000-modes.h. (TARGET_LONG_DOUBLE_128): Change the meaning of rs6000_long_double_size so that 126..128 selects an appropriate 128-bit floating point type. (LONG_DOUBLE_TYPE_SIZE): Update comment. * config/rs6000/rs6000.md (trunciftf2): Correct the modes of the source and destination to match the standard usage. (truncifkf2): Likewise. (copysign<mode>3, IEEE iterator): Rework copysign of float128 on ISA 2.07 to use an explicit clobber, instead of passing in a temporary. (copysign<mode>3_soft): Likewise. [libgcc] 2018-06-22 Michael Meissner <meissner@linux.ibm.com> Back port from trunk 2018-06-18 Michael Meissner <meissner@linux.ibm.com> * config/rs6000/t-float128 (FP128_CFLAGS_SW): Compile float128 support modules with -mno-gnu-attribute. * config/rs6000/t-float128-hw (FP128_CFLAGS_HW): Likewise. From-SVN: r261893
2018-06-20re PR libgcc/86213 (-fsplit-stack runtime may clobber SSE input param reg)Than McIntosh2-25/+25
libgcc/: PR libgcc/86213 * generic-morestack.c (allocate_segment): Move calls to getenv and getpagesize to __morestack_load_mmap. (__morestack_load_mmap) Initialize static_pagesize and use_guard_page here so as to avoid clobbering SSE regs during a __morestack call. gcc/testsuite/: * gcc.dg/split-8.c: New. From-SVN: r261826
2018-06-01re PR target/85591 (__builtin_cpu_is() is not detecting bdver2 with Model = ↵Uros Bizjak2-4/+13
0x02) PR target/85591 * config/i386/cpuinfo.c (get_amd_cpu): Return AMDFAM15H_BDVER2 for AMDFAM15H model 0x2. From-SVN: r261042
2018-05-07[NDS32] Fix incorrect settings in sfp-machine.h and t-nds32-newlib for hard fp.Chung-Ju Wu3-1/+28
libgcc/ Backport from mainline. 2018-04-25 Chung-Ju Wu <jasonwucj@gmail.com> * config/nds32/sfp-machine.h: Fix settings for NDS32_ABI_2FP_PLUS. * config/nds32/t-nds32-newlib (HOST_LIBGCC2_CFLAGS): Use -fwrapv. From-SVN: r259989
2018-05-02Update ChangeLog and version files for releaseGCC Administrator2-0/+8
From-SVN: r259827
2018-04-27PR85532, crtend.o built without --enable-initfini-array has bad .eh_frameAlan Modra2-1/+7
PR libgcc/85532 * config/rs6000/t-crtstuff (CRTSTUFF_T_CFLAGS): Add -fno-asynchronous-unwind-tables. From-SVN: r259703
2018-04-24x86: Update __CET__ checkH.J. Lu2-1/+6
__CET__ has been changed by revision 259522: commit d59cfa9a4064339cf2bd2da828c4c133f13e57f0 Author: hjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4> Date: Fri Apr 20 13:30:13 2018 +0000 Define __CET__ for -fcf-protection and remove -mibt to (__CET__ & 1) != 0: -fcf-protection=branch or -fcf-protection=full (__CET__ & 2) != 0: -fcf-protection=return or -fcf-protection=full We should check (__CET__ & 2) != 0 for shadow stack. libgcc/ * config/i386/linux-unwind.h: Add (__CET__ & 2) != 0 check when including "config/i386/shadow-stack-unwind.h". libitm/ * config/x86/sjlj.S (_ITM_beginTransaction): Add (__CET__ & 2) != 0 check for shadow stack. (GTM_longjmp): Likewise. From-SVN: r259621
2018-04-24Regenerate configure of target librariesH.J. Lu2-1/+5
* configure: Regenerated. From-SVN: r259610
2018-04-20re PR target/85456 (PowerPC: Using -mabi=ieeelongdouble calls wrong function ↵Michael Meissner6-3/+98
for __builtin_powi.) [libgcc] 2018-04-20 Michael Meissner <meissner@linux.ibm.com> PR target/85456 * config/rs6000/_powikf2.c: New file. Add support for the __builtin_powil function when long double is IEEE 128-bit floating point. * config/rs6000/float128-ifunc.c (__powikf2_resolve): Add __powikf2 support. (__powikf2): Likewise. * config/rs6000/quad-float128.h (__powikf2_sw): Likewise. (__powikf2_hw): Likewise. (__powikf2): Likewise. * config/rs6000/t-float128 (fp128_ppc_funcs): Likewise. * config/rs6000/t-float128-hw (fp128_hw_func): Likewise. (_powikf2-hw.c): Likewise. [gcc] 2018-04-20 Michael Meissner <meissner@linux.ibm.com> PR target/85456 * config/rs6000/rs6000.c (init_float128_ieee): Add support to call __powikf2 when long double is IEEE 128-bit. [gcc/testsuite] 2018-04-20 Michael Meissner <meissner@linux.ibm.com> PR target/85456 * gcc.target/powerpc/pr85456.c: New test. From-SVN: r259533
2018-04-19libgcc/CET: Skip signal frames when unwinding shadow stackH.J. Lu4-2/+20
When -fcf-protection -mcet is used, I got FAIL: g++.dg/eh/sighandle.C (gdb) bt #0 _Unwind_RaiseException (exc=exc@entry=0x416ed0) at /export/gnu/import/git/sources/gcc/libgcc/unwind.inc:140 #1 0x00007ffff7d9936b in __cxxabiv1::__cxa_throw (obj=<optimized out>, tinfo=0x403dd0 <typeinfo for int@@CXXABI_1.3>, dest=0x0) at /export/gnu/import/git/sources/gcc/libstdc++-v3/libsupc++/eh_throw.cc:90 #2 0x0000000000401255 in sighandler (signo=11, si=0x7fffffffd6f8, uc=0x7fffffffd5c0) at /export/gnu/import/git/sources/gcc/gcc/testsuite/g++.dg/eh/sighandle.C:9 #3 <signal handler called> <<<< Signal frame which isn't on shadow stack #4 dosegv () at /export/gnu/import/git/sources/gcc/gcc/testsuite/g++.dg/eh/sighandle.C:14 #5 0x00000000004012e3 in main () at /export/gnu/import/git/sources/gcc/gcc/testsuite/g++.dg/eh/sighandle.C:30 (gdb) p frames $6 = 5 (gdb) frame count should be 4, not 5. This patch skips signal frames when unwinding shadow stack. gcc/testsuite/ PR libgcc/85334 * g++.dg/torture/pr85334.C: New test. libgcc/ PR libgcc/85334 * unwind-generic.h (_Unwind_Frames_Increment): New. * config/i386/shadow-stack-unwind.h (_Unwind_Frames_Increment): Likewise. * unwind.inc (_Unwind_RaiseException_Phase2): Increment frame count with _Unwind_Frames_Increment. (_Unwind_ForcedUnwind_Phase2): Likewise. From-SVN: r259502
2018-04-19libgcc/CET: Add _CET_ENDBR to __stack_split_initializeH.J. Lu2-0/+7
Program received signal SIGSEGV, Segmentation fault. __stack_split_initialize () at /export/gnu/import/git/sources/gcc/libgcc/config/i386/morestack.S:751 751 leaq -16000(%rsp),%rax # We should have at least 16K. Missing separate debuginfos, use: dnf debuginfo-install libgcc-8.0.1-0.21.0.fc28.x86_64 (gdb) disass Dump of assembler code for function __stack_split_initialize: => 0x0000000000402858 <+0>: lea -0x3e80(%rsp),%rax 0x0000000000402860 <+8>: mov %rax,%fs:0x70 0x0000000000402869 <+17>: sub $0x8,%rsp 0x000000000040286d <+21>: mov %rsp,%rdi 0x0000000000402870 <+24>: mov $0x3e80,%esi 0x0000000000402875 <+29>: callq 0x401810 <__generic_morestack_set_initial_sp> 0x000000000040287a <+34>: add $0x8,%rsp 0x000000000040287e <+38>: retq End of assembler dump. (gdb) This patch adds the missing ENDBR to __stack_split_initialize. PR libgcc/85379 * config/i386/morestack.S (__stack_split_initialize): Add _CET_ENDBR. From-SVN: r259497
2018-04-19cet.m4 (GCC_CET_FLAGS): Default to --disable-cet, replace ↵Jakub Jelinek2-5/+8
--enable-cet=default with --enable-cet=auto. * config/cet.m4 (GCC_CET_FLAGS): Default to --disable-cet, replace --enable-cet=default with --enable-cet=auto. * doc/install.texi: Document --disable-cet being the default and --enable-cet=auto. * configure: Regenerated. From-SVN: r259487
2018-04-18re PR jit/85384 (libgccjit does not work if --with-gcc-major-version is used)David Malcolm2-1/+6
PR jit/85384 * acx.m4 (GCC_BASE_VER): Remove \$\$ from sed expression. * configure.ac (gcc-driver-name.h): Honor --with-gcc-major-version by using gcc_base_ver to generate a gcc_driver_version, and use it when generating GCC_DRIVER_NAME. * configure: Regenerate. * configure: Regenerate. From-SVN: r259462
2018-04-16re PR target/84945 (UBSAN: gcc/config/i386/i386.c:33312:22: runtime error: ↵Jakub Jelinek2-1/+15
shift exponent 32 is too large for 32-bit type 'int') PR target/84945 * config/i386/cpuinfo.c (set_feature): Wrap into do while (0) to avoid -Wdangling-else warnings. Mask shift counts to avoid -Wshift-count-negative and -Wshift-count-overflow false positives. From-SVN: r259398