Age | Commit message (Collapse) | Author | Files | Lines |
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2013-03-07 Sriraman Tallam <tmsriram@google.com>
* config/i386/cpuinfo.c (get_intel_cpu): Fix cpuid codes for
sandybridge processors.
From-SVN: r196532
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generated on SH2)
PR target/56529
* config/sh/sh.c (sh_option_override): Check for TARGET_DYNSHIFT
instead of TARGET_SH2 for call-table case. Do not set sh_div_strategy
to SH_DIV_CALL_TABLE for TARGET_SH2.
* config.gcc (sh_multilibs): Add m2 and m2a to sh*-*-linux* multilib
list.
* doc/invoke.texi (SH options): Document mdiv= call-div1, call-fp,
call-table options.
PR target/56529
* config/sh/lib1funcs.S (udivsi3_i4i, sdivsi3_i4i): Add __SH2A__ to
inclusion list.
From-SVN: r196484
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* config/microblaze/crti.S: Setup stack protection at entry
From-SVN: r196432
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(__rotldi3): Shift bytewise if applicable.
From-SVN: r196431
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libgcc/
* config/aarch64/sync-cache.c
(__aarch64_sync_cache_range): Silence warnings.
From-SVN: r196380
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Revert microMIPS patch.
From-SVN: r196259
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libgcc/
2013-02-24 Catherine Moore <clm@codesourcery.com>
Joseph Myers <joseph@codesourcery.com>
Chao-ying Fu <fu@mips.com>
* config/mips/mips16.S: Don't build for microMIPS.
* config/mips/linux-unwind.h: Handle microMIPS frame.
* config/mips/crtn.S (fini, init): New labels.
gcc/
2013-02-24 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com>
Tom de Vries <tom@codesourcery.com>
Nathan Sidwell <nathan@codesourcery.com>
Iain Sandoe <iain@codesourcery.com>
Nathan Froyd <froydnj@codesourcery.com>
Chao-ying Fu <fu@mips.com>
* doc/extend.texi: (micromips, nomicromips, nocompression):
Document new function attributes.
* doc/invoke.texi (minterlink-compressed, mmicromips,
m14k, m14ke, m14kec): Document new options.
(minterlink-mips16): Update documentation.
* doc/md.texi (ZC, ZD): Document new constraints.
* configure.ac (gcc_cv_as_micromips): Check if linker
supports the .set micromips directive.
* configure: Regenerate.
* config.in: Regenerate.
* config/mips/mips-tables.opt: Regenerate.
* config/mips/micromips.md: New file.
* constraints.md (ZC, AD): New constraints.
* config/mips/predicates.md (movep_src_register): New predicate.
(movep_src_operand): New predicate.
(non_volatile_mem_operand): New predicate.
* config/mips/mips.md (multimem): New type.
(length): Differentiate between 17-bit and 18-bit branch offsets.
(MOVEP1, MOVEP2): New mode iterator.
(mov_<load>l): Use ZC constraint.
(mov_<load>r): Likewise.
(mov_<store>l): Likewise.
(mov_<store>r): Likewise.
(*branch_equality<mode>_inverted): Add microMIPS support.
(*branch_equality<mode>): Likewise.
(*jump_absolute): Likewise.
(indirect_jump_<mode>): Likewise.
(tablejump_<mode>): Likewise.
(<optab>_internal): Likewise.
(sibcall_internal): Likewise.
(sibcall_value_internal): Likewise.
(prefetch): Use constraint ZD.
* config/mips/mips.opt (minterlink-compressed): New option.
(minterlink-mips16): Now an alias for minterlink-compressed.
(mmicromips): New option.
* config/mips/sync.md (sync_compare_and_swap<mode>): Use ZR constraint.
(compare_and_swap_12): Likewise.
(sync_add<mode>): Likewise.
(sync_<optab>_12): Likewise.
(sync_old_<optab>_12): Likewise.
(sync_new_<optab>_12): Likewise.
(sync_nand_12): Likewise.
(sync_old_nand_12): Likewise.
(sync_new_nand_12): Likewise.
(sync_sub<mode>): Likewise.
(sync_old_add<mode>): Likewise.
(sync_old_sub<mode>): Likewise.
(sync_new_add<mode>): Likewise.
(sync_new_sub<mode>): Likewise.
(sync_<optab><mode>): Likewise.
(sync_old_<optab><mode>): Likewise.
(sync_new_<optab><mode>): Likewise.
(sync_nand<mode>): Likewise.
(sync_old_nand<mode>): Likewise.
(sync_new_nand<mode>): Likewise.
(sync_lock_test_and_set<mode>): Likewise.
(test_and_set_12): Likewise.
(atomic_compare_and_swap<mode>): Likewise.
(atomic_exchange<mode>_llsc): Likewise.
(atomic_fetch_add<mode>_llsc): Likewise.
* config/mips/mips-cpus.def (m14kc, m14k): New processors.
* config/mips/mips-protos.h (umips_output_save_restore): New prototype.
(umips_save_restore_pattern_p): Likewise.
(umips_load_store_pair_p): Likewise.
(umips_output_load_store_pair): Likewise.
(umips_movep_target_p): Likewise.
(umips_12bit_offset_address_p): Likewise.
* config/mips/mips.c (MIPS_MAX_FIRST_STEP): Update for microMIPS.
(mips_base_mips16): Rename this...
(mips_base_compression_flags): ...to this. Update all uses.
(mips_attribute_table): Add micromips, nomicromips and nocompression.
(mips_mips16_decl_p): Delete.
(mips_nomips16_decl_p): Delete.
(mips_get_compress_on_flags): New function.
(mips_get_compress_off_flags): New function.
(mips_get_compress_mode): New function.
(mips_get_compress_on_name): New function.
(mips_get_compress_off_name): New function.
(mips_insert_attributes): Support multiple compression types.
(mips_merge_decl_attributes): Likewise.
(umips_12bit_offset_address_p): New function.
(mips_start_function_definition): Emit .set micromips directive.
(mips_call_may_need_jalx_p): New function.
(mips_function_ok_for_sibcall): Add microMIPS support.
(mips_print_operand_punctuation): Support short delay slots and
compact jumps.
(umips_swm_mask, umips_swm_encoding): New.
(umips_build_save_restore): New function.
(mips_for_each_saved_gpr_and_fpr): Add microMIPS support.
(was_mips16_p): Remove.
(old_compression_mode): New.
(mips_set_compression_mode): New function.
(mips_set_current_function): Add microMIPS support.
(mips_option_override): Likewise.
(umips_save_restore_pattern_p): New function.
(umips_output_save_restore): New function.
(umips_load_store_pair_p_1): New function.
(umips_load_store_pair_p): New function.
(umips_output_load_store_pair_1): New function.
(umips_output_load_store_pair): New function.
(umips_movep_target_p) New function.
(mips_prepare_pch_save): Add microMIPS support.
* config/mips/mips.h (TARGET_COMPRESSION): New.
(TARGET_CPU_CPP_BUILTINS): Update macro
to use new compression flags and to support microMIPS.
(MIPS_ISA_LEVEL_SPEC): Add m14k processors.
(MIPS_ARCH_FLOAT_SPEC): Likewise.
(ISA_HAS_LWXS): Include TARGET_MICROMIPS.
(ISA_HAS_LOAD_DELAY): Exclude TARGET_MICROMIPS.
(ASM_SPEC): Support mmicromips and mno-micromips.
(M16STORE_REG_P): New macro.
(MIPS_CALL): Support TARGET_MICROMIPS.
(MICROMIPS_J): New macro.
(mips_base_mips16): Rename this...
(mips_base_compression_flags): ...to this.
(UMIPS_12BIT_OFFSET_P): New macro.
* config/mips/t-sde: (MULTILIB_OPTIONS): Add microMIPS.
(MULTILIB_DIRNAMES): Likewise.
gcc/testsuite/
2013-02-24 Catherine Moore <clm@codesourcery.com>
Richard Sandiford <rdsandiford@googlemail.com>
* gcc.target/mips/mips.exp: Add microMIPS support.
* gcc.target/mips/umips-movep-2.c: New test.
* gcc.target/mips/umips-lwp-2.c: New test.
* gcc.target/mips/umips-swp-5.c: New test.
* gcc.target/mips/umips-constraints-1.c: New test.
* gcc.target/mips/umips-lwp-3.c: New test.
* gcc.target/mips/umips-swp-6.c: New test.
* gcc.target/mips/umips-constraints-2.c: New test.
* gcc.target/mips/umips-save-restore-1.c: New test.
* gcc.target/mips/umips-lwp-4.c: New test.
* gcc.target/mips/umips-swp-7.c: New test.
* gcc.target/mips/umips-save-restore-2.c: New test.
* gcc.target/mips/umips-lwp-swp-volatile.c: New test.
* gcc.target/mips/umips-lwp-5.c: New test.
* gcc.target/mips/umips-save-restore-3.c: New test.
* gcc.target/mips/umips-lwp-6.c: New test.
* gcc.target/mips/umips-swp-1.c: New test.
* gcc.target/mips/umips-lwp-7.c: New test.
* gcc.target/mips/umips-swp-2.c: New test.
* gcc.target/mips/umips-lwp-8.c: New test.
* gcc.target/mips/umips-swp-3.c: New test.
* gcc.target/mips/umips-movep-1.c: New test.
* gcc.target/mips/umips-lwp-1.c: New test.
* gcc.target/mips/umips-swp-4.c: New test.
Co-Authored-By: Chao-ying Fu <fu@mips.com>
Co-Authored-By: Iain Sandoe <iain@codesourcery.com>
Co-Authored-By: Joseph Myers <joseph@codesourcery.com>
Co-Authored-By: Maciej W. Rozycki <macro@codesourcery.com>
Co-Authored-By: Nathan Froyd <froydnj@codesourcery.com>
Co-Authored-By: Nathan Sidwell <nathan@codesourcery.com>
Co-Authored-By: Richard Sandiford <rdsandiford@googlemail.com>
Co-Authored-By: Tom de Vries <tom@codesourcery.com>
From-SVN: r196246
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* config/microblaze/modsi3.S (modsi3): Fix case with 0x80000000
as dividend.
From-SVN: r196156
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PR target/55431
* config/rs6000/linux-unwind.h (ppc_linux_aux_vector): Delete.
(ppc_fallback_frame_state): Always set up save locations for fp
and altivec. Don't bother with non-callee-saved regs, r0-r13
except for r2 on ppc64, fr0-fr13, v0-v19, vscr.
From-SVN: r196077
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gcc/
PR target/54222
* config/avr/avr-dimode.md (umulsidi3, mulsidi3): New expanders.
(umulsidi3_insn, mulsidi3_insn): New insns.
libgcc/
PR target/54222
* config/avr/t-avr (LIB2FUNCS_EXCLUDE): Add: _usmulUHA, _usmulUSA,
_ssmulHA, _ssmulSA.
(LIB1ASMFUNCS): Add: _muldi3_6, _mulsidi3, _umulsidi3, _usmuluha3,
_ssmulha3, _usmulusa3, _ssmulsa3.
* config/avr/lib1funcs.S (__muldi3_6): Break out of __muldi3.
(__muldi3): XCALL __muldi3_6 instead of rcall.
(__umulsidi3, __mulsidi3): New functions.
(do_prologue_saves, do_epilogue_restores): New .macros.
(__divdi3_moddi3): Use them.
* config/avr/lib1funcs-fixed.S (__usmuluha3, __ssmulha3)
(__usmulusa3, __ssmulsa3): New functions.
From-SVN: r195978
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r193271)
/libgcc
2013-02-11 Iain Sandoe <iain@codesourcery.com>
Jack Howarth <howarth@bromo.med.uc.edu>
Patrick Marlier <patrick.marlier@gmail.com>
PR libitm/55693
* config/darwin-crt-tm.c: Remove dummy functions hack.
/gcc
2013-02-11 Iain Sandoe <iain@codesourcery.com>
Jack Howarth <howarth@bromo.med.uc.edu>
Patrick Marlier <patrick.marlier@gmail.com>
PR libitm/55693
* config/darwin.h: Replace ENDFILE_SPEC with TM_DESTRUCTOR and
define ENDFILE_SPEC as TM_DESTRUCTOR.
* config/i386/darwin.h (ENDFILE_SPEC): Use TM_DESTRUCTOR.
/libitm
2013-02-11 Iain Sandoe <iain@codesourcery.com>
Jack Howarth <howarth@bromo.med.uc.edu>
Patrick Marlier <patrick.marlier@gmail.com>
PR libitm/55693
* alloc_cpp.cc: Enable function declarations on darwin.
* eh_cpp.cc: Likewise.
Co-Authored-By: Jack Howarth <howarth@bromo.med.uc.edu>
Co-Authored-By: Patrick Marlier <patrick.marlier@gmail.com>
From-SVN: r195960
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gcc/
PR target/54222
* config/avr/avr.md (unspec) <UNSPEC_ROUND>: Add.
* config/avr/avr-fixed.md (ALL4QA, ALL124QA): New mode iterators.
(round<mode>3, round<mode>3_const): New expanders for fixed-mode.
(*round<mode>3.libgcc): New insns for fixed-modes.
* config/avr/builtins.def (ABSxx): Use a non-NULL LIBNAME.
(ROUNDxx, COUNTLSxx, BITSxx, xxBITS): New DEF_BUILTINs.
(ROUNDFX, COUNTLSFX, ABSFX): New DEF_BUILTINs.
* config/avr/stdfix.h (absFX, bitsFX, FXbits): Remove inline
implementations. Define to __builtin_avr_absFX,
__builtin_avr_bitsFX, __builtin_avr_FXbits, respectively.
(roundFX, countlsFX): Define to __builtin_avr_roundFX,
__builtin_avr_countlsFX, respectively.
* config/avr/avr-c.c (target.h): Include it.
(enum avr_builtin_id): New enum.
(avr_resolve_overloaded_builtin): New static function.
(avr_register_target_pragmas): Use it to set
targetm.resolve_overloaded_builtin.
* config/avr/avr.c (avr_init_builtins): Supply myriads of local
tree nodes used by DEF_BUILTIN.
(avr_expand_builtin) <AVR_BUILTIN_ROUNDxx>: Sanity-check them.
(avr_fold_builtin) <AVR_BUILTIN_BITSxx>: Fold to VIEW_COVERT_EXPR.
<AVR_BUILTIN_xxBITS>: Same.
libgcc/
PR target/54222
* config/avr/lib2funcs.c: New C sources for modules for libgcc.a.
* config/avr/lib2-object.mk: New iterator to build objects from it.
* config/avr/t-avr: Iterate lib2-object.mk to build objects from
lib2funcs.c.
(LIB2FUNCS_EXCLUDE): Add _clrsbdi2.
(LIB1ASMFUNCS): Add: _ssabs_1, _mask1, _ret, _roundqq3, _rounduqq3,
_round_s2, _round_u2, _round_2_const, _addmask_2, _round_s4,
_round_u4, _round_4_const, _addmask_4, _round_x8, _rounddq3
_roundudq3, _roundda3 _rounduda3, _roundta3 _rounduta3.
* config/avr/lib1funcs-fixed.S: Implement them.
gcc/testsuite/
PR target/54222
* gcc.target/avr/torture/builtins-4-roundfx.c: New test.
* gcc.target/avr/torture/builtins-5-countlsfx.c: New test.
From-SVN: r195878
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From-SVN: r195731
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break)
PR target/54601
libgcc/
* config.host (powerpc-ibm-aix[56789]): Add t-aix-cxa to tmake_file.
Add crtcxa to extra_parts.
* config/rs6000/exit.h: New file.
* config/rs6000/cxa_atexit.c: New file.
* config/rs6000/cxa_finalize.c: New file.
* config/rs6000/crtcxa.c: New file.
* config/rs6000/t-aix-cxa: New file.
* config/rs6000/libgcc-aix-cxa.ver: New file.
gcc/
* configure.ac (cxa_atexit): Add AIX.
* configure: Regenerate.
* config/rs6000/aix61.h (STARTFILE_SPEC): Add crtcxa.o.
From-SVN: r195675
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* config/v850/lib1funcs.S: Add support for e3v5 architecture
variant.
* config/v850/constraints.md (Q): Define as a memory constraint.
* config/v850/predicates.md (label_ref_operand): New predicate.
(e3v5_shift_operand): New predicate.
(ior_operator): New predicate.
* config/v850/t-v850: Add e3v5 multilib.
* config/v850/v850-protos.h (v850_adjust_insn_length): Prototype.
(v850_gen_movdi): Prototype.
* config/v850/v850.c: Add support for e3v5 architecture.
Rename all uses of TARGET_V850E || TARGET_V850E2_ALL to
TARGET_V850E_UP.
(construct_save_jarl): Add e3v5 long JARL support.
(v850_adjust_insn_length): New function. Adjust length of call
insns when using e3v5 instructions.
(v850_gen_movdi): New function: Generate instructions to move a
DImode value.
* config/v850/v850.h (TARGET_CPU_v850e3v5): Define.
(CPP_SPEC): Define __v850e3v5__ as appropriate.
(TARGET_USE_FPU): Enable for e3v5.
(CONST_OK_FOR_W): New macro.
(ADJUST_INSN_LENGTH): Define.
* config/v850/v850.md (UNSPEC_LOOP): Define.
(attr cpu): Add v850e3v5.
Rename all uses of TARGET_V850E2 to TARGET_V850E2V3_UP.
(movdi): New pattern.
(movdi_internal): New pattern.
(cbranchsf4): Conditionalize on TARGET_USE_FPU.
(cbranchdf4): Conditionalize on TARGET_USE_FPU.
(cstoresf4): Likewise.
(cstoredf4): Likewise.
(insv): New pattern.
(rotlso3_a): New pattern.
(rotlsi3_b): New pattern
(rotlsi3_v850e3v5): New pattern.
(doloop_begin): New pattern.
(fix_loop_counter): New pattern.
(doloop_end): New pattern.
(branch_normal): Add e3v5 long branch support.
(branch_invert): Likewise.
(branch_z_normal): Likewise.
(branch_z_invert): Likewise.
(branch_nz_normal): Likewise.
(branch_nz_invert): Likewise.
(call_internal_short): Add e3v5 register-indirect JARL support.
(call_internal_long): Likewise.
(call_value_internal_short): Likewise.
(call_value_internal_long): Likewise.
* config/v850/v850.opt (mv850e3v5, mv850e2v4): New options.
(mloop): New option.
* config.gcc: Add support for configuring v840e3v5 target.
* doc/invoke.texi: Document new v850 specific command line
options.
From-SVN: r195623
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PR target/54222
* config/avr/t-avr (LIB2FUNCS_EXCLUDE): Add:
_mulQQ, _mulHQ, _mulHA, _mulSA,
_mulUQQ, _mulUHQ, _mulUHA, _mulUSA,
_divQQ, _divHQ, _divHA, _divSA,
_divUQQ, _divUHQ, _divUHA, _divUSA.
From-SVN: r195532
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gcc: PR target/54663
* config.gcc (microblaze*-linux*): Add tmake_file to allow building
of microblaze-c.o.
libgcc:
* config.host(microblaze*-linux*): tmake_file: Remove
t-slibgcc-nolc-override, add t-slibgcc-libgcc.
* config/microblaze/t-microblaze: Set LIB2FUNCS_EXCLUDE
to exclude functions from being built with libgcc.c and use
the microblaze assembly.
From-SVN: r195488
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libgcc/config.host (microblaze*-*-*): Rename microblaze*-*-elf, update extra_parts.
From-SVN: r195487
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- 1) and (icache_lsize - 1) to the type...
2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
* config/aarch64/sync-cache.c (__aarch64_sync_cache_range): Cast the
results of (dcache_lsize - 1) and (icache_lsize - 1) to the type
__UINTPTR_TYPE__; also cast 'base' to the same type before the
alignment operation.
From-SVN: r195266
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From-SVN: r195203
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From-SVN: r195174
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not be weak.
* generic-morestack-thread.c: Change declaration of
__real_pthread_create to not be weak.
From-SVN: r195172
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From-SVN: r195151
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* config/avr/avr-lib.h: Add GPL copyright notice.
From-SVN: r195145
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TO_MODE_UNSIGNED == 0.
* fixed-bit.c (SATFRACT) <FROM_TYPE=1, TO_TYPE=4>: Only
declare / set min_low, min_high if TO_MODE_UNSIGNED == 0.
(SATFRACT) <FROM_TYPE=TO_TYPE=4>: Only declare / set min_low,
min_high if FROM_MODE_UNSIGNED == 0 and TO_MODE_UNSIGNED == 0.
From-SVN: r195141
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i[34567]86-*-* and x86_64-*-* soft-fp targets.
libgcc/
* config.host (i[34567]86-*-openbsd* and x86_64-*-openbsd*):
Add to lists of i[34567]86-*-* and x86_64-*-* soft-fp targets.
gcc/
* config/i386/openbsdelf.h (LIBGCC2_HAS_TF_MODE, LIBGCC2_TF_CEXT,
TF_SIZE): Define.
From-SVN: r194999
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is supported.
* config/v850/lib1funcs.S: Only provide CALLT support functions if
the CALLT instruction is supported.
From-SVN: r194898
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* gthr.h (__gthread_cond_timedwait_recursive): Do not require.
* gthr-posix.h (__gthread_cond_timedwait_recursive): Remove.
From-SVN: r194652
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* config/arm/fp16.c (__gnu_f2h_internal): Fix inaccuracy when aexp
is 25.
From-SVN: r194474
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PR libgcc/55451
* fixed-bit.c (FIXED_SSADD, FIXED_SSSUB, FIXED_SSNEG): Avoid
undefined signed overflows.
From-SVN: r194439
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doesn't exist)
PR target/55344
* config/alpha/linux-unwind.h: Disable when inhibit_libc is defined.
From-SVN: r194334
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* config/i386/sfp-machine.h (FP_EX_ALL): Define.
(FP_TRAPPING_EXCEPTIONS): Define.
* config/i386/32/sfp-machine.h (FP_EX_SHIFT): Define.
* config/i386/64/sfp-machine.h (FP_EX_SHIFT): Ditto.
From-SVN: r194243
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PR bootstrap/55571
* Makefile.in (libgcc_s.so): Depend on and link with libgcc.a.
From-SVN: r194159
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2012-12-04 Marcus Shawcroft <marcus.shawcroft@arm.com>
* config/aarch64/sfp-machine.h (FP_EX_ALL): Define.
(FP_EX_SHIFT): Define.
(FP_TRAPPING_EXCEPTIONS): Define.
From-SVN: r194151
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2012-12-04 Marcus Shawcroft <marcus.shawcroft@arm.com>
* config/aarch64/sfp-machine.h (FP_RND_MASK): Define.
(FP_ROUNDMODE): Use FP_RND_MASK.
* config/aarch64/sfp-exceptions.c: New.
* config/aarch64/sfp-machine.h (FP_HANDLE_EXCEPTIONS):
Use __sfp_handle_exceptions.
From-SVN: r194142
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* config.host: (arm*-*-freebsd*): Remove.
(arm*-*-linux*, arm*-*-uclinux*): Simplify logic.
(arm*-*-elf*): Remove.
(arm*-*-wince-pe*): Remove.
* arm/unwind-arm.c (struct fpa_reg): Delete.
(struct fpa_regs): Delete.
(phase1_vrs): Remove fpa element.
(_Unwind_VRS_Get): Remove _UVRSC_FPA.
(_Unwind_VRS_Set, _Unwind_VRS_Pop): Likewise.
* arm/pr-support.c (__gnu_unwind_execute): Remove FPA support.
* ieee754-sf.S (floatundisf): Remove FPA support.
(floatdisf): Likewise.
* ieee75f-df.S (floatundidf): Likewise.
(floatdidf): Likewise.
From-SVN: r194138
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PR target/55445
* unwind-c.c (__SEH__): Make sure SjLj isn't active.
* unwind-generic.h: Likewise.
* unwind-seh.c: Likewise.
From-SVN: r193928
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PR libgcc/48076
* emutls.c (__emutls_get_address): Avoid race condition between
obj->loc.offset read and emutls_key initialization.
From-SVN: r193907
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libgcc/
Adjust decimal point of signed accum mode to GCC default.
PR target/54222
* config/avr/t-avr (LIB1ASMFUNCS): Add _fractsfsq _fractsfusq,
_divqq_helper.
* config/avr/lib1funcs-fixed.S (__fractqqsf, __fracthqsf)
(__fractsasf, __fractsfha, __fractusqsf, __fractsfsa)
(__mulha3, __mulsa3)
(__divqq3, __divha3, __divsa3): Adjust to new position of
decimal point of signed accum types.
(__mulusa3_round): New function.
(__mulusa3): Use it.
(__divqq_helper): New function.
(__udivuqq3): Use it.
gcc/
Adjust decimal point of signed accum mode to GCC default.
PR target/54222
* config/avr/avr-modes.def (HA, SA, DA): Remove mode adjustments.
(TA): Move decimal point one bit to the right.
* config/avr/avr.c (avr_out_fract): Rewrite.
From-SVN: r193721
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PR bootstrap/55370
* libgcc-std.ver.in: Add GCC_4.8.0 and %inherit for it.
From-SVN: r193648
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parallel profiledbootstrap builds of gcc.
This patch addresses the bogus "Invocation mismatch" messages seen in parallel
profiledbootstrap builds of gcc. See PR bootstrap/55051 for a discussion of
why this is occurring and why this checking is inaccurate. Leave it in when
!GCOV_LOCKED, to warn about concurrent update issues requiring locking.
2012-11-18 Teresa Johnson <tejohnson@google.com>
PR bootstrap/55051
* libgcov.c (gcov_exit): Remove merged program summary
comparison unless !GCOV_LOCKED.
From-SVN: r193612
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From-SVN: r193540
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to a 32 byte boundary.
* generic-morestack.c (__generic_morestack): Align the returned
stack pointer to a 32 byte boundary.
* config/i386/morestack.S (__morestack_non_split) [32-bit]: Don't
increment the return address until we have decided that we don't
have a varargs function.
(__morestack) [32-bit]: Align stack correctly when calling C
functions.
(__morestack) [64-bit]: Likewise.
From-SVN: r193264
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format specifiers.
libgcc/config/libbid/
* bid_functions.h: Check for __GLIBC__ additionally to LINUX when
defining format specifiers.
config/
* dfp.m4 (enable_decimal_float): Enable for i?86*-*-gnu*.
gcc/
* configure: Regenerate.
libdecnumber/
* configure: Regenerate.
libgcc/
* configure: Regenerate.
From-SVN: r193143
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in 'asm')
PR target/55175
* config/i386/sfp-exceptions.c: Guard with _SOFT_FLOAT.
* config/i386/sfp-machine.h: Guard exception handling
code with _SOFT_FLOAT.
* config/i386/32/sfp-machine.h: Guard rounding handling
code with _SOFT_FLOAT.
* config/i386/64/sfp-machine.h: Ditto.
From-SVN: r193095
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2012-10-31 Joel Sherrill <joel.sherrill@oarcorp.com>
* config.host (m32r-*-rtems*): Include crtinit.o and crtfinit.o
as extra_parts.
From-SVN: r193010
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* config/i386/crtfastmath.c (set_fast_math): Use __builtin_ia32_fxsave.
Clear only fxsave.mxcsr_mask. Use saved mxcsr from fxsave structure
when appropriate. Correct structure element types.
* config/i386/t-crtfm (crtfastmath.o): Compile with -mfxsr, remove
-minline-all-stringops from compile flags.
From-SVN: r192855
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2012-10-25 Ralf Corsépius <ralf.corsepius@rtems.org>
* config.host (sh*-*-rtems*): Add sh*-*-elf*'s extra_parts.
From-SVN: r192805
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2012-10-25 Ralf Corsépius <ralf.corsepius@rtems.org>
* config.host (sh*-*-rtems*): Add sh*-*-elf*'s extra_parts.
From-SVN: r192799
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2012-10-25 Sebastian Huber <sebastian.huber@embedded-brains.de>
* config.host (powerpc-*-rtems*): Add rs6000/t-savresfgpr to
tmake_file.
From-SVN: r192795
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