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2018-10-25Revert partially changes from r265454 (PR other/87735).Martin Liska2-1/+6
2018-10-25 Martin Liska <mliska@suse.cz> PR other/87735 * gcc.dg/tree-prof/time-profiler-1.c: Revert. * gcc.dg/tree-prof/time-profiler-2.c: Likewise. * gcc.dg/tree-prof/time-profiler-3.c: Likewise. 2018-10-25 Martin Liska <mliska@suse.cz> PR other/87735 * libgcov-profiler.c: Revert. From-SVN: r265494
2018-10-24Remove reduntant dumps and make tp_first_run dump more compact.Martin Liska2-1/+6
2018-10-24 Martin Liska <mliska@suse.cz> * cgraph.c (cgraph_node::dump): Remove reduntant dumps and make tp_first_run dump more compact. 2018-10-24 Martin Liska <mliska@suse.cz> * libgcov-profiler.c: Start from 1 in order to distinguish functions which were seen and these that were not. From-SVN: r265454
2018-10-18udivmodsi4.c (__udivmodsi4): Rename to conform to coding standard.Paul Koning7-7/+106
* udivmodsi4.c (__udivmodsi4): Rename to conform to coding standard. * divmod.c: Update references to __udivmodsi4. * udivmod.c: Ditto. * udivhi3.c: New file. * udivmodhi4.c: New file. * config/pdp11/t-pdp11 (LIB2ADD): Add the new files. From-SVN: r265277
2018-10-17libgcc: apply LIB2FUNCS_EXCLUDE logic to LIB2FUNCS_STRasmus Villemoes2-0/+6
One target file (config/c6x/t-elf) lists _printf and _gcc_bcmp in LIB2FUNCS_EXCLUDE, but that does not have any effect, since those are not filtered away from LIB2FUNCS_ST. Another option is to do as in config/rl78/t-rl78, which explicitly sets LIB2FUNCS_ST # Remove __gcc_bcmp from LIB2FUNCS_ST LIB2FUNCS_ST = _eprintf but honouring LIB2FUNCS_EXCLUDE also for LIB2FUNCS_ST seems more natural. From-SVN: r265246
2018-10-12tighten the toplevel guard on ibm-ldouble.cOlivier Hainque2-1/+7
2018-10-12 Olivier Hainque <hainque@adacore.com> * config/rs6000/ibm-ldouble.c: Augment the toplevel guard with defined (__FLOAT128_TYPE__) || defined (__LONG_DOUBLE_128__). From-SVN: r265135
2018-10-08* config/pdp11/t-pdp11: Remove -mfloat32 switch.Paul Koning2-1/+5
From-SVN: r264939
2018-10-04Fix divergence in indirect profiling (PR gcov-profile/84107).Martin Liska3-17/+29
2018-10-04 Martin Liska <mliska@suse.cz> PR gcov-profile/84107 * tree-profile.c (init_ic_make_global_vars): Remove ic_void_ptr_var and ic_gcov_type_ptr_var. Come up with new ic_tuple* variables. Emit __gcov_indirect_call{,_topn} variables. (gimple_gen_ic_profiler): Access the variable and emit gimple. (gimple_gen_ic_func_profiler): Access __gcov_indirect_call.callee field. (gimple_init_gcov_profiler): Use ptr_type_node. * value-prof.c (gimple_ic): Use ptr_type_node. 2018-10-04 Martin Liska <mliska@suse.cz> PR gcov-profile/84107 * libgcov-profiler.c (__gcov_indirect_call): Change type to indirect_call_tuple. (struct indirect_call_tuple): New struct. (__gcov_indirect_call_topn_profiler): Change type. (__gcov_indirect_call_profiler_v2): Use the new variables. * libgcov.h (struct indirect_call_tuple): New struct definition. From-SVN: r264840
2018-10-03libgcc2.c (isnan): Use __builtin_isnan.Uros Bizjak2-15/+15
* libgcc2.c (isnan): Use __builtin_isnan. (isfinite): Use __builtin_isfinite. (isinf): Use __builtin_isinf. From-SVN: r264823
2018-09-26crtprec.c (set_precision): Use fnstcw instead of fstcw.Uros Bizjak2-1/+5
* config/i386/crtprec.c (set_precision): Use fnstcw instead of fstcw. From-SVN: r264649
2018-09-21Leverage cacheTextUpdate for __clear_cache on VxWorksOlivier Hainque4-0/+53
2018-09-21 Alexandre Oliva <oliva@adacore.com> libgcc/ * config/vxcache.c: New file. Provide __clear_cache, based on the cacheTextUpdate VxWorks service. * config/t-vxworks (LIB2ADD): Add vxcache.c. (LIB2FUNCS_EXCLUDE): Add _clear_cache. * config/t-vxwoks7: Likewise. gcc/ * config/vxworks.h (CLEAR_INSN_CACHE): #define to 1. From-SVN: r264479
2018-09-21Remove arc profile histogram in non-LTO mode.Martin Liska3-317/+63
2018-09-21 Martin Liska <mliska@suse.cz> * auto-profile.c (autofdo_source_profile::read): Do not set sum_all. (read_profile): Do not add working sets. (read_autofdo_file): Remove sum_all. (afdo_callsite_hot_enough_for_early_inline): Remove const qualifier. * coverage.c (struct counts_entry): Remove gcov_summary. (read_counts_file): Read new GCOV_TAG_OBJECT_SUMMARY, do not support GCOV_TAG_PROGRAM_SUMMARY. (get_coverage_counts): Remove summary and expected arguments. * coverage.h (get_coverage_counts): Likewise. * doc/gcov-dump.texi: Remove -w option. * gcov-dump.c (dump_working_sets): Remove. (main): Do not support '-w' option. (print_usage): Likewise. (tag_summary): Likewise. * gcov-io.c (gcov_write_summary): Do not dump histogram. (gcov_read_summary): Likewise. (gcov_histo_index): Remove. (gcov_histogram_merge): Likewise. (compute_working_sets): Likewise. * gcov-io.h (GCOV_TAG_OBJECT_SUMMARY): Mark it not obsolete. (GCOV_TAG_PROGRAM_SUMMARY): Mark it obsolete. (GCOV_TAG_SUMMARY_LENGTH): Adjust. (GCOV_HISTOGRAM_SIZE): Remove. (GCOV_HISTOGRAM_BITVECTOR_SIZE): Likewise. (struct gcov_summary): Simplify rapidly just to runs and sum_max fields. (gcov_histo_index): Remove. (NUM_GCOV_WORKING_SETS): Likewise. (compute_working_sets): Likewise. * gcov-tool.c (print_overlap_usage_message): Remove trailing empty line. * gcov.c (read_count_file): Read GCOV_TAG_OBJECT_SUMMARY. (output_lines): Remove program related line. * ipa-profile.c (ipa_profile): Do not consider GCOV histogram. * lto-cgraph.c (output_profile_summary): Do not stream GCOV histogram. (input_profile_summary): Do not read it. (merge_profile_summaries): And do not merge it. (input_symtab): Do not call removed function. * modulo-sched.c (sms_schedule): Do not print sum_max. * params.def (HOT_BB_COUNT_FRACTION): Reincarnate param that was removed when histogram method was invented. (HOT_BB_COUNT_WS_PERMILLE): Mention that it's used only in LTO mode. * postreload-gcse.c (eliminate_partially_redundant_load): Fix GCOV coding style. * predict.c (get_hot_bb_threshold): Use HOT_BB_COUNT_FRACTION and dump selected value. * profile.c (add_working_set): Remove. (get_working_sets): Likewise. (find_working_set): Likewise. (get_exec_counts): Do not work with working sets. (read_profile_edge_counts): Do not inform as sum_max is removed. (compute_branch_probabilities): Likewise. (compute_value_histograms): Remove argument for call of get_coverage_counts. * profile.h: Do not make gcov_summary const. 2018-09-21 Martin Liska <mliska@suse.cz> * libgcov-driver.c (crc32_unsigned): Remove. (gcov_histogram_insert): Likewise. (gcov_compute_histogram): Likewise. (compute_summary): Simplify rapidly. (merge_one_data): Do not handle PROGRAM_SUMMARY tag. (merge_summary): Rapidly simplify. (dump_one_gcov): Ignore gcov_summary. (gcov_do_dump): Do not handle program summary, it's not used. * libgcov-util.c (tag_summary): Remove. (read_gcda_finalize): Fix coding style. (read_gcda_file): Initialize curr_object_summary. (compute_summary): Remove. (calculate_overlap): Remove settings of run_max. From-SVN: r264462
2018-09-21[NDS32] Sync glibc and kernel structure, all use _rt_sigframe.Monk Chiang2-14/+10
libgcc/ * config/nds32/linux-unwind.h (struct _rt_sigframe): Use struct ucontext_t type instead. (nds32_fallback_frame_state): Remove struct _sigframe statement. From-SVN: r264461
2018-09-21[NDS32] Add t-nds32-glibc file.Kito Cheng2-0/+38
libgcc/ * config/nds32/t-nds32-glibc: New file. From-SVN: r264460
2018-09-18Use v2 map syntax in libgcc-unwind.map if Solaris ld supports itRainer Orth5-0/+56
* configure.ac (solaris_ld_v2_maps): New test. * configure: Regenerate. * Makefile.in (solaris_ld_v2_maps): New variable. * config/t-slibgcc-sld (libgcc-unwind.map): Emit v2 mapfile syntax if supported. From-SVN: r264382
2018-08-27Replace 8 spaces with a tabular in ChangeLog files.Martin Liska1-19/+19
From-SVN: r263886
2018-08-23PR target/86951 arm - Handle speculation barriers on pre-armv7 CPUsRichard Earnshaw3-1/+52
The AArch32 instruction sets prior to Armv7 do not define the ISB and DSB instructions that are needed to form a speculation barrier. While I do not know of any instances of cores based on those instruction sets being vulnerable to speculative side channel attacks it is possible to run code built for those ISAs on more recent hardware where they would become vulnerable. This patch works around this by using a library call added to libgcc. That code can then take any platform-specific actions necessary to ensure safety. For the moment I've only handled two cases: the library code being built for armv7 or later anyway and running on Linux. On Linux we can handle this by calling the kernel function that will flush a small amount of cache. Such a sequence ends with a ISB+DSB sequence if running on an Armv7 or later CPU. gcc: PR target/86951 * config/arm/arm-protos.h (arm_emit_speculation_barrier): New prototype. * config/arm/arm.c (speculation_barrier_libfunc): New static variable. (arm_init_libfuncs): Initialize it. (arm_emit_speculation_barrier): New function. * config/arm/arm.md (speculation_barrier): Call arm_emit_speculation_barrier for architectures that do not have DSB or ISB. (speculation_barrier_insn): Only match on Armv7 or later. libgcc: PR target/86951 * config/arm/lib1funcs.asm (speculation_barrier): New function. * config/arm/t-arm (LIB1ASMFUNCS): Add it to list of functions to build. From-SVN: r263806
2018-08-22commit missed change from r263764Iain Sandoe1-1/+1
From-SVN: r263766
2018-08-22Move Darwin10 unwinder fix to a crt shim.Iain Sandoe4-13/+25
gcc/ * config/darwin10.h (LINK_GCC_C_SEQUENCE_SPEC): Adjust to use the Darwin10-specific unwinder-shim. * config/darwin12.h (LINK_GCC_C_SEQUENCE_SPEC): Remove. * config/rs6000/darwin.h (DARWIN_CRT1_SPEC, DARWIN_DYLIB1_SPEC): New to cater for Darwin10 Rosetta. libgcc/ * config/unwind-dw2-fde-darwin.c (_darwin10_Unwind_FindEnclosingFunction): move from here ... * config/darwin10-unwind-find-enc-func.c: … to here. * config/t-darwin: Build Darwin10 unwinder shim crt. * libgcc/config.host: Add the Darwin10 unwinder shim. From-SVN: r263765
2018-08-21libgcc: add crt{begin,end} for powerpc-wrs-vxworks targetRasmus Villemoes2-0/+6
In order to allow ZCX on VxWorks, we need the frame_dummy function to do the register_frame_info(). So make sure crtbegin.o and crtend.o are available for use with a custom spec file. From-SVN: r263690
2018-08-17C-SKY port: libgccJojo9-0/+1371
2018-08-17 Jojo <jijie_rong@c-sky.com> Huibin Wang <huibin_wang@c-sky.com> Sandra Loosemore <sandra@codesourcery.com> Chung-Lin Tang <cltang@codesourcery.com> C-SKY port: libgcc libgcc/ * config.host: Add C-SKY support. * config/csky/*: New. Co-Authored-By: Chung-Lin Tang <cltang@codesourcery.com> Co-Authored-By: Huibin Wang <huibin_wang@c-sky.com> Co-Authored-By: Sandra Loosemore <sandra@codesourcery.com> From-SVN: r263631
2018-08-12[NDS32] Implement more C ISR extension.Chung-Ju Wu88-241/+902
gcc/ * config.gcc (nds32*): Add nds32_isr.h and nds32_init.inc in extra_headers. * common/config/nds32/nds32-common.c (nds32_handle_option): Handle OPT_misr_secure_ case. * config/nds32/nds32-isr.c: Implementation of backward compatibility. * config/nds32/nds32-protos.h (nds32_isr_function_critical_p): New. * config/nds32/nds32.c (nds32_attribute_table): Add critical and secure attribute. * config/nds32/nds32.h (nds32_isr_nested_type): Add NDS32_CRITICAL. (nds32_isr_info): New field security_level. (TARGET_ISR_VECTOR_SIZE_4_BYTE): New macro. * config/nds32/nds32.md (return_internal): Consider critical attribute. * config/nds32/nds32.opt (misr-secure): New option. * config/nds32/nds32_init.inc: New file. * config/nds32/nds32_isr.h: New file. libgcc/ * config/nds32/t-nds32-isr: Rearrange object dependency. * config/nds32/initfini.c: Add dwarf2 unwinding support. * config/nds32/isr-library/adj_intr_lvl.inc: Consider new extensions and registers usage. * config/nds32/isr-library/excp_isr.S: Ditto. * config/nds32/isr-library/intr_isr.S: Ditto. * config/nds32/isr-library/reset.S: Ditto. * config/nds32/isr-library/restore_all.inc: Ditto. * config/nds32/isr-library/restore_mac_regs.inc: Ditto. * config/nds32/isr-library/restore_partial.inc: Ditto. * config/nds32/isr-library/restore_usr_regs.inc: Ditto. * config/nds32/isr-library/save_all.inc: Ditto. * config/nds32/isr-library/save_mac_regs.inc: Ditto. * config/nds32/isr-library/save_partial.inc: Ditto. * config/nds32/isr-library/save_usr_regs.inc: Ditto. * config/nds32/isr-library/vec_vid*.S: Consider 4-byte vector size. From-SVN: r263493
2018-08-11pa.md (UNSPEC_MEMORY_BARRIER): New unspec enum.John David Anglin2-39/+39
gcc * config/pa/pa.md (UNSPEC_MEMORY_BARRIER): New unspec enum. Update comment for atomic instructions. (atomic_storeqi, atomic_storehi, atomic_storesi, atomic_storesf, atomic_loaddf, atomic_loaddf_1, atomic_storedf, atomic_storedf_1): Remove. (atomic_loaddi): Revise fence expansion to only emit fence prior to load for __ATOMIC_SEQ_CST model. (atomic_loaddi_1): Remove float register target. (atomic_storedi): Handle CONST_INT values. (atomic_storedi_1): Remove float register source. Add special case for zero value. (memory_barrier): New expander and insn. libgcc * config/pa/linux-atomic.c: Update comment. (FETCH_AND_OP_2, OP_AND_FETCH_2, FETCH_AND_OP_WORD, OP_AND_FETCH_WORD, COMPARE_AND_SWAP_2, __sync_val_compare_and_swap_4, SYNC_LOCK_TEST_AND_SET_2, __sync_lock_test_and_set_4): Use __ATOMIC_RELAXED for atomic loads. (SYNC_LOCK_RELEASE_1): New define. Use __sync_synchronize() and unordered store to release lock. (__sync_lock_release_8): Likewise. (SYNC_LOCK_RELEASE_2): Remove define. From-SVN: r263488
2018-08-02arm - correctly handle denormal results during softfp subtractionNicolas Pitre3-9/+18
2018-08-02 Nicolas Pitre <nico@fluxnic.net> PR libgcc/86512 * config/arm/ieee754-df.S (adddf3): Don't shortcut denormal handling when exponent goes negative. Update my email address. * config/arm/ieee754-sf.S (addsf3): Likewise. From-SVN: r263267
2018-08-01__gcov_indirect_call_callee can't be null in __gcov_indirect_call_profiler_v2.Martin Liska2-1/+6
2018-08-01 Martin Liska <mliska@suse.cz> * libgcov-profiler.c (__gcov_indirect_call_profiler_v2): Do not check that __gcov_indirect_call_callee is non-null. From-SVN: r263202
2018-07-30[ARM] libgcc: Fix comment for code working on architectures >= 4.Christophe Lyon3-2/+8
2018-07-30 Christophe Lyon <christophe.lyon@linaro.org> * config/arm/ieee754-df.S: Fix comment for code working on architectures >= 4. * config/arm/ieee754-sf.S: Likewise. From-SVN: r263066
2018-07-27i386: Remove _Unwind_Frames_IncrementH.J. Lu2-5/+6
CET kernel has been changed to place a restore token on shadow stack for signal handler to enhance security. It is usually transparent to user programs since kernel will pop the restore token when signal handler returns. But when an exception is thrown from a signal handler, now we need to remove _Unwind_Frames_Increment to pop the the restore token from shadow stack. Otherwise, we get FAIL: g++.dg/torture/pr85334.C -O0 execution test FAIL: g++.dg/torture/pr85334.C -O1 execution test FAIL: g++.dg/torture/pr85334.C -O2 execution test FAIL: g++.dg/torture/pr85334.C -O3 -g execution test FAIL: g++.dg/torture/pr85334.C -Os execution test FAIL: g++.dg/torture/pr85334.C -O2 -flto -fno-use-linker-plugin -flto-partition=none execution test PR libgcc/85334 * config/i386/shadow-stack-unwind.h (_Unwind_Frames_Increment): Removed. From-SVN: r263030
2018-07-05Add missing '|' as wrong patch was applied.Jeff Law1-1/+1
From-SVN: r262453
2018-07-05dfp.m4 (enable_decimal_float): Enable for x86_64*-*-gnu* to catch x86_64 ↵James Clarke2-1/+5
kFreeBSD and Hurd. config/ * dfp.m4 (enable_decimal_float): Enable for x86_64*-*-gnu* to catch x86_64 kFreeBSD and Hurd. gcc/ * configure: Regenerated. libdecnumber/ * configure: Regenerated. libgcc/ * configure: Regenerated. From-SVN: r262452
2018-06-27Fix typo in libgcc/Makefile.inRainer Orth2-1/+6
* Makefile.in (install_leaf): Use enable_gcov instead of enable_libgcov. From-SVN: r262195
2018-06-27add support for --disable-gcovRasmus Villemoes4-1/+30
For some targets (in my case VxWorks 5.5), libgcov does not compile due to missing functions and macros such as getpid() and F_OK. Incidentally, gcc/Makefile.in already contains comments such as # Install gcov if it was compiled. but there is no logic in place to actually allow gcov to not be compiled. So add an option for disabling build and install of libgcov and the related host tools. From-SVN: r262180
2018-06-21[ARM] Use __ARM_ARCH and __ARM_FEATURE_LDREX instead of __ARM_ARCH__Christophe Lyon5-77/+37
2018-06-21 Christophe Lyon <christophe.lyon@linaro.org> libatomic/ * config/arm/arm-config.h (__ARM_ARCH__): Remove definitions, use __ARM_ARCH instead. Use __ARM_FEATURE_LDREX to define HAVE_STREX and HAVE_STREXBHD libgcc/ * config/arm/lib1funcs.S (__ARM_ARCH__): Remove definitions, use __ARM_ARCH and __ARM_FEATURE_CLZ instead. (HAVE_ARM_CLZ): Remove definition, use __ARM_FEATURE_CLZ instead. * config/arm/ieee754-df.S: Use __ARM_FEATURE_CLZ instead of __ARM_ARCH__. * config/arm/ieee754-sf.S: Likewise. * config/arm/libunwind.S: Use __ARM_ARCH instead of __ARM_ARCH__. From-SVN: r261841
2018-06-21[ARM] libgcc: Remove unsupported code for __ARM_ARCH__ < 4Christophe Lyon3-103/+8
2018-06-21 Christophe Lyon <christophe.lyon@linaro.org> libgcc/ * config/arm/ieee754-df.S: Remove code for __ARM_ARCH__ < 4, no longer supported. * config/arm/ieee754-sf.S: Likewise. From-SVN: r261840
2018-06-20re PR libgcc/86213 (-fsplit-stack runtime may clobber SSE input param reg)Than McIntosh2-25/+25
libgcc/: PR libgcc/86213 * generic-morestack.c (allocate_segment): Move calls to getenv and getpagesize to __morestack_load_mmap. (__morestack_load_mmap) Initialize static_pagesize and use_guard_page here so as to avoid clobbering SSE regs during a __morestack call. gcc/testsuite/: * gcc.dg/split-8.c: New. From-SVN: r261823
2018-06-18re PR target/85358 (PowerPC: Using -mabi=ieeelongdouble -mcpu=power9 breaks ↵Michael Meissner3-2/+8
__ibm128) [gcc] 2018-06-18 Michael Meissner <meissner@linux.ibm.com> PR target/85358 * config/rs6000/rs6000-modes.def (toplevel): Rework the 128-bit floating point modes, so that IFmode is numerically greater than TFmode, which is greater than KFmode using FRACTIONAL_FLOAT_MODE to declare the ordering. This prevents IFmode from being converted to TFmode when long double is IEEE 128-bit on an ISA 3.0 machine. Include rs6000-modes.h to share the fractional values between genmodes* and the rest of the compiler. (IFmode): Likewise. (KFmode): Likewise. (TFmode): Likewise. * config/rs6000/rs6000-modes.h: New file. * config/rs6000/rs6000.c (rs6000_debug_reg_global): Change the meaning of rs6000_long_double_size so that 126..128 selects an appropriate 128-bit floating point type. (rs6000_option_override_internal): Likewise. * config/rs6000/rs6000.h (toplevel): Include rs6000-modes.h. (TARGET_LONG_DOUBLE_128): Change the meaning of rs6000_long_double_size so that 126..128 selects an appropriate 128-bit floating point type. (LONG_DOUBLE_TYPE_SIZE): Update comment. * config/rs6000/rs6000.md (trunciftf2): Correct the modes of the source and destination to match the standard usage. (truncifkf2): Likewise. (copysign<mode>3, IEEE iterator): Rework copysign of float128 on ISA 2.07 to use an explicit clobber, instead of passing in a temporary. (copysign<mode>3_soft): Likewise. [libgcc] 2018-06-18 Michael Meissner <meissner@linux.ibm.com> * config/rs6000/t-float128 (FP128_CFLAGS_SW): Compile float128 support modules with -mno-gnu-attribute. * config/rs6000/t-float128-hw (FP128_CFLAGS_HW): Likewise. From-SVN: r261712
2018-06-07t-vxworks (LIBGCC_INCLUDES): Add -I$(MULTIBUILDTOP)../../gcc/include.Olivier Hainque3-4/+15
2018-06-07 Olivier Hainque <hainque@adacore.com> * config/t-vxworks (LIBGCC_INCLUDES): Add -I$(MULTIBUILDTOP)../../gcc/include. * config/t-vxworks7: Likewise. Reformat a bit to match the t-vxworks layout. From-SVN: r261273
2018-06-07config.gcc: Support "tremont".Olga Makhotina2-0/+5
2018-06-07 Olga Makhotina <olga.makhotina@intel.com> gcc/ * config.gcc: Support "tremont". * config/i386/driver-i386.c (host_detect_local_cpu): Detect "tremont". * config/i386/i386-c.c (ix86_target_macros_internal): Handle PROCESSOR_TREMONT. * config/i386/i386.c (m_TREMONT): Define. (processor_target_table): Add "tremont". (PTA_TREMONT): Define. (ix86_lea_outperforms): Add TARGET_TREMONT. (get_builtin_code_for_version): Handle PROCESSOR_TREMONT. (fold_builtin_cpu): Add M_INTEL_TREMONT, replace M_INTEL_GOLDMONT and M_INTEL_GOLDMONT_PLUS. (fold_builtin_cpu): Add "tremont". (ix86_add_stmt_cost): Add TARGET_TREMONT. (ix86_option_override_internal): Add "tremont". * config/i386/i386.h (processor_costs): Define TARGET_TREMONT. (processor_type): Add PROCESSOR_TREMONT. * config/i386/x86-tune.def: Add m_TREMONT. * doc/invoke.texi: Add tremont as x86 -march=/-mtune= CPU type. gcc/testsuite/ * gcc.target/i386/funcspec-56.inc: Test arch=tremont. libgcc/ * config/i386/cpuinfo.h (processor_types): Add INTEL_TREMONT. From-SVN: r261270
2018-06-07Fix compilation of libgcov with GCOV_LOCKED=0.Martin Liska2-2/+7
2018-06-07 Martin Liska <mliska@suse.cz> * libgcov-driver.c: Rename cs_all to all and assign it from all_prg. From-SVN: r261261
2018-06-07Fix libgcov-driver-system bootstrap failure (PR bootstrap/86057).Martin Liska4-27/+54
2018-06-07 Martin Liska <mliska@suse.cz> PR bootstrap/86057 * libgcov-driver-system.c (replace_filename_variables): Use memcpy instead of mempcpy. (allocate_filename_struct): Do not allocate filename, allocate prefix and set it. (gcov_exit_open_gcda_file): Allocate memory for gf->filename here and properly copy content into it. * libgcov-driver.c (struct gcov_filename): Remove max_length field, change prefix from size_t into char *. (compute_summary): Do not calculate longest filename. (gcov_do_dump): Release memory of gf.filename after each file. * libgcov-util.c (compute_summary): Use new signature of compute_summary. (calculate_overlap): Likewise. From-SVN: r261260
2018-06-05Support variables in expansion of -fprofile-generate option (PR ↵Martin Liska2-0/+77
gcov-profile/47618). 2018-06-05 Martin Liska <mliska@suse.cz> PR gcov-profile/47618 * doc/invoke.texi: Document how -fprofile-dir format is extended. 2018-06-05 Martin Liska <mliska@suse.cz> PR gcov-profile/47618 * libgcov-driver-system.c (replace_filename_variables): New function. (gcov_exit_open_gcda_file): Use it. From-SVN: r261199
2018-06-05Simplify gcov_histogram as it's used only for ARCS counters.Martin Liska3-172/+110
2018-06-05 Martin Liska <mliska@suse.cz> * auto-profile.c (read_autofdo_file): Do not use gcov_ctr_summary struct. (afdo_callsite_hot_enough_for_early_inline): Likewise. * coverage.c (struct counts_entry): Likewise. (read_counts_file): Read just single summary entry. (get_coverage_counts): Use gcov_summary struct. * coverage.h (get_coverage_counts): Likewise. * gcov-dump.c (dump_working_sets): Likewise. (tag_summary): Dump just single summary. * gcov-io.c (gcov_write_summary): Write just histogram summary. (gcov_read_summary): Read just single summary. (compute_working_sets): Use gcov_summary struct. * gcov-io.h (GCOV_TAG_SUMMARY_LENGTH): Remove usage of GCOV_COUNTERS_SUMMABLE. (GCOV_COUNTERS_SUMMABLE): Remove. (GCOV_FIRST_VALUE_COUNTER): Replace with GCOV_COUNTER_V_INTERVAL. (struct gcov_ctr_summary): Remove. (struct gcov_summary): Directly use fields of former gcov_ctr_summary. (compute_working_sets): Use gcov_summary struct. * gcov.c (read_count_file): Do not use ctrs fields. * lto-cgraph.c (merge_profile_summaries): Use gcov_summary struct. * lto-streamer.h (struct GTY): Make profile_info gcov_summary struct. * profile.c: Likewise. * profile.h: Likewise. 2018-06-05 Martin Liska <mliska@suse.cz> * libgcov-driver.c (gcov_compute_histogram): Remove usage of gcov_ctr_summary. (compute_summary): Do it just for a single summary. (merge_one_data): Likewise. (merge_summary): Simplify as we read just single summary. (dump_one_gcov): Pass proper argument. * libgcov-util.c (compute_one_gcov): Simplify as we have just single summary. (gcov_info_count_all_cold): Likewise. (calculate_overlap): Likewise. From-SVN: r261189
2018-06-02[NDS32] Support Linux target for nds32.Chung-Ju Wu4-0/+462
gcc/ * config.gcc (nds32*): Use nds32-linux.opt and nds32-elf.opt. (nds32le-*-*, nds32be-*-*): Integrate checking process. (nds32*-*-*): Add glibc and uclibc conditions. * common/config/nds32/nds32-common.c (nds32_except_unwind_info): New. (TARGET_EXCEPT_UNWIND_INFO): Define. * config/nds32/elf.h: New file. * config/nds32/linux.h: New file. * config/nds32/nds32-elf.opt: New file. * config/nds32/nds32-linux.opt: New file. * config/nds32/nds32-fp-as-gp.c (pass_nds32_fp_as_gp::gate): Consider TARGET_LINUX_ABI. * config/nds32/nds32.c (nds32_conditional_register_usage): Consider TARGET_LINUX_ABI. (nds32_asm_file_end): Ditto. (nds32_print_operand): Ditto. (nds32_insert_attributes): Ditto. (nds32_init_libfuncs): New function. (TARGET_HAVE_TLS): Define. (TARGET_INIT_LIBFUNCS): Define. * config/nds32/nds32.h (TARGET_DEFAULT_RELAX): Apply different relax spec content. (TARGET_ELF): Apply different mcmodel setting. (LINK_SPEC, LIB_SPEC, STARTFILE_SPEC, ENDFILE_SPEC): The content has been migrated into elf.h and linux.h files. * config/nds32/nds32.md (add_pc): Consider TARGET_LINUX_ABI. * config/nds32/nds32.opt (mvh): Consider TARGET_LINUX_ABI. (mcmodel): The content has been migrated into nds32-elf.opt and nds32-linux.opt files. * config/nds32/t-elf: New file. * config/nds32/t-linux: New file. libgcc/ * config.host (nds32*-linux*): New. * config/nds32/linux-atomic.c: New file. * config/nds32/linux-unwind.h: New file. Co-Authored-By: Kito Cheng <kito.cheng@gmail.com> Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com> From-SVN: r261116
2018-05-31re PR target/85591 (__builtin_cpu_is() is not detecting bdver2 with Model = ↵Uros Bizjak2-4/+13
0x02) PR target/85591 * config/i386/cpuinfo.c (get_amd_cpu): Return AMDFAM15H_BDVER2 for AMDFAM15H model 0x2. From-SVN: r261036
2018-05-30* crtstuff.c: Remove declaration of _Jv_RegisterClasses.Rasmus Villemoes2-3/+4
From-SVN: r260980
2018-05-29libgcov: report about a different timestamp (PR gcov-profile/85759).Martin Liska3-3/+23
2018-05-29 Martin Liska <mliska@suse.cz> PR gcov-profile/85759 * doc/gcov.texi: Document GCOV_ERROR_FILE and GCOV_EXIT_AT_ERROR env variables. 2018-05-29 Martin Liska <mliska@suse.cz> PR gcov-profile/85759 * libgcov-driver-system.c (gcov_error): Introduce usage of GCOV_EXIT_AT_ERROR env. variable. * libgcov-driver.c (merge_one_data): Print error that we overwrite a gcov file with a different timestamp. From-SVN: r260895
2018-05-23lb1sf68.S (Laddsf$nf): Fix sign bit handling in path to Lf$finfty.Kalamatee2-2/+7
2018-05-23 Kalamatee <kalamatee@gmail.com> * config/m68k/lb1sf68.S (Laddsf$nf): Fix sign bit handling in path to Lf$finfty. From-SVN: r260626
2018-05-18RISC-V: Add RV32E support.Kito Cheng2-1/+51
Kito Cheng <kito.cheng@gmail.com> Monk Chiang <sh.chiang04@gmail.com> gcc/ * common/config/riscv/riscv-common.c (riscv_parse_arch_string): Add support to parse rv32e*. Clear MASK_RVE for rv32i and rv64i. * config.gcc (riscv*-*-*): Add support for rv32e* and ilp32e. * config/riscv/riscv-c.c (riscv_cpu_cpp_builtins): Define __riscv_32e when TARGET_RVE. Handle ABI_ILP32E as soft-float ABI. * config/riscv/riscv-opts.h (riscv_abi_type): Add ABI_ILP32E. * config/riscv/riscv.c (riscv_compute_frame_info): When TARGET_RVE, compute save_libcall_adjustment properly. (riscv_option_override): Call error if TARGET_RVE and not ABI_ILP32E. (riscv_conditional_register_usage): Handle TARGET_RVE and ABI_ILP32E. * config/riscv/riscv.h (UNITS_PER_FP_ARG): Handle ABI_ILP32E. (STACK_BOUNDARY, ABI_STACK_BOUNDARY): Handle TARGET_RVE. (GP_REG_LAST, MAX_ARGS_IN_REGISTERS): Likewise. (ABI_SPEC): Handle mabi=ilp32e. * config/riscv/riscv.opt (abi_type): Add ABI_ILP32E. (RVE): Add RVE mask. * doc/invoke.texi (RISC-V options) <-mabi>: Add ilp32e info. <-march>: Add rv32e as an example. gcc/testsuite/ * gcc.dg/stack-usage-1.c: Add support for rv32e. libgcc/ * config/riscv/save-restore.S: Add support for rv32e. Co-Authored-By: Jim Wilson <jimw@sifive.com> Co-Authored-By: Monk Chiang <sh.chiang04@gmail.com> From-SVN: r260384
2018-05-18[arm][1/2] Remove support for deprecated -march=armv5 and armv5eKyrylo Tkachov2-2/+6
The -march=armv5 and armv5e options have been deprecated in GCC 7 [1]. This patch removes support for them. It's mostly mechanical stuff. The functionality that was previously gated on arm_arch5 is now gated on arm_arch5t and the functionality that was gated on arm_arch5e is now gated on arm_arch5te. A path in TARGET_OS_CPP_BUILTINS for VxWorks is now unreachable and therefore is deleted. References to armv5 and armv5e are deleted/updated throughout the source tree and testsuite. Bootstrapped and tested on arm-none-linux-gnueabihf. Also built a cc1 for arm-wrs-vxworks as a sanity check. * config/arm/arm-cpus.in (armv5, armv5e): Delete features. (armv5t, armv5te): New features. (ARMv5, ARMv5e): Delete fgroups. (ARMv5t, ARMv5te): Adjust for above changes. (ARMv6m): Likewise. (armv5, armv5e): Delete arches. * config/arm/arm.md (*call_reg_armv5): Use arm_arch5t instead of arm_arch5. (*call_reg_arm): Likewise. (*call_value_reg_armv5): Likewise. (*call_value_reg_arm): Likewise. (*call_symbol): Likewise. (*call_value_symbol): Likewise. (*sibcall_insn): Likewise. (*sibcall_value_insn): Likewise. (clzsi2): Likewise. (prefetch): Likewise. (define_split and define_peephole2 dependent on arm_arch5): Likewise. * config/arm/arm.h (TARGET_LDRD): Use arm_arch5te instead of arm_arch5e. (TARGET_ARM_QBIT): Likewise. (TARGET_DSP_MULTIPLY): Likewise. (enum base_architecture): Delete BASE_ARCH_5, BASE_ARCH_5E. (arm_arch5, arm_arch5e): Delete. (arm_arch5t, arm_arch5te): Declare. * config/arm/arm.c (arm_arch5, arm_arch5e): Delete. (arm_arch5t): Declare. (arm_option_reconfigure_globals): Update for the above. (arm_options_perform_arch_sanity_checks): Update comment, replace use of arm_arch5 with arm_arch5t. (use_return_insn): Likewise. (arm_emit_call_insn): Likewise. (output_return_instruction): Likewise. (arm_final_prescan_insn): Likewise. (arm_coproc_builtin_available): Likewise. * config/arm/arm-c.c (arm_cpu_builtins): Replace arm_arch5 and arm_arch5e with arm_arch5t and arm_arch5te. * config/arm/arm-protos.h (arm_arch5, arm_arch5e): Delete. (arm_arch5t, arm_arch5te): Declare. * config/arm/arm-tables.opt: Regenerate. * config/arm/t-arm-elf: Remove references to armv5, armv5e. * config/arm/t-multilib: Likewise. * config/arm/thumb1.md (*call_reg_thumb1_v5): Check arm_arch5t instead of arm_arch5. (*call_reg_thumb1): Likewise. (*call_value_reg_thumb1_v5): Likewise. (*call_value_reg_thumb1): Likewise. * config/arm/vxworks.h (TARGET_OS_CPP_BUILTINS): Remove now unreachable path. * doc/invoke.texi (ARM Options): Remove references to armv5, armv5e. * gcc.target/arm/pr40887.c: Update comment. * lib/target-supports.exp: Don't generate effective target checks and related helpers for armv5. Update comment. * gcc.target/arm/armv5_thumb_isa.c: Delete. * gcc.target/arm/di-longlong64-sync-withhelpers.c: Update effective target check and options. * config/arm/libunwind.S: Update comment relating to armv5. From-SVN: r260362
2018-05-17arm_cmse.h (cmse_nsfptr_create, [...]): Remove #include <stdint.h>.Jerome Lambourg2-2/+8
2018-05-17 Jerome Lambourg <lambourg@adacore.com> gcc/ * config/arm/arm_cmse.h (cmse_nsfptr_create, cmse_is_nsfptr): Remove #include <stdint.h>. Replace intptr_t with __INTPTR_TYPE__. libgcc/ * config/arm/cmse.c (cmse_check_address_range): Replace UINTPTR_MAX with __UINTPTR_MAX__ and uintptr_t with __UINTPTR_TYPE__. From-SVN: r260330
2018-05-17config.gcc: Support "goldmont-plus".Olga Makhotina3-0/+10
2018-05-17 Olga Makhotina <olga.makhotina@intel.com> gcc/ * config.gcc: Support "goldmont-plus". * config/i386/driver-i386.c (host_detect_local_cpu): Detect "goldmont-plus". * config/i386/i386-c.c (ix86_target_macros_internal): Handle PROCESSOR_GOLDMONT_PLUS. * config/i386/i386.c (m_GOLDMONT_PLUS): Define. (processor_target_table): Add "goldmont-plus". (PTA_GOLDMONT_PLUS): Define. (ix86_lea_outperforms): Add TARGET_GOLDMONT_PLUS. (get_builtin_code_for_version): Handle PROCESSOR_GOLDMONT_PLUS. (fold_builtin_cpu): Add M_INTEL_GOLDMONT_PLUS. (fold_builtin_cpu): Add "goldmont-plus". (ix86_add_stmt_cost): Add TARGET_GOLDMONT_PLUS. (ix86_option_override_internal): Add "goldmont-plus". * config/i386/i386.h (processor_costs): Define TARGET_GOLDMONT_PLUS. (processor_type): Add PROCESSOR_GOLDMONT_PLUS. * config/i386/x86-tune.def: Add m_GOLDMONT_PLUS. * doc/invoke.texi: Add goldmont-plus as x86 -march=/-mtune= CPU type. libgcc/ * config/i386/cpuinfo.h (processor_types): Add INTEL_GOLDMONT_PLUS. * config/i386/cpuinfo.c (get_intel_cpu): Detect Goldmont Plus. gcc/testsuite/ * gcc.target/i386/builtin_target.c: Test goldmont-plus. * gcc.target/i386/funcspec-56.inc: Test arch=goldmont-plus. From-SVN: r260307
2018-05-08config.gcc: Support "goldmont".Olga Makhotina3-0/+11
2018-05-08 Olga Makhotina <olga.makhotina@intel.com> gcc/ * config.gcc: Support "goldmont". * config/i386/driver-i386.c (host_detect_local_cpu): Detect "goldmont". * config/i386/i386-c.c (ix86_target_macros_internal): Handle PROCESSOR_GOLDMONT. * config/i386/i386.c (m_GOLDMONT): Define. (processor_target_table): Add "goldmont". (PTA_GOLDMONT): Define. (ix86_lea_outperforms): Add TARGET_GOLDMONT. (get_builtin_code_for_version): Handle PROCESSOR_GOLDMONT. (fold_builtin_cpu): Add M_INTEL_GOLDMONT. (fold_builtin_cpu): Add "goldmont". (ix86_add_stmt_cost): Add TARGET_GOLDMONT. (ix86_option_override_internal): Add "goldmont". * config/i386/i386.h (processor_costs): Define TARGET_GOLDMONT. (processor_type): Add PROCESSOR_GOLDMONT. * config/i386/i386.md: Add CPU "glm". * config/i386/glm.md: New file. * config/i386/x86-tune.def: Add m_GOLDMONT. * doc/invoke.texi: Add goldmont as x86 -march=/-mtune= CPU type. libgcc/ * config/i386/cpuinfo.h (processor_types): Add INTEL_GOLDMONT. * config/i386/cpuinfo.c (get_intel_cpu): Detect Goldmont. gcc/testsuite/ * gcc.target/i386/builtin_target.c: Test goldmont. * gcc.target/i386/funcspec-56.inc: Tests for arch=goldmont and arch=silvermont. From-SVN: r260042
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