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2020-05-06i386: Use generic division to generate INEXACT exceptionUros Bizjak1-13/+9
Introduce math_force_eval_div to use generic division to generate INEXACT as well as INVALID and DIVZERO exceptions. libgcc/ChangeLog: * config/i386/sfp-exceptions.c (__math_force_eval): Remove. (__math_force_eval_div): New define. (__sfp_handle_exceptions): Use __math_force_eval_div to use generic division to generate INVALID, DIVZERO and INEXACT exceptions. libatomic/ChangeLog: * config/x86/fenv.c (__math_force_eval): Remove. (__math_force_eval_div): New define. (__atomic_deraiseexcept): Use __math_force_eval_div to use generic division to generate INVALID, DIVZERO and INEXACT exceptions. libgfortran/ChangeLog: * config/fpu-387.h (__math_force_eval): Remove. (__math_force_eval_div): New define. (local_feraiseexcept): Use __math_force_eval_div to use generic division to generate INVALID, DIVZERO and INEXACT exceptions. (struct fenv): Define named struct instead of typedef.
2020-05-06[AArch64] Use __getauxval instead of getauxval in LSE detection code in libgccKyrylo Tkachov1-8/+9
This version of the fix uses __getauxval instead of getauxval. The whole thing is guarded simply on __gnu_linux__. __getauxval was introduced in 2.16 but the aarch64 port was added in 2.17 so in practice I expect all aarch64 glibcs to support __getauxval. Bootstrapped and tested on aarch64-none-linux-gnu. Also tested on aarch64-none-elf. 2020-05-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com> * config/aarch64/lse-init.c (init_have_lse_atomics): Use __getauxval instead of getauxval. (AT_HWCAP): Define. (HWCAP_ATOMICS): Define. Guard detection on __gnu_linux__.
2020-05-05Delete file meant for a private branchMichael Meissner1-7/+0
2020-05-05Remove files meant for private branchMichael Meissner2-85/+0
2020-05-05Delete changes meant for a private branch.Michael Meissner1-7/+0
2020-05-05 Michael Meissner <meissner@linux.ibm.com> * config/rs6000/rs6000-builtin.def: Delete changes meant for a private branch. * config/rs6000/rs6000-c.c: Likewise. * config/rs6000/rs6000-call.c: Likewise. * gcc/config/rs6000/rs6000.c: Likewise. 2020-05-05 Michael Meissner <meissner@linux.ibm.com> * gcc.dg/nextafter-2.c: Delete changes meant for a private branch. * gcc.target/powerpc/pr70117.c: Likewise. 2020-05-05 Michael Meissner <meissner@linux.ibm.com> * config.host: Delete changes meant for a private branch. * config/rs6000/t-float128: Likewise. * configure.ac: Likewise. * configure: Likewise.
2020-05-05Patch ieee128-lib-patch010bMichael Meissner3-0/+92
2020-05-05New fileMichael Meissner1-0/+0
2020-05-05New filesMichael Meissner2-0/+0
2020-05-05Patch ieee128-lib-patch003bMichael Meissner1-0/+7
2020-05-05Add missing ChangeLog entries.Martin Liska1-0/+6
2020-05-05Remove 2 dead variables in bid_internal.h.Martin Liska1-4/+0
libgcc/config/libbid/ChangeLog: 2020-02-04 Martin Liska <mliska@suse.cz> PR libgcc/92565 * bid_internal.h (handle_UF_128_rem): Remove unused variable. (handle_UF_128): Likewise.
2020-05-01i386: Use generic division to generate INVALID and DIVZERO exceptionsUros Bizjak1-12/+8
Introduce math_force_eval to evaluate generic division to generate INVALID and DIVZERO exceptions. libgcc/ChangeLog: * config/i386/sfp-exceptions.c (__math_force_eval): New define. (__sfp_handle_exceptions): Use __math_force_eval to evaluete generic division to generate INVALID and DIVZERO exceptions. libatomic/ChangeLog: * config/x86/fenv.c (__math_force_eval): New define. (__atomic_feraiseexcept): Use __math_force_eval to evaluete generic division to generate INVALID and DIVZERO exceptions. libgfortran/ChangeLog: * config/fpu-387.h (__math_force_eval): New define. (local_feraiseexcept): Use __math_force_eval to evaluete generic division to generate INVALID and DIVZERO exceptions.
2020-04-27RS6000: Use .machine ppc for some CRT filesSebastian Huber3-0/+3
Since commit e154242724b084380e3221df7c08fcdbd8460674 the flag -many is sometimes not passed to the assembler. Use .machine ppc to prevent errors if these files are assembled for an ISA which does not support FPRs. libgcc/ * config/rs6000/crtresfpr.S: Use .machine ppc. * config/rs6000/crtresxfpr.S: Likewise. * config/rs6000/crtsavfpr.S: Likewise.
2020-04-21aarch64, libgcc: Fix unwinding from pac-ret to normal frames [PR94514]Szabolcs Nagy1-0/+2
With -mbranch-protection=pac-ret the debug info toggles the signedness state of the return address so the unwinder knows when the return address needs pointer authentication. The unwind context flags were not updated according to the dwarf frame info. This causes unwinding across frames that were built without pac-ret to incorrectly authenticate the return address wich corrupts the return address on a system where PAuth is enabled. Note: This even affects systems where all code use pac-ret because unwinding across a signal frame the return address is not signed. gcc/testsuite/ChangeLog: PR target/94514 * g++.target/aarch64/pr94514.C: New test. * gcc.target/aarch64/pr94514.c: New test. libgcc/ChangeLog: PR target/94514 * config/aarch64/aarch64-unwind.h (aarch64_frob_update_context): Update context->flags accroding to the frame state.
2020-04-19i386: Remove unneeded assignments when triggering SSE exceptionsUros Bizjak1-6/+0
According to "Intel 64 and IA32 Arch SDM, Vol. 3: "Because SIMD floating-point exceptions are precise and occur immediately, the situation does not arise where an x87 FPU instruction, a WAIT/FWAIT instruction, or another SSE/SSE2/SSE3 instruction will catch a pending unmasked SIMD floating-point exception." Remove unneeded assignments to volatile memory. libgcc/ChangeLog: * config/i386/sfp-exceptions.c (__sfp_handle_exceptions) [__SSE_MATH__]: Remove unneeded assignments to volatile memory. libatomic/ChangeLog: * config/x86/fenv.c (__atomic_feraiseexcept) [__SSE_MATH__]: Remove unneeded assignments to volatile memory. libgfortran/ChangeLog: * config/fpu-387.h (local_feraiseexcept) [__SSE_MATH__]: Remove unneeded assignments to volatile memory.
2020-04-15aarch64: Fix bootstrap with old binutils [PR93053]Jakub Jelinek1-8/+49
As reported in the PR, GCC 10 (and also 9.3.1 but not 9.3.0) fails to build when using older binutils which lack LSE support, because those instructions are used in libgcc. Thanks to Kyrylo's hint, the following patches (hopefully) allow it to build even with older binutils by using .inst directive if LSE support isn't available in the assembler. 2020-04-15 Jakub Jelinek <jakub@redhat.com> PR target/93053 * configure.ac (LIBGCC_CHECK_AS_LSE): Add HAVE_AS_LSE checking. * config/aarch64/lse.S: Include auto-target.h, if HAVE_AS_LSE is not defined, use just .arch armv8-a. (B, M, N, OPN): Define. (COMMENT): New .macro. (CAS, CASP, SWP, LDOP): Use .inst directive if HAVE_AS_LSE is not defined. Otherwise, move the operands right after the glue? and comment out operands where the macros are used. * configure: Regenerated. * config.in: Regenerated.
2020-04-03S/390 zTPF: Handle skip trace addresses when unwindingJim Johnston1-57/+75
Check for and handle new skip trace addresses when unwinding on zTPF. libgcc/ChangeLog: 2020-04-03 Jim Johnston <jjohnst@us.ibm.com> * config/s390/tpf-unwind.h (MIN_PATRANGE, MAX_PATRANGE) (TPFRA_OFFSET): Macros removed. (CP_CNF, cinfc_fast, CINFC_CMRESET, CINTFC_CMCENBKST) (CINTFC_CMCENBKED, ICST_CRET, ICST_SRET, LOWCORE_PAGE3_ADDR) (PG3_SKIPPING_OFFSET): New macros. (__isPATrange): Use cinfc_fast for the check. (__isSkipResetAddr): New function. (s390_fallback_frame_state): Check for skip trace addresses. Use either ICST_CRET or ICST_SRET to calculate return address location. (__tpf_eh_return): Handle skip trace addresses.
2020-03-26arm: unified syntax for libgcc when built with -Os [PR94220]Richard Earnshaw1-16/+17
The recent patch to convert all thumb1 code in libgcc to unified syntax ommitted the conditional code that is used only when building the library for minimal size. This patch fixes this case. I've also fixed the COND macro so that a single definition is always used that is for unified syntax. This eliminates a warning that is now being seen from the assembler when compiling the ieee fp support code. PR target/94220 * config/arm/lib1funcs.asm (COND): Use a single definition for unified syntax. (aeabi_uidivmod): Unified syntax when optimizing Thumb for size. (aeabi_idivmod): Likewise. (divsi3_skip_div0_test): Likewise.
2020-03-17[GCC][PATCH][ARM] Add multilib mapping for Armv8.1-M+MVE with -mfloat-abi=hardMihail Ionescu1-0/+3
This patch adds a new multilib for armv8.1-m.main+mve with hard float abi. For armv8.1-m.main+mve soft and softfp, the v8-M multilibs will be reused. The following mappings are also updated: "-mfloat-abi=hard -march=armv8.1-m.main+mve.fp -> armv8-m.main+fp/hard" "-mfloat-abi=softfp -march=armv8.1-m.main+mve.fp -> armv8-m.main+fp/softfp" "-mfloat-abi=soft -march=armv8.1-m.main+mve.fp -> armv8-m.main/nofp" gcc/ChangeLog: 2020-03-17 Mihail Ionescu <mihail.ionescu@arm.com> * config/arm/t-rmprofile: create new multilib for armv8.1-m.main+mve hard float and reuse v8-m.main ones for v8.1-m.main+mve . gcc/testsuite/ChangeLog: 2020-03-17 Mihail Ionescu <mihail.ionescu@arm.com> * gcc.target/arm/multilib.exp: Add new v8.1-M entry. libgcc/ChangLog: 2020-03-17 Mihail Ionescu <mihail.ionescu@arm.com> * config/arm/t-arm: Do not compile cmse_nonsecure_call.S for v8.1-m.
2020-03-04IBM Z: zTPF: Build libgcc with -mtpf-trace-skipAndreas Krebbel1-0/+7
libgcc is supposed to be built with the trace skip flags and branch targets. Add a zTPF header file fragment and add the -mtpf-trace-skip option. libgcc/ChangeLog: 2020-03-04 Andreas Krebbel <krebbel@linux.ibm.com> * config.host: Include the new makefile fragment. * config/s390/t-tpf: New file.
2020-03-03libgcc: arm: convert thumb1 code to unified syntaxRichard Earnshaw3-277/+296
Unified syntax has been the official syntax for thumb1 assembly for over 10 years now. It's time we made preparations for that becoming the default in the assembler. But before we can start doing that we really need to clean up some laggards from the olden days. Libgcc support for thumb1 is one such example. This patch converts all of the legacy (disjoint) syntax that I could find over to unified code. The identification was done by using a trick version of gas that defaulted to unified mode which then faults if legacy syntax is encountered. The code produced was then compared against the old code to check for differences. One such difference does exist, but that is because in unified syntax 'movs rd, rn' is encoded as 'lsls rd, rn, #0', rather than 'adds rd, rn, #0'; but that is a deliberate change that was introduced because the lsls encoding more closely reflects the behaviour of 'movs' in arm state (where only some of the condition flags are modified). * config/arm/bpabi-v6m.S (aeabi_lcmp): Convert thumb1 code to unified syntax. (aeabi_ulcmp, aeabi_ldivmod, aeabi_uldivmod): Likewise. (aeabi_frsub, aeabi_cfcmpeq, aeabi_fcmpeq): Likewise. (aeabi_fcmp, aeabi_drsub, aeabi_cdrcmple): Likewise. (aeabi_cdcmpeq, aeabi_dcmpeq, aeabi_dcmp): Likewise. * config/arm/lib1funcs.S (Lend_fde): Convert thumb1 code to unified syntax. (divsi3, modsi3): Likewise. (clzdi2, ctzsi2): Likewise. * config/arm/libunwind.S (restore_core_regs): Convert thumb1 code to unified syntax. (UNWIND_WRAPPER): Likewise.
2020-02-10Fix libgcc build failure for FRV with recent versions of gas.Jeff Law2-4/+4
* config/frv/frvbegin.c: Use right flags for .ctors and .dtors sections. * config/frv/frvend.c: Similarly.
2020-02-10i386: Properly pop restore token in signal frameH.J. Lu1-0/+43
Linux CET kernel places a restore token on shadow stack for signal handler to enhance security. The restore token is 8 byte and aligned to 8 bytes. It is usually transparent to user programs since kernel will pop the restore token when signal handler returns. But when an exception is thrown from a signal handler, now we need to pop the restore token from shadow stack. For x86-64, we just need to treat the signal frame as normal frame. For i386, we need to search for the restore token to check if the original shadow stack is 8 byte aligned. If the original shadow stack is 8 byte aligned, we just need to pop 2 slots, one restore token, from shadow stack. Otherwise, we need to pop 3 slots, one restore token + 4 byte padding, from shadow stack. This patch also includes 2 tests, one has a restore token with 4 byte padding and one without. Tested on Linux/x86-64 CET machine with and without -m32. libgcc/ PR libgcc/85334 * config/i386/shadow-stack-unwind.h (_Unwind_Frames_Increment): New. gcc/testsuite/ PR libgcc/85334 * g++.target/i386/pr85334-1.C: New test. * g++.target/i386/pr85334-2.C: Likewise.
2020-02-07arm: Fix up arm installed unwind.h for use in pedantic modes [PR93615]Jakub Jelinek1-9/+5
As the following testcase shows, unwind.h on ARM can't be (starting with GCC 10) compiled with -std=c* modes, only -std=gnu* modes. The problem is it uses asm keyword, which isn't a keyword in those modes (system headers vs. non-system ones don't make a difference here). glibc and other installed headers use __asm or __asm__ keywords instead that work fine in both standard and gnu modes. While there, as it is an installed header, I think it is also wrong to completely ignore any identifier namespace rules. The generic unwind.h defines just _Unwind* namespace identifiers plus _sleb128_t/_uleb128_t (but e.g. unlike libstdc++/glibc headers doesn't uglify operand names), the ARM unwind.h is much worse here. I've just changed the gnu_Unwind_Find_got function at least not be in user identifier namespace, but perhaps it would be good to go further and rename e.g. or e.g. typedef _Unwind_Reason_Code (*personality_routine) (_Unwind_State, _Unwind_Control_Block *, _Unwind_Context *); in unwind-arm-common.h. 2020-02-07 Jakub Jelinek <jakub@redhat.com> PR target/93615 * config/arm/unwind-arm.h (gnu_Unwind_Find_got): Rename to ... (_Unwind_gnu_Find_got): ... this. Use __asm instead of asm. Remove trailing :s in asm. Formatting fixes. (_Unwind_decode_typeinfo_ptr): Adjust caller. * gcc.dg/pr93615.c: New test.
2020-01-31nios2: Support for GOT-relative DW_EH_PE_datarel encoding.Sandra Loosemore1-0/+24
On nios2-linux-gnu, there has been a long-standing bug in C++ exception handling that sometimes resulted in link errors like ../nios2-linux-gnu/bin/ld: FDE encoding in /tmp/cccfpQ2l.o(.eh_frame) prevents .eh_frame_hdr table being created when building some shared libraries or PIE executables. The root of the problem is that GCC was incorrectly emitting an absolute encoding in EH tables for PIC. This patch changes it to use either DW_EH_PE_indirect (for global) or DW_EH_PE_datarel (for local), and fixes libgcc so it can find the address of the GOT as the base address for DW_EH_PE_datarel. Complicating matters somewhat, GAS was missing support for %gotoff(symbol) relocation syntax. I have just pushed a fix for that, but I've added a configure check to test for presence of the binutils support and fall back to the current absolute encoding (which works most of the time) if it is not available. Once the fix makes it into an official binutils release it might be appropriate to make this error out instead. Since this is a wrong-code bug and affects only nios2 target, I think this is appropriate for Stage 4. I regression-tested on both nios2-linux-gnu and nios2-elf, with and without the binutils support present, before committing this. 2020-01-31 Sandra Loosemore <sandra@codesourcery.com> gcc/ * configure.ac [nios2-*-*]: Check HAVE_AS_NIOS2_GOTOFF_RELOCATION. * config.in: Regenerated. * configure: Regenerated. * config/nios2/nios2.h (ASM_PREFERRED_EH_DATA_FORMAT): Fix handling for PIC when HAVE_AS_NIOS2_GOTOFF_RELOCATION. (ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX): New. gcc/testsuite/ * g++.target/nios2/hello-pie.C: New. * g++.target/nios2/nios2.exp: New. libgcc/ * config.host [nios2-*-linux*] (tmake_file, tm_file): Adjust. * config/nios2-elf-lib.h: New. * unwind-dw2-fde-dip.c (_Unwind_IteratePhdrCallback): Use existing code for finding GOT base for nios2.
2020-01-27[ARC] Make libgcc compatible with ARC's reduced register set config.Claudiu Zissulescu7-17/+120
ARC processors can work with a reduced register set (i.e. registers r4-r9 and r16-r25 are not available). This option can be enabled passing -mrf16 option to the compiler, or by using -mcpu=em_mini CPU configuration. Using RF16 config requires all the hand-made assembly files used in libgcc to have the corresponding RF16 object attribute set. This patch qualifies the relevant hand-made assembly files to RF16 config, and also adds generic c-functions for the one which are not. libgcc/ xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com> * config/arc/crti.S: Add RF16 object attribute. * config/arc/crtn.S: Likewise. * config/arc/crttls.S: Likewise. * config/arc/lib1funcs.S: Likewise. * config/arc/fp-hack.h (ARC_OPTFPE): Define. * config/arc/lib2funcs.c: New file. * config/arc/t-arc: Add lib2funcs to LIB2ADD.
2020-01-23Emit .note.GNU-stack for hard-float linux targets.Dragan Mladjenovic1-1/+1
libgcc/ChangeLog: 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com> * config/mips/gnustack.h: Check for TARGET_LIBC_GNUSTACK also. gcc/ChangeLog: 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com> * config.in: Regenerated. * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to 1 for TARGET_LIBC_GNUSTACK. * configure: Regenerated. * configure.ac: Define TARGET_LIBC_GNUSTACK if glibc version is found to be 2.31 or greater.
2020-01-23Emit .note.GNU-stack for soft-float linux targets.Dragan Mladjenovic5-0/+19
gcc/ChangeLog: 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com> * config/mips/linux.h (NEED_INDICATE_EXEC_STACK): Define to TARGET_SOFT_FLOAT. * config/mips/mips.c (TARGET_ASM_FILE_END): Define to ... (mips_asm_file_end): New function. Delegate to file_end_indicate_exec_stack if NEED_INDICATE_EXEC_STACK is true. * config/mips/mips.h (NEED_INDICATE_EXEC_STACK): Define to 0. libgcc/ChangeLog: 2020-01-23 Dragan Mladjenovic <dmladjenovic@wavecomp.com> * config/mips/gnustack.h: New file. * config/mips/crti.S: Include gnustack.h. * config/mips/crtn.S: Likewise. * config/mips/mips16.S: Likewise. * config/mips/vr4120-div.S: Likewise.
2020-01-18libgcc: cris: config/cris/arit.c (DS): Apply attribute __fallthrough__.Hans-Peter Nilsson1-1/+2
* config/cris/arit.c (DS): Apply attribute fallthrough. Without this, there are, for each compilation of arit.c, 30ish occurrences of "this statement may fall through [-Wimplicit-fallthrough=]", for lines that look like case 32: DS; case 31: DS; case 30: DS; case 29: DS;
2020-01-16[PATCH, GCC/ARM, 1/10] Fix -mcmse check in libgccMihail Ionescu1-1/+1
This patch is part of a patch series to add support for Armv8.1-M Mainline Security Extensions architecture. Code to detect whether cmse.c can be buit with -mcmse checks the output of host GCC when invoked with -mcmse. However, an error from the compiler does not prevent some minimal output so this always holds true. 2020-01-16 Mihail-Calin Ionescu <mihail.ionescu@arm.com> 2020-01-16 Thomas Preud'homme <thomas.preudhomme@arm.com> * config/arm/t-arm: Check return value of gcc rather than lack of output.
2020-01-14Typo.Georg-Johann Lay1-4/+0
libgcc/ * config/avr/lib1funcs.S (skip): Simplify.
2020-01-10[amdgcn] Remove dependency on stdint.h in libgccKwok Cheung Yeung1-3/+2
2020-01-10 Kwok Cheung Yeung <kcy@codesourcery.com> libgcc/ * config/gcn/atomic.c: Remove include of stdint.h. (__sync_val_compare_and_swap_##SIZE): Replace uintptr_t with __UINTPTR_TYPE__. From-SVN: r280152
2020-01-09[amdgcn] Add support for sub-word sync_compare_and_swap operationsKwok Cheung Yeung2-1/+62
2020-01-09 Kwok Cheung Yeung <kcy@codesourcery.com> libgcc/ * config/gcn/atomic.c: New. * config/gcn/t-amdgcn (LIB2ADD): Add atomic.c. From-SVN: r280055
2020-01-08Implement 64-bit double functions.Georg-Johann Lay19-0/+6936
gcc/ PR target/92055 * config.gcc (tm_defines) [target=avr]: Support --with-libf7, --with-double-comparison. * doc/install.texi: Document them. * config/avr/avr-c.c (avr_cpu_cpp_builtins) <WITH_LIBF7_LIBGCC, WITH_LIBF7_MATH, WITH_LIBF7_MATH_SYMBOLS> <WITH_DOUBLE_COMPARISON>: New built-in defines. * doc/invoke.texi (AVR Built-in Macros): Document them. * config/avr/avr-protos.h (avr_float_lib_compare_returns_bool): New. * config/avr/avr.c (avr_float_lib_compare_returns_bool): New function. * config/avr/avr.h (FLOAT_LIB_COMPARE_RETURNS_BOOL): New macro. libgcc/ PR target/92055 * config.host (tmake_file) [target=avr]: Add t-libf7, t-libf7-math, t-libf7-math-symbols as specified by --with-libf7=. * config/avr/t-avrlibc: Don't copy libgcc.a if there are modules depending on sizeof (double) or sizeof (long double). * config/avr/libf7: New folder. libgcc/config/avr/libf7/ PR target/92055 * t-libf7: New file. * t-libf7-math: New file. * t-libf7-math-symbols: New file. * libf7-common.mk: New file. * libf7-asm-object.mk: New file. * libf7-c-object.mk: New file. * asm-defs.h: New file. * libf7.h: New file. * libf7.c: New file. * libf7-asm.sx: New file. * libf7-array.def: New file. * libf7-const.def: New file. * libf7-constdef.h: New file. * f7renames.sh: New script. * f7wraps.sh: New script. * f7-renames.h: New generated file. * f7-wraps.h: New generated file. From-SVN: r279994
2020-01-05Guard inclusion of vxAtomicLib.h from gthr-vxworks.hOlivier Hainque1-0/+7
2020-01-05 Olivier Hainque <hainque@adacore.com> * config/gthr-vxworks.h: Guard #include vxAtomicLib.h by IN_LIBGCC2. From-SVN: r279885
2020-01-01Update copyright years.Jakub Jelinek988-989/+993
From-SVN: r279813
2019-12-30Introduce an internal API for VxWorks version checksOlivier Hainque2-13/+9
This changes introduces an internal API for VxWorks version checks within runtime files, a prerequisite to a few fixes coming up for libstdc++ builds on more recent versions of the OS. 2019-12-30 Olivier Hainque <hainque@adacore.com> gcc/ * config/vxworks/_vxworks-versions.h: New file. * config.gcc (*-*-vxworks*): Add it to extra_headers. libgcc/ * config/gthr-vxworks.h: Use _vxworks-versions.h. * config/gthr-vxworks-tls.c: Likewise. From-SVN: r279783
2019-12-30Improve VxWorks GTHREAD_ONCE_INITOlivier Hainque1-1/+1
2019-12-30 Olivier Hainque <hainque@adacore.com> * config/gthr-vxworks.h (GTHREAD_ONCE_INIT): Use standard zero-initializer syntax. From-SVN: r279776
2019-12-30Fix macro reference in gthr-vxworks-tls.cOlivier Hainque1-1/+1
2019-12-30 Olivier Hainque <hainque@adacore.com> libgcc/ * config/gthr-vxworks-tls.c (__gthread_getspecific): Fix reference to the internal VX_GET_TLS_DATA interface. From-SVN: r279775
2019-12-30Fix typo in macro name guarding conditional in vxcrtstuff.cOlivier Hainque1-2/+2
2019-12-30 Olivier Hainque <hainque@adacore.com> libgcc/ * config/vxcrtstuff.c: Fix incorrect spelling of USE_INITFINI_ARRAY in guard. From-SVN: r279774
2019-12-11MSP430: Add -fno-exceptions multilibJozef Lawrynowicz1-0/+6
ChangeLog: 2019-12-11 Jozef Lawrynowicz <jozef.l@mittosystems.com> * config-ml.in (msp430-*-*): Support --disable-no-exceptions configure flag. gcc/ChangeLog: 2019-12-11 Jozef Lawrynowicz <jozef.l@mittosystems.com> * config/msp430/msp430.h (STARTFILE_SPEC) [!fexceptions]: Use crtbegin_no_eh.o if building for the C language. [fno-exceptions]: Use crtbegin_no_eh.o if building for any language except C. (ENDFILE_SPEC) [!fexceptions]: Use crtend_no_eh.o if building for the C language. [fno-exceptions]: Use crtend_no_eh.o if building for any language except C. * config/msp430/t-msp430: Add -fno-exceptions multilib. * doc/install.texi: Document --disable-no-exceptions multilib configure option. * doc/sourcebuild.texi: Document exceptions_enabled effective target. gcc/testsuite/ChangeLog: 2019-12-11 Jozef Lawrynowicz <jozef.l@mittosystems.com> * lib/gcc-dg.exp: Add dg-prune messages for when exception handling is disabled. * lib/target-supports.exp (check_effective_target_exceptions_enabled): New. libgcc/ChangeLog: 2019-12-11 Jozef Lawrynowicz <jozef.l@mittosystems.com> * config.host: Add crt{begin,end}_no_eh.o to "extra_parts". * config.host (msp430*-*-elf): Add crt{begin,end}_no_eh.o to "extra_parts". From-SVN: r279246
2019-12-05re PR target/92055 ([avr] Support 64-bit double)Georg-Johann Lay1-2/+2
PR target/92055 * config/avr/t-avrlibc (MULTISUBDIR): Search for double, not double64. From-SVN: r278992
2019-11-18musl: Don't use gthr weak refs in libgcc PR91737Szabolcs Nagy1-0/+2
The gthr weak reference based single thread detection is unsafe with static linking and in case of dynamic linking it's ineffective on musl since pthread symbols are defined in libc.so. (Ideally this should be fixed for all targets, since glibc plans to move libpthread.so into libc.so too and users want to static link to pthread without --whole-archive: PR87189.) For now we have to explicitly opt out from the broken behaviour in the config machinery of each target lib and libgcc was previously missed. libgcc/ChangeLog: 2019-11-18 Szabolcs Nagy <szabolcs.nagy@arm.com> * config.host: Add t-gthr-noweak on *-*-musl*. * config/t-gthr-noweak: New file. From-SVN: r278399
2019-11-17linux-atomic.c (__kernel_cmpxchg): Change argument 1 to volatile void *.John David Anglin1-100/+110
* config/pa/linux-atomic.c (__kernel_cmpxchg): Change argument 1 to volatile void *. Remove trap check. (__kernel_cmpxchg2): Likewise. (FETCH_AND_OP_2): Adjust operand types. (OP_AND_FETCH_2): Likewise. (FETCH_AND_OP_WORD): Likewise. (OP_AND_FETCH_WORD): Likewise. (COMPARE_AND_SWAP_2): Likewise. (__sync_val_compare_and_swap_4): Likewise. (__sync_bool_compare_and_swap_4): Likewise. (SYNC_LOCK_TEST_AND_SET_2): Likewise. (__sync_lock_test_and_set_4): Likewise. (SYNC_LOCK_RELEASE_1): Likewise. Use __kernel_cmpxchg2 for release. (__sync_lock_release_4): Adjust operand types. Use __kernel_cmpxchg for release. (__sync_lock_release_8): Remove. From-SVN: r278377
2019-11-15m68k: add musl supportSzabolcs Nagy1-1/+1
Add the dynamic linker name and fix a type name to use the public name instead of the glibc internal name. gcc/ChangeLog: 2019-11-15 Szabolcs Nagy <szabolcs.nagy@arm.com> * config/m68k/linux.h (MUSL_DYNAMIC_LINKER): Define. libgcc/ChangeLog: 2019-11-15 Szabolcs Nagy <szabolcs.nagy@arm.com> * config/m68k/linux-unwind.h (struct uw_ucontext): Use sigset_t instead of __sigset_t. From-SVN: r278312
2019-11-14Update the arm-*-vxworks* supportJerome Lambourg1-10/+55
2019-11-13 Jerome Lambourg <lambourg@adacore.com> Doug Rupp <rupp@adacore.com> Olivier Hainque <hainque@adacore.com> gcc/ * config.gcc: Collapse the arm-vxworks entries into a single arm-wrs-vxworks7* one, bpabi based. Update the default cpu from arm8 to armv7-a * config/arm/vxworks.h (CC1_SPEC): Simplify, knowing that we always use ARM_UNWIND_INFO. (DWARF2_UNWIND_INFO): Remove redefinition. (ARM_TARGET2_DWARF_FORMAT): Likewise. (VXWORKS_PERSONALITY): Define, to "llvm". (VXWORKS_EXTRA_LIBS_RTP): Define, to "-lllvm". libgcc/ * config.host: Collapse the arm-vxworks entries into a single arm-wrs-vxworks7* one. * config/arm/unwind-arm-vxworks.c: Update comments. Provide __gnu_Unwind_Find_exidx and a weak dummy __cxa_type_match for kernel modules, to be overriden by libstdc++ when we link with it. Rely on externally provided __exidx_start/end. Co-Authored-By: Doug Rupp <rupp@adacore.com> Co-Authored-By: Olivier Hainque <hainque@adacore.com> From-SVN: r278253
2019-11-14Update the libgcc support for VxWorks AE/653Olivier Hainque2-0/+24
2019-11-12 Olivier Hainque <hainque@adacore.com> libgcc/ * config/t-gthr-vxworksae: New file, add all the gthr-vxworks sources except the cxx0x support to LIB2ADDEH. We don't support cxx0x on AE/653. * config/t-vxworksae: New file. * config.host: Handle *-*-vxworksae: Add the two aforementioned Makefile fragment files at their expected position in the tmake_file list, in accordance with what is done for other VxWorks variants. From-SVN: r278250
2019-11-14Improve the thread support for VxWorksCorentin Gay9-219/+789
2019-11-12 Corentin Gay <gay@adacore.com> Jerome Lambourg <lambourg@adacore.com> Olivier Hainque <hainque@adacore.com> libgcc/ * config/t-gthr-vxworks: New file, add all the gthr-vxworks sources to LIB2ADDEH. * config/t-vxworks: Remove adjustments to LIB2ADDEH. * config/t-vxworks7: Likewise. * config.host: Append a block at the end of the file to add the t-gthr files to the tmake_file list for VxWorks after everything else. * config/vxlib.c: Rename as gthr-vxworks.c. * config/vxlib-tls.c: Rename as gthr-vxworks-tls.c. * config/gthr-vxworks.h: Simplify a few comments. Expose a TAS API and a basic error checking API, both internal. Simplify the __gthread_once_t type definition and initializers. Add sections for condition variables support and for the C++0x thread support, conditioned against Vx653 for the latter. * config/gthr-vxworks.c (__gthread_once): Simplify comments and implementation, leveraging the TAS internal API. * config/gthr-vxworks-tls.c: Introduce an internal TLS data access API, leveraging the general availability of TLS services in VxWorks7 post SR6xxx. (__gthread_setspecific, __gthread_setspecific): Use it. (tls_delete_hook): Likewise, and simplify the enter/leave dtor logic. * config/gthr-vxworks-cond.c: New file. GTHREAD_COND variable support based on VxWorks primitives. * config/gthr-vxworks-thread.c: New file. GTHREAD_CXX0X support based on VxWorks primitives. Co-Authored-By: Jerome Lambourg <lambourg@adacore.com> Co-Authored-By: Olivier Hainque <hainque@adacore.com> From-SVN: r278249
2019-11-14Introduce vxworks specific crtstuff supportJerome Lambourg2-0/+144
2019-11-06 Jerome Lambourg <lambourg@adacore.com> Olivier Hainque <hainque@adacore.com> libgcc/ * config/vxcrtstuff.c: New file. * config/t-vxcrtstuff: New Makefile fragment. * config.host: Append t-vxcrtstuff to the tmake_file list on all VxWorks ports using dwarf for table based EH. gcc/ * config/vx-common.h (USE_TM_CLONE_REGISTRY): Remove definition, pointless with a VxWorks specific version of crtstuff. (DWARF2_UNWIND_INFO): Conditionalize on !ARM_UNWIND_INFO. * config/vxworks.h (VX_CRTBEGIN_SPEC, VX_CRTEND_SPEC): New local macros, controlling the addition of vxworks specific crtstuff objects depending on the EH mechanism and kind of module being linked. (VXWORKS_STARTFILE_SPEC, VXWORKS_ENDFILE_SPEC): Use them. Co-Authored-By: Olivier Hainque <hainque@adacore.com> From-SVN: r278248
2019-11-07Support 64-bit double and 64-bit long double configurations.Georg-Johann Lay3-2/+50
gcc/ Support 64-bit double and 64-bit long double configurations. PR target/92055 * config.gcc (tm_defines) [avr]: Set from --with-double=, --with-long-double=. * config/avr/t-multilib: Remove. * config/avr/t-avr: Output of genmultilib.awk is now fully dynamically generated and no more part of the repo. (HAVE_DOUBLE_MULTILIB, HAVE_LONG_DOUBLE_MULTILIB): New variables. Pass them down to... * config/avr/genmultilib.awk: ...here and handle them. * gcc/config/avr/avr.opt (-mdouble=, avr_double). New option and var. (-mlong-double=, avr_long_double). New option and var. * common/config/avr/avr-common.c (opts.h, diagnostic.h): Include. (TARGET_OPTION_OPTIMIZATION_TABLE) <-mdouble=, -mlong-double=>: Set default as requested by --with-double= (TARGET_HANDLE_OPTION): Define to this... (avr_handle_option): ...new hook worker. * config/avr/avr.h (DOUBLE_TYPE_SIZE): Define to avr_double. (LONG_DOUBLE_TYPE_SIZE): Define to avr_long_double. (avr_double_lib): New proto for spec function. (EXTRA_SPEC_FUNCTIONS) <double-lib>: Add. (DRIVER_SELF_SPECS): Call %:double-lib. * config/avr/avr.c (avr_option_override): Assert sizeof(long double) >= sizeof(double) for the target. * config/avr/avr-c.c (avr_cpu_cpp_builtins) [__HAVE_DOUBLE_MULTILIB__, __HAVE_LONG_DOUBLE_MULTILIB__] [__HAVE_DOUBLE64__, __HAVE_DOUBLE32__, __DEFAULT_DOUBLE__=] [__HAVE_LONG_DOUBLE64__, __HAVE_LONG_DOUBLE32__] [__HAVE_LONG_DOUBLE_IS_DOUBLE__, __DEFAULT_LONG_DOUBLE__=]: New built-in define depending on --with-double=, --with-long-double=. * config/avr/driver-avr.c (avr_double_lib): New spec function. * doc/invoke.tex (AVR Options) <-mdouble=,-mlong-double=>: Doc. * doc/install.texi (Cross-Compiler-Specific Options) <--with-double=, --with-long-double=>: Doc. libgcc/ Support 64-bit double and 64-bit long double configurations. PR target/92055 * config/avr/t-avr (HOST_LIBGCC2_CFLAGS): Only add -DF=SF if long double is a 32-bit type. * config/avr/t-avrlibc: Copy double64 and long-double64 multilib(s) from the vanilla one. * config/avr/t-copy-libgcc: New Makefile snip. From-SVN: r277908
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