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9 daysnon-gcc: Remove trailing whitespaceJakub Jelinek1-1/+1
I've tried to build stage3 with -Wleading-whitespace=blanks -Wtrailing-whitespace=blank -Wno-error=leading-whitespace=blanks -Wno-error=trailing-whitespace=blank added to STRICT_WARN and that expectably resulted in about 2744 unique trailing whitespace warnings and 124837 leading whitespace warnings when excluding *.md files (which obviously is in big part a generator issue). Others from that are generator related, I think those need to be solved later. The following patch just fixes up the easy case (trailing whitespace), which could be easily automated: for i in `find . -name \*.h -o -name \*.cc -o -name \*.c | xargs grep -l '[ ]$' | grep -v testsuite/`; do sed -i -e 's/[ ]*$//' $i; done I've excluded files which I knew are obviously generated or go FE. Is there anything else we'd want to avoid the changes? Due to patch size, I've split it between gcc/ part and rest (include/, libiberty/, libgcc/, libcpp/, libstdc++-v3/; this part). 2024-10-24 Jakub Jelinek <jakub@redhat.com> include/ * dyn-string.h: Remove trailing whitespace. * libiberty.h: Likewise. * xregex.h: Likewise. * splay-tree.h: Likewise. * partition.h: Likewise. * plugin-api.h: Likewise. * demangle.h: Likewise. * vtv-change-permission.h: Likewise. * fibheap.h: Likewise. * hsa_ext_image.h: Likewise. * hashtab.h: Likewise. * libcollector.h: Likewise. * sort.h: Likewise. * symcat.h: Likewise. * hsa_ext_amd.h: Likewise. libcpp/ * directives.cc: Remove trailing whitespace. * mkdeps.cc: Likewise. * line-map.cc: Likewise. * internal.h: Likewise. * files.cc: Likewise. * init.cc: Likewise. * makeucnid.cc: Likewise. * system.h: Likewise. * include/line-map.h: Likewise. * include/symtab.h: Likewise. * include/cpplib.h: Likewise. * expr.cc: Likewise. * charset.cc: Likewise. * macro.cc: Likewise. * errors.cc: Likewise. * lex.cc: Likewise. * traditional.cc: Likewise. libgcc/ * crtstuff.c: Remove trailing whitespace. * libgcov.h: Likewise. * config/alpha/crtfastmath.c: Likewise. * config/alpha/vms-gcc_shell_handler.c: Likewise. * config/alpha/vms-unwind.h: Likewise. * config/pa/linux-atomic.c: Likewise. * config/pa/linux-unwind.h: Likewise. * config/pa/quadlib.c: Likewise. * config/pa/fptr.c: Likewise. * config/s390/32/_fixsfdi.c: Likewise. * config/s390/32/_fixunssfdi.c: Likewise. * config/s390/32/_fixunsdfdi.c: Likewise. * config/c6x/pr-support.c: Likewise. * config/lm32/_udivsi3.c: Likewise. * config/lm32/libgcc_lm32.h: Likewise. * config/lm32/_udivmodsi4.c: Likewise. * config/lm32/_mulsi3.c: Likewise. * config/lm32/_modsi3.c: Likewise. * config/lm32/_umodsi3.c: Likewise. * config/lm32/_divsi3.c: Likewise. * config/darwin-crt3.c: Likewise. * config/msp430/mpy.c: Likewise. * config/ia64/tf-signs.c: Likewise. * config/ia64/fde-vms.c: Likewise. * config/ia64/unwind-ia64.c: Likewise. * config/ia64/vms-unwind.h: Likewise. * config/ia64/sfp-exceptions.c: Likewise. * config/ia64/quadlib.c: Likewise. * config/ia64/unwind-ia64.h: Likewise. * config/rl78/vregs.h: Likewise. * config/arm/bpabi.c: Likewise. * config/arm/unwind-arm.c: Likewise. * config/arm/pr-support.c: Likewise. * config/arm/linux-atomic.c: Likewise. * config/arm/bpabi-lib.h: Likewise. * config/frv/frvend.c: Likewise. * config/frv/cmovw.c: Likewise. * config/frv/frvbegin.c: Likewise. * config/frv/cmovd.c: Likewise. * config/frv/cmovh.c: Likewise. * config/aarch64/cpuinfo.c: Likewise. * config/i386/crtfastmath.c: Likewise. * config/i386/cygming-crtend.c: Likewise. * config/i386/32/tf-signs.c: Likewise. * config/i386/crtprec.c: Likewise. * config/i386/sfp-exceptions.c: Likewise. * config/i386/w32-unwind.h: Likewise. * config/m32r/initfini.c: Likewise. * config/sparc/crtfastmath.c: Likewise. * config/gcn/amdgcn_veclib.h: Likewise. * config/nios2/linux-atomic.c: Likewise. * config/nios2/linux-unwind.h: Likewise. * config/nios2/lib2-mul.c: Likewise. * config/nios2/lib2-nios2.h: Likewise. * config/xtensa/unwind-dw2-xtensa.c: Likewise. * config/rs6000/darwin-fallback.c: Likewise. * config/rs6000/ibm-ldouble.c: Likewise. * config/rs6000/sfp-machine.h: Likewise. * config/rs6000/darwin-asm.h: Likewise. * config/rs6000/darwin-crt2.c: Likewise. * config/rs6000/aix-unwind.h: Likewise. * config/rs6000/sfp-exceptions.c: Likewise. * config/gthr-vxworks.c: Likewise. * config/riscv/atomic.c: Likewise. * config/visium/memcpy.c: Likewise. * config/darwin-crt-tm.c: Likewise. * config/stormy16/lib2funcs.c: Likewise. * config/arc/ieee-754/divtab-arc-sf.c: Likewise. * config/arc/ieee-754/divtab-arc-df.c: Likewise. * config/arc/initfini.c: Likewise. * config/sol2/gmon.c: Likewise. * config/microblaze/divsi3_table.c: Likewise. * config/m68k/fpgnulib.c: Likewise. * libgcov-driver.c: Likewise. * unwind-dw2.c: Likewise. * fp-bit.c: Likewise. * dfp-bit.h: Likewise. * dfp-bit.c: Likewise. * libgcov-driver-system.c: Likewise. libgcc/config/libbid/ * _le_td.c: Remove trailing whitespace. * bid128_compare.c: Likewise. * bid_div_macros.h: Likewise. * bid64_to_bid128.c: Likewise. * bid64_to_uint32.c: Likewise. * bid128_to_uint64.c: Likewise. * bid64_div.c: Likewise. * bid128_round_integral.c: Likewise. * bid_binarydecimal.c: Likewise. * bid128_string.c: Likewise. * bid_flag_operations.c: Likewise. * bid128_to_int64.c: Likewise. * _mul_sd.c: Likewise. * bid64_mul.c: Likewise. * bid128_noncomp.c: Likewise. * _gt_dd.c: Likewise. * bid64_add.c: Likewise. * bid64_string.c: Likewise. * bid_from_int.c: Likewise. * bid128.c: Likewise. * _ge_dd.c: Likewise. * _ne_sd.c: Likewise. * _dd_to_td.c: Likewise. * _unord_sd.c: Likewise. * bid64_to_uint64.c: Likewise. * _gt_sd.c: Likewise. * _sd_to_td.c: Likewise. * _addsub_td.c: Likewise. * _ne_td.c: Likewise. * bid_dpd.c: Likewise. * bid128_add.c: Likewise. * bid128_next.c: Likewise. * _lt_sd.c: Likewise. * bid64_next.c: Likewise. * bid128_mul.c: Likewise. * _lt_dd.c: Likewise. * _ge_td.c: Likewise. * _unord_dd.c: Likewise. * bid64_sqrt.c: Likewise. * bid_sqrt_macros.h: Likewise. * bid64_fma.c: Likewise. * _sd_to_dd.c: Likewise. * bid_conf.h: Likewise. * bid64_noncomp.c: Likewise. * bid_gcc_intrinsics.h: Likewise. * _gt_td.c: Likewise. * _ge_sd.c: Likewise. * bid128_minmax.c: Likewise. * bid128_quantize.c: Likewise. * bid32_to_bid64.c: Likewise. * bid_round.c: Likewise. * _td_to_sd.c: Likewise. * bid_inline_add.h: Likewise. * bid128_fma.c: Likewise. * _eq_td.c: Likewise. * bid32_to_bid128.c: Likewise. * bid64_rem.c: Likewise. * bid128_2_str_tables.c: Likewise. * _mul_dd.c: Likewise. * _dd_to_sd.c: Likewise. * bid128_div.c: Likewise. * _lt_td.c: Likewise. * bid64_compare.c: Likewise. * bid64_to_int32.c: Likewise. * _unord_td.c: Likewise. * bid128_rem.c: Likewise. * bid_internal.h: Likewise. * bid64_to_int64.c: Likewise. * _eq_dd.c: Likewise. * _td_to_dd.c: Likewise. * bid128_to_int32.c: Likewise. * bid128_to_uint32.c: Likewise. * _ne_dd.c: Likewise. * bid64_quantize.c: Likewise. * _le_dd.c: Likewise. * bid64_round_integral.c: Likewise. * _le_sd.c: Likewise. * bid64_minmax.c: Likewise. libgcc/config/avr/libf7/ * f7-renames.h: Remove trailing whitespace. libstdc++-v3/ * include/debug/debug.h: Remove trailing whitespace. * include/parallel/base.h: Likewise. * include/parallel/types.h: Likewise. * include/parallel/settings.h: Likewise. * include/parallel/multiseq_selection.h: Likewise. * include/parallel/partition.h: Likewise. * include/parallel/random_number.h: Likewise. * include/parallel/find_selectors.h: Likewise. * include/parallel/partial_sum.h: Likewise. * include/parallel/list_partition.h: Likewise. * include/parallel/search.h: Likewise. * include/parallel/algorithmfwd.h: Likewise. * include/parallel/random_shuffle.h: Likewise. * include/parallel/multiway_mergesort.h: Likewise. * include/parallel/sort.h: Likewise. * include/parallel/algobase.h: Likewise. * include/parallel/numericfwd.h: Likewise. * include/parallel/multiway_merge.h: Likewise. * include/parallel/losertree.h: Likewise. * include/bits/basic_ios.h: Likewise. * include/bits/stringfwd.h: Likewise. * include/bits/ostream_insert.h: Likewise. * include/bits/stl_heap.h: Likewise. * include/bits/unordered_map.h: Likewise. * include/bits/hashtable_policy.h: Likewise. * include/bits/stl_iterator_base_funcs.h: Likewise. * include/bits/valarray_before.h: Likewise. * include/bits/regex.h: Likewise. * include/bits/postypes.h: Likewise. * include/bits/stl_iterator.h: Likewise. * include/bits/localefwd.h: Likewise. * include/bits/stl_algo.h: Likewise. * include/bits/ios_base.h: Likewise. * include/bits/stl_function.h: Likewise. * include/bits/basic_string.h: Likewise. * include/bits/hashtable.h: Likewise. * include/bits/valarray_after.h: Likewise. * include/bits/char_traits.h: Likewise. * include/bits/gslice.h: Likewise. * include/bits/locale_facets_nonio.h: Likewise. * include/bits/mask_array.h: Likewise. * include/bits/specfun.h: Likewise. * include/bits/random.h: Likewise. * include/bits/slice_array.h: Likewise. * include/bits/valarray_array.h: Likewise. * include/tr1/float.h: Likewise. * include/tr1/functional_hash.h: Likewise. * include/tr1/math.h: Likewise. * include/tr1/hashtable_policy.h: Likewise. * include/tr1/stdio.h: Likewise. * include/tr1/complex.h: Likewise. * include/tr1/stdbool.h: Likewise. * include/tr1/stdarg.h: Likewise. * include/tr1/inttypes.h: Likewise. * include/tr1/fenv.h: Likewise. * include/tr1/stdlib.h: Likewise. * include/tr1/wchar.h: Likewise. * include/tr1/tgmath.h: Likewise. * include/tr1/limits.h: Likewise. * include/tr1/wctype.h: Likewise. * include/tr1/stdint.h: Likewise. * include/tr1/ctype.h: Likewise. * include/tr1/random.h: Likewise. * include/tr1/shared_ptr.h: Likewise. * include/ext/mt_allocator.h: Likewise. * include/ext/sso_string_base.h: Likewise. * include/ext/debug_allocator.h: Likewise. * include/ext/vstring_fwd.h: Likewise. * include/ext/pointer.h: Likewise. * include/ext/pod_char_traits.h: Likewise. * include/ext/malloc_allocator.h: Likewise. * include/ext/vstring.h: Likewise. * include/ext/bitmap_allocator.h: Likewise. * include/ext/pool_allocator.h: Likewise. * include/ext/type_traits.h: Likewise. * include/ext/ropeimpl.h: Likewise. * include/ext/codecvt_specializations.h: Likewise. * include/ext/throw_allocator.h: Likewise. * include/ext/extptr_allocator.h: Likewise. * include/ext/atomicity.h: Likewise. * include/ext/concurrence.h: Likewise. * include/c_compatibility/wchar.h: Likewise. * include/c_compatibility/stdint.h: Likewise. * include/backward/hash_fun.h: Likewise. * include/backward/binders.h: Likewise. * include/backward/hashtable.h: Likewise. * include/backward/auto_ptr.h: Likewise. * libsupc++/eh_arm.cc: Likewise. * libsupc++/unwind-cxx.h: Likewise. * libsupc++/si_class_type_info.cc: Likewise. * libsupc++/vec.cc: Likewise. * libsupc++/class_type_info.cc: Likewise. * libsupc++/vmi_class_type_info.cc: Likewise. * libsupc++/guard_error.cc: Likewise. * libsupc++/bad_typeid.cc: Likewise. * libsupc++/eh_personality.cc: Likewise. * libsupc++/atexit_arm.cc: Likewise. * libsupc++/pmem_type_info.cc: Likewise. * libsupc++/vterminate.cc: Likewise. * libsupc++/eh_terminate.cc: Likewise. * libsupc++/bad_cast.cc: Likewise. * libsupc++/exception_ptr.h: Likewise. * libsupc++/eh_throw.cc: Likewise. * libsupc++/bad_alloc.cc: Likewise. * libsupc++/nested_exception.cc: Likewise. * libsupc++/pointer_type_info.cc: Likewise. * libsupc++/pbase_type_info.cc: Likewise. * libsupc++/bad_array_new.cc: Likewise. * libsupc++/pure.cc: Likewise. * libsupc++/eh_exception.cc: Likewise. * libsupc++/bad_array_length.cc: Likewise. * libsupc++/cxxabi.h: Likewise. * libsupc++/guard.cc: Likewise. * libsupc++/eh_catch.cc: Likewise. * libsupc++/cxxabi_forced.h: Likewise. * libsupc++/tinfo.h: Likewise.
2024-10-17aarch64: libgcc: Use -WerrorChristophe Lyon1-0/+1
This patch adds -Werror to LIBGCC2_CFLAGS so that aarch64 can catch warnings during bootstrap, while not impacting other targets. The patch also adds -Wno-prio-ctor-dtor to avoid a warning when compiling lse_init.c libgcc/ * config/aarch64/t-aarch64: Always use -Werror -Wno-prio-ctor-dtor.
2024-10-17aarch64: libgcc: add prototypes in cpuinfoChristophe Lyon1-0/+2
Add prototypes for __init_cpu_features_resolver and __init_cpu_features to avoid warnings due to -Wmissing-prototypes. libgcc/ * config/aarch64/cpuinfo.c (__init_cpu_features_resolver): Add prototype. (__init_cpu_features): Likewise.
2024-10-17aarch64: libgcc: Cleanup warnings in lse.SChristophe Lyon1-0/+4
Since Commit c608ada288ced0268bbbbc1fd4136f56c34b24d4 Author: Zac Walker <zacwalker@microsoft.com> CommitDate: 2024-01-23 15:32:30 +0000 Ifdef `.hidden`, `.type`, and `.size` pseudo-ops for `aarch64-w64-mingw32` target lse.S includes aarch64-asm.h, leading to a conflicting definition of macro 'L': - in lse.S it expands to either '' or 'L' - in aarch64-asm.h it is used to generate .L ## label lse.S does not use the second, so this patch just undefines L after the inclusion of aarch64-asm.h. libgcc/ * config/aarch64/lse.S: Undefine L() macro.
2024-09-27aarch64: fix build failure on aarch64-none-elfMatthieu Longo1-1/+1
A previous patch ([1]) introduced a build regression on aarch64-none-elf target. The changes were primarilly tested on aarch64-unknown-linux-gnu, so the issue was missed during development. The includes are slighly different between the two targets, and due to some include rules ([2]), "aarch64-unwind-def.h" was not found. [1]: https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=bdf41d627c13bc5f0dc676991f4513daa9d9ae36 [2]: https://gcc.gnu.org/onlinedocs/cpp/Include-Syntax.html > include "file" > ... It searches for a file named file first in the directory > containing the current file, ... libgcc/ChangeLog: * config/aarch64/aarch64-unwind.h: Fix header path.
2024-09-23dwarf2: add hooks for architecture-specific CFIsMatthieu Longo1-2/+2
Architecture-specific CFI directives are currently declared an processed among others architecture-independent CFI directives in gcc/dwarf2* files. This approach creates confusion, specifically in the case of DWARF instructions in the vendor space and using the same instruction code. Such a clash currently happen between DW_CFA_GNU_window_save (used on SPARC) and DW_CFA_AARCH64_negate_ra_state (used on AArch64), and both having the same instruction code 0x2d. Then AArch64 compilers generates a SPARC CFI directive (.cfi_window_save) instead of .cfi_negate_ra_state, contrarilly to what is expected in [DWARF for the Arm 64-bit Architecture (AArch64)](https://github.com/ ARM-software/abi-aa/blob/main/aadwarf64/aadwarf64.rst). This refactoring does not solve completely the problem, but improve the situation by moving some of the processing of those directives (more specifically their output in the assembly) to the backend via 2 target hooks: - DW_CFI_OPRND1_DESC: parse the first operand of the directive (if any). - OUTPUT_CFI_DIRECTIVE: output the CFI directive as a string. Additionally, this patch also contains a renaming of an enum used for return address mangling on AArch64. gcc/ChangeLog: * config/aarch64/aarch64.cc (aarch64_output_cfi_directive): New hook for CFI directives. (aarch64_dw_cfi_oprnd1_desc): Same. (TARGET_OUTPUT_CFI_DIRECTIVE): Hook for output_cfi_directive. (TARGET_DW_CFI_OPRND1_DESC): Hook for dw_cfi_oprnd1_desc. * config/sparc/sparc.cc (sparc_output_cfi_directive): New hook for CFI directives. (sparc_dw_cfi_oprnd1_desc): Same. (TARGET_OUTPUT_CFI_DIRECTIVE): Hook for output_cfi_directive. (TARGET_DW_CFI_OPRND1_DESC): Hook for dw_cfi_oprnd1_desc. * coretypes.h (struct dw_cfi_node): Forward declaration of CFI type from gcc/dwarf2out.h. (enum dw_cfi_oprnd_type): Same. (enum dwarf_call_frame_info): Same. * doc/tm.texi: Regenerated from doc/tm.texi.in. * doc/tm.texi.in: Add doc for new target hooks. type of enum to allow forward declaration. * dwarf2cfi.cc (struct dw_cfi_row): Update the description for window_save and ra_mangled. (dwarf2out_frame_debug_cfa_negate_ra_state): Use AArch64 CFI directive instead of the SPARC one. (change_cfi_row): Use the right CFI directive's name for RA mangling. (output_cfi): Remove explicit architecture-specific CFI directive DW_CFA_GNU_window_save that falls into default case. (output_cfi_directive): Use target hook as default. * dwarf2out.cc (dw_cfi_oprnd1_desc): Use target hook as default. * dwarf2out.h (enum dw_cfi_oprnd_type): specify underlying type of enum to allow forward declaration. (dw_cfi_oprnd1_desc): Call target hook. (output_cfi_directive): Use dw_cfi_ref instead of struct dw_cfi_node *. * hooks.cc (hook_bool_dwcfi_dwcfioprndtyperef_false): New. (hook_bool_FILEptr_dwcfiptr_false): New. * hooks.h (hook_bool_dwcfi_dwcfioprndtyperef_false): New. (hook_bool_FILEptr_dwcfiptr_false): New. * target.def: Documentation for new hooks. include/ChangeLog: * dwarf2.h (enum dwarf_call_frame_info): specify underlying libffi/ChangeLog: * include/ffi_cfi.h (cfi_negate_ra_state): Declare AArch64 cfi directive. libgcc/ChangeLog: * config/aarch64/aarch64-asm.h (PACIASP): Replace SPARC CFI directive by AArch64 one. (AUTIASP): Same. libitm/ChangeLog: * config/aarch64/sjlj.S: Replace SPARC CFI directive by AArch64 one. gcc/testsuite/ChangeLog: * g++.target/aarch64/pr94515-1.C: Replace SPARC CFI directive by AArch64 one. * g++.target/aarch64/pr94515-2.C: Same.
2024-09-23libgcc: hide CIE and FDE data for DWARF architecture extensions behind a ↵Matthieu Longo2-9/+46
handler. This patch provides a new handler MD_ARCH_FRAME_STATE_T to hide an architecture-specific structure containing CIE and FDE data related to DWARF architecture extensions. Hiding the architecture-specific attributes behind a handler has the following benefits: 1. isolating those data from the generic ones in _Unwind_FrameState 2. avoiding casts to custom types. 3. preserving typing information when debugging with GDB, and so facilitating their printing. This approach required to add a new header md-unwind-def.h included at the top of libgcc/unwind-dw2.h, and redirecting to the corresponding architecture header via a symbolic link. An obvious drawback is the increase in complexity with macros, and headers. It also caused a split of architecture definitions between md-unwind-def.h (types definitions used in unwind-dw2.h) and md-unwind.h (local types definitions and handlers implementations). The naming of md-unwind.h with .h extension is a bit misleading as the file is only included in the middle of unwind-dw2.c. Changing this naming would require modification of others backends, which I prefered to abstain from. Overall the benefits are worth the added complexity from my perspective. libgcc/ChangeLog: * Makefile.in: New target for symbolic link to md-unwind-def.h * config.host: New parameter md_unwind_def_header. Set it to aarch64/aarch64-unwind-def.h for AArch64 targets, or no-unwind.h by default. * config/aarch64/aarch64-unwind.h (aarch64_pointer_auth_key): Move to aarch64-unwind-def.h (aarch64_cie_aug_handler): Update. (aarch64_arch_extension_frame_init): Update. (aarch64_demangle_return_addr): Update. * configure.ac: New substitute variable md_unwind_def_header. * unwind-dw2.h (defined): MD_ARCH_FRAME_STATE_T. * config/aarch64/aarch64-unwind-def.h: New file. * configure: Regenerate. * config/no-unwind.h: Updated comment
2024-09-23aarch64: skip copy of RA state register into target contextMatthieu Longo1-0/+11
The RA state register is local to a frame, so it should not be copied to the target frame during the context installation. This patch adds a new backend handler that check whether a register needs to be skipped or not before its installation. libgcc/ChangeLog: * config/aarch64/aarch64-unwind.h (MD_FRAME_LOCAL_REGISTER_P): new handler checking whether a register from the current context needs to be skipped before installation into the target context. (aarch64_frame_local_register): Likewise. * unwind-dw2.c (uw_install_context_1): use MD_FRAME_LOCAL_REGISTER_P.
2024-09-23aarch64: store signing key and signing method in DWARF _Unwind_FrameStateMatthieu Longo1-26/+119
This patch is only a refactoring of the existing implementation of PAuth and returned-address signing. The existing behavior is preserved. _Unwind_FrameState already contains several CIE and FDE information (see the attributes below the comment "The information we care about from the CIE/FDE" in libgcc/unwind-dw2.h). The patch aims at moving the information from DWARF CIE (signing key stored in the augmentation string) and FDE (the used signing method) into _Unwind_FrameState along the already-stored CIE and FDE information. Note: those information have to be saved in frame_state_reg_info instead of _Unwind_FrameState as they need to be savable by DW_CFA_remember_state and restorable by DW_CFA_restore_state, that both rely on the attribute "prev". Those new information in _Unwind_FrameState simplifies the look-up of the signing key when the return address is demangled. It also allows future signing methods to be easily added. _Unwind_FrameState is not a part of the public API of libunwind, so the change is backward compatible. A new architecture-specific handler MD_ARCH_EXTENSION_FRAME_INIT allows to reset values (if needed) in the frame state and unwind context before changing the frame state to the caller context. A new architecture-specific handler MD_ARCH_EXTENSION_CIE_AUG_HANDLER isolates the architecture-specific augmentation strings in AArch64 backend, and allows others architectures to reuse augmentation strings that would have clashed with AArch64 DWARF extensions. aarch64_demangle_return_addr, DW_CFA_AARCH64_negate_ra_state and DW_CFA_val_expression cases in libgcc/unwind-dw2-execute_cfa.h were documented to clarify where the value of the RA state register is stored (FS and CONTEXT respectively). libgcc/ChangeLog: * config/aarch64/aarch64-unwind.h (AARCH64_DWARF_RA_STATE_MASK): The mask for RA state register. (aarch64_ra_signing_method_t): The diversifiers used to sign a function's return address. (aarch64_pointer_auth_key): The key used to sign a function's return address. (aarch64_cie_signed_with_b_key): Deleted as the signing key is available now in _Unwind_FrameState. (MD_ARCH_EXTENSION_CIE_AUG_HANDLER): New CIE augmentation string handler for architecture extensions. (MD_ARCH_EXTENSION_FRAME_INIT): New architecture-extension initialization routine for DWARF frame state and context before execution of DWARF instructions. (aarch64_context_ra_state_get): Read RA state register from CONTEXT. (aarch64_ra_state_get): Read RA state register from FS. (aarch64_ra_state_set): Write RA state register into FS. (aarch64_ra_state_toggle): Toggle RA state register in FS. (aarch64_cie_aug_handler): Handler AArch64 augmentation strings. (aarch64_arch_extension_frame_init): Initialize defaults for the signing key (PAUTH_KEY_A), and RA state register (RA_no_signing). (aarch64_demangle_return_addr): Rely on the frame registers and the signing_key attribute in _Unwind_FrameState. * unwind-dw2-execute_cfa.h: Use the right alias DW_CFA_AARCH64_negate_ra_state for __aarch64__ instead of DW_CFA_GNU_window_save. (DW_CFA_AARCH64_negate_ra_state): Save the signing method in RA state register. Toggle RA state register without resetting 'how' to REG_UNSAVED. * unwind-dw2.c: (extract_cie_info): Save the signing key in the current _Unwind_FrameState while parsing the augmentation data. (uw_frame_state_for): Reset some attributes related to architecture extensions in _Unwind_FrameState. (uw_update_context): Move authentication code to AArch64 unwinding. * unwind-dw2.h (enum register_rule): Give a name to the existing enum for the register rules, and replace 'unsigned char' by 'enum register_rule' to facilitate debugging in GDB. (_Unwind_FrameState): Add a new architecture-extension attribute to store the signing key.
2024-06-10libgcc/aarch64: also provide AT_HWCAP2 fallbackJan Beulich1-0/+3
Much like AT_HWCAP is already provided in case the platform headers don't have the value (yet). libgcc/ * config/aarch64/cpuinfo.c: Provide AT_HWCAP2.
2024-06-05AArch64: Fix cpu features initialization [PR115342]Wilco Dijkstra1-106/+75
The CPU features initialization code uses CPUID registers (rather than HWCAP). The equality comparisons it uses are incorrect: for example FEAT_SVE is not set if SVE2 is available. Using HWCAPs for these is both simpler and correct. The initialization must also be done atomically to avoid multiple threads causing corruption due to non-atomic RMW accesses to the global. libgcc: PR target/115342 * config/aarch64/cpuinfo.c (__init_cpu_features_constructor): Use HWCAP where possible. Use atomic write for initialization. Fix FEAT_PREDRES comparison. (__init_cpu_features_resolver): Use atomic load for correct initialization. (__init_cpu_features): Likewise.
2024-05-07Add aarch64-w64-mingw32 target to libgccZac Walker1-0/+2
Reuse MinGW definitions from i386 for libgcc. Move reused files to libgcc/config/mingw folder. libgcc/ChangeLog: * config.host: Add aarch64-w64-mingw32 target. Adjust targets after moving MinGW files. * config/i386/t-gthr-win32: Move to... * config/mingw/t-gthr-win32: ...here. * config/i386/t-mingw-pthread: Move to... * config/mingw/t-mingw-pthread: ...here. * config/aarch64/t-no-eh: New file. EH is not yet implemented for the target, and the default definition should be disabled.
2024-04-10aarch64: Add support for _BitIntAndre Vieira2-1/+10
This patch adds support for C23's _BitInt for the AArch64 port when compiling for little endianness. Big Endianness requires further target-agnostic support and we therefor disable it for now. gcc/ChangeLog: * config/aarch64/aarch64.cc (TARGET_C_BITINT_TYPE_INFO): Declare MACRO. (aarch64_bitint_type_info): New function. (aarch64_return_in_memory_1): Return large _BitInt's in memory. (aarch64_function_arg_alignment): Adapt to correctly return the ABI mandated alignment of _BitInt(N) where N > 128 as the alignment of TImode. (aarch64_composite_type_p): Return true for _BitInt(N), where N > 128. libgcc/ChangeLog: * config/aarch64/t-softfp (softfp_extras): Add floatbitinthf, floatbitintbf, floatbitinttf and fixtfbitint. * config/aarch64/libgcc-softfp.ver (GCC_14.0.0): Add __floatbitinthf, __floatbitintbf, __floatbitinttf and __fixtfbitint. gcc/testsuite/ChangeLog: * gcc.target/aarch64/bitint-alignments.c: New test. * gcc.target/aarch64/bitint-args.c: New test. * gcc.target/aarch64/bitint-sizes.c: New test. * gcc.target/aarch64/bitfield-bitint-abi.h: New header. * gcc.target/aarch64/bitfield-bitint-abi-align16.c: New test. * gcc.target/aarch64/bitfield-bitint-abi-align8.c: New test.
2024-04-09libgcc: Add basic support for aarch64-gnu (GNU/Hurd on AArch64)Sergey Bugaev2-2/+38
There is currently no unwinding implementation. libgcc/ChangeLog: * config.host: Recognize aarch64*-*-gnu* hosts. * config/aarch64/gnu-unwind.h: New file. * config/aarch64/heap-trampoline.c (allocate_trampoline_page): Support GNU/Hurd. Signed-off-by: Sergey Bugaev <bugaevc@gmail.com>
2024-04-03libgcc: Add missing HWCAP entries to aarch64/cpuinfo.cWilco Dijkstra1-3/+15
A few HWCAP entries are missing from aarch64/cpuinfo.c. This results in build errors on older machines. libgcc/ * config/aarch64/cpuinfo.c: Add HWCAP_EVTSTRM, HWCAP_CRC32, HWCAP_CPUID, HWCAP_PACA and HWCAP_PACG.
2024-02-21libgcc, aarch64: Allow for BE platforms in heap trampolines.Iain Sandoe1-15/+15
This arranges that the byte order of the instruction sequences is independent of the byte order of memory. libgcc/ChangeLog: * config/aarch64/heap-trampoline.c (aarch64_trampoline_insns): Arrange to encode instructions as a byte array so that the order is independent of memory byte order. (struct aarch64_trampoline): Likewise. Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
2024-02-20aarch64: Allow aarch64-linux-muscl for heap trampolines [PR113971].Iain Sandoe1-2/+2
This allows the same trampoline pattern to be used on all linux variants rather than restricting it to linux gnu. PR target/113971 libgcc/ChangeLog: * config/aarch64/heap-trampoline.c: Allow all linux variants. Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
2024-02-01libgcc: Avoid warnings on __gcc_nested_func_ptr_created [PR113402]Jakub Jelinek1-3/+3
I'm seeing hundreds of In file included from ../../../libgcc/libgcc2.c:56: ../../../libgcc/libgcc2.h:32:13: warning: conflicting types for built-in function ‘__gcc_nested_func_ptr_created’; expected ‘void(void *, void *, void *)’ +[-Wbuiltin-declaration-mismatch] 32 | extern void __gcc_nested_func_ptr_created (void *, void *, void **); | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~ warnings. Either we need to add like in r14-6218 #pragma GCC diagnostic ignored "-Wbuiltin-declaration-mismatch" (but in that case because of the libgcc2.h prototype (why is it there?) it would need to be also with #pragma GCC diagnostic push/pop around), or we could go with just following how the builtins are prototyped on the compiler side and only cast to void ** when dereferencing (which is in a single spot in each TU). 2024-02-01 Jakub Jelinek <jakub@redhat.com> PR libgcc/113402 * libgcc2.h (__gcc_nested_func_ptr_created): Change type of last argument from void ** to void *. * config/i386/heap-trampoline.c (__gcc_nested_func_ptr_created): Change type of dst from void ** to void * and cast dst to void ** before dereferencing it. * config/aarch64/heap-trampoline.c (__gcc_nested_func_ptr_created): Likewise.
2024-02-01aarch64: libgcc: Cleanup ELF marking in asmSzabolcs Nagy3-51/+1
Use aarch64-asm.h in asm code consistently, this was started in commit c608ada288ced0268bbbbc1fd4136f56c34b24d4 Author: Zac Walker <zacwalker@microsoft.com> CommitDate: 2024-01-23 15:32:30 +0000 Ifdef `.hidden`, `.type`, and `.size` pseudo-ops for `aarch64-w64-mingw32` target But that commit failed to remove some existing markings from asm files, which means some objects got double marked with gnu property notes. libgcc/ChangeLog: * config/aarch64/crti.S: Remove stack marking. * config/aarch64/crtn.S: Remove stack marking, include aarch64-asm.h * config/aarch64/lse.S: Remove stack and GNU property markings.
2024-01-30libgcc: Make heap trampoline support dynamic [PR113403].Iain Sandoe1-0/+8
In order to handle system security constraints during GCC build and test and that most platform versions cannot link to libgcc_eh since the unwinder there is incompatible with the system one. 1. We make the support functions weak definitions. 2. We include them as a CRT for platform conditions that do not allow libgcc_eh. 3. We ensure that the weak symbols are exported from DSOs (which includes exes on Darwin) so that the dynamic linker will pick one instance (which avoids duplication of trampoline caches). PR libgcc/113403 gcc/ChangeLog: * config/darwin.h (DARWIN_SHARED_WEAK_ADDS, DARWIN_WEAK_CRTS): New. (REAL_LIBGCC_SPEC): Move weak CRT handling to separate spec. * config/i386/darwin.h (DARWIN_HEAP_T_LIB): New. * config/i386/darwin32-biarch.h (DARWIN_HEAP_T_LIB): New. * config/i386/darwin64-biarch.h (DARWIN_HEAP_T_LIB): New. * config/rs6000/darwin.h (DARWIN_HEAP_T_LIB): New. libgcc/ChangeLog: * config.host: Build libheap_t.a for i686/x86_64 Darwin. * config/aarch64/heap-trampoline.c (HEAP_T_ATTR): New. (allocate_tramp_ctrl): Allow a target to build this as a weak def. (__gcc_nested_func_ptr_created): Likewise. * config/i386/heap-trampoline.c (HEAP_T_ATTR): New. (allocate_tramp_ctrl): Allow a target to build this as a weak def. (__gcc_nested_func_ptr_created): Likewise. * config/t-darwin: Build libheap_t.a (a CRT with heap trampoline support).
2024-01-30libgcc: Make heap trampoline support dynamic [PR113403].Iain Sandoe1-1/+2
This removes the heap trampoline support functions from libgcc.a and adds them to libgcc_eh.a. They are also present in libgcc_s. PR libgcc/113403 libgcc/ChangeLog: * config/aarch64/t-heap-trampoline: Move the heap trampoline support functions from libgcc.a to libgcc_eh.a. * config/i386/t-heap-trampoline: Likewise.
2024-01-28Fix __builtin_nested_func_ptr_{created,deleted} symbol versions [PR113402]Iain Sandoe1-4/+4
The symbols for the functions supporting heap-based trampolines were exported at an incorrect symbol version, the following patch fixes that. As requested in the PR, this also renames __builtin_nested_func_ptr* to __gcc_nested_func_ptr*. In carrying our the rename, we move the builtins to use DEF_EXT_LIB_BUILTIN. PR libgcc/113402 gcc/ChangeLog: * builtins.cc (expand_builtin): Handle BUILT_IN_GCC_NESTED_PTR_CREATED and BUILT_IN_GCC_NESTED_PTR_DELETED. * builtins.def (BUILT_IN_GCC_NESTED_PTR_CREATED, BUILT_IN_GCC_NESTED_PTR_DELETED): Make these builtins LIB-EXT and rename the library fallbacks to __gcc_nested_func_ptr_created and __gcc_nested_func_ptr_deleted. * doc/invoke.texi: Rename these to __gcc_nested_func_ptr_created and __gcc_nested_func_ptr_deleted. * tree-nested.cc (finalize_nesting_tree_1): Use builtin_explicit for BUILT_IN_GCC_NESTED_PTR_CREATED and BUILT_IN_GCC_NESTED_PTR_DELETED. * tree.cc (build_common_builtin_nodes): Build the BUILT_IN_GCC_NESTED_PTR_CREATED and BUILT_IN_GCC_NESTED_PTR_DELETED local builtins only for non-explicit. libgcc/ChangeLog: * config/aarch64/heap-trampoline.c: Rename __builtin_nested_func_ptr_created to __gcc_nested_func_ptr_created and __builtin_nested_func_ptr_deleted to __gcc_nested_func_ptr_deleted. * config/i386/heap-trampoline.c: Likewise. * libgcc2.h: Likewise. * libgcc-std.ver.in (GCC_7.0.0): Likewise and then move __gcc_nested_func_ptr_created and __gcc_nested_func_ptr_deleted from this symbol version to ... (GCC_14.0.0): ... this one. Signed-off-by: Iain Sandoe <iain@sandoe.co.uk> Co-authored-by: Jakub Jelinek <jakub@redhat.com>
2024-01-23Ifdef `.hidden`, `.type`, and `.size` pseudo-ops for `aarch64-w64-mingw32` ↵Zac Walker6-20/+27
target Recent change (https://gcc.gnu.org/pipermail/gcc-cvs/2023-December/394915.html) added a generic SME support using `.hidden`, `.type`, and ``.size` pseudo-ops in the assembly sources, `aarch64-w64-mingw32` does not support the pseudo-ops though. This patch wraps usage of those pseudo-ops using macros and ifdefs them for `__ELF__` define. libgcc/ * config/aarch64/aarch64-asm.h (HIDDEN, SYMBOL_SIZE, SYMBOL_TYPE) (ENTRY_ALIGN, GNU_PROPERTY): New macros. * config/aarch64/__arm_sme_state.S: Use them. * config/aarch64/__arm_tpidr2_save.S: Likewise. * config/aarch64/__arm_za_disable.S: Likewise. * config/aarch64/crti.S: Likewise. * config/aarch64/lse.S: Likewise.
2024-01-03Update copyright years.Jakub Jelinek23-23/+23
2023-12-16[aarch64] Add function multiversioning supportAndrew Carlotti1-67/+2
This adds initial support for function multiversioning on aarch64 using the target_version and target_clones attributes. This loosely follows the Beta specification in the ACLE [1], although with some differences that still need to be resolved (possibly as follow-up patches). Existing function multiversioning implementations are broken in various ways when used across translation units. This includes placing resolvers in the wrong translation units, and using symbol mangling that callers to unintentionally bypass the resolver in some circumstances. Fixing these issues for aarch64 will require modifications to our ACLE specification. It will also require further adjustments to existing middle end code, to facilitate different mangling and resolver placement while preserving existing target behaviours. The list of function multiversioning features specified in the ACLE is also inconsistent with the list of features supported in target option extensions. I intend to resolve some or all of these inconsistencies at a later stage. The target_version attribute is currently only supported in C++, since this is the only frontend with existing support for multiversioning using the target attribute. On the other hand, this patch happens to enable multiversioning with the target_clones attribute in Ada and D, as well as the entire C family, using their existing frontend support. This patch also does not support the following aspects of the Beta specification: - The target_clones attribute should allow an implicit unlisted "default" version. - There should be an option to disable function multiversioning at compile time. - Unrecognised target names in a target_clones attribute should be ignored (with an optional warning). This current patch raises an error instead. [1] https://github.com/ARM-software/acle/blob/main/main/acle.md#function-multi-versioning gcc/ChangeLog: * config/aarch64/aarch64-feature-deps.h (fmv_deps_<FEAT_NAME>): Define aarch64_feature_flags mask foreach FMV feature. * config/aarch64/aarch64-option-extensions.def: Use new macros to define FMV feature extensions. * config/aarch64/aarch64.cc (aarch64_option_valid_attribute_p): Check for target_version attribute after processing target attribute. (aarch64_fmv_feature_data): New. (aarch64_parse_fmv_features): New. (aarch64_process_target_version_attr): New. (aarch64_option_valid_version_attribute_p): New. (get_feature_mask_for_version): New. (compare_feature_masks): New. (aarch64_compare_version_priority): New. (build_ifunc_arg_type): New. (make_resolver_func): New. (add_condition_to_bb): New. (dispatch_function_versions): New. (aarch64_generate_version_dispatcher_body): New. (aarch64_get_function_versions_dispatcher): New. (aarch64_common_function_versions): New. (aarch64_mangle_decl_assembler_name): New. (TARGET_OPTION_VALID_VERSION_ATTRIBUTE_P): New implementation. (TARGET_OPTION_EXPANDED_CLONES_ATTRIBUTE): New implementation. (TARGET_OPTION_FUNCTION_VERSIONS): New implementation. (TARGET_COMPARE_VERSION_PRIORITY): New implementation. (TARGET_GENERATE_VERSION_DISPATCHER_BODY): New implementation. (TARGET_GET_FUNCTION_VERSIONS_DISPATCHER): New implementation. (TARGET_MANGLE_DECL_ASSEMBLER_NAME): New implementation. * config/aarch64/aarch64.h (TARGET_HAS_FMV_TARGET_ATTRIBUTE): Set target macro. * config/arm/aarch-common.h (enum aarch_parse_opt_result): Add new value to report duplicate FMV feature. * common/config/aarch64/cpuinfo.h: New file. libgcc/ChangeLog: * config/aarch64/cpuinfo.c (enum CPUFeatures): Move to shared copy in gcc/common gcc/testsuite/ChangeLog: * gcc.target/aarch64/options_set_17.c: Reorder expected flags. * gcc.target/aarch64/cpunative/native_cpu_0.c: Ditto. * gcc.target/aarch64/cpunative/native_cpu_13.c: Ditto. * gcc.target/aarch64/cpunative/native_cpu_16.c: Ditto. * gcc.target/aarch64/cpunative/native_cpu_17.c: Ditto. * gcc.target/aarch64/cpunative/native_cpu_18.c: Ditto. * gcc.target/aarch64/cpunative/native_cpu_19.c: Ditto. * gcc.target/aarch64/cpunative/native_cpu_20.c: Ditto. * gcc.target/aarch64/cpunative/native_cpu_21.c: Ditto. * gcc.target/aarch64/cpunative/native_cpu_22.c: Ditto. * gcc.target/aarch64/cpunative/native_cpu_6.c: Ditto. * gcc.target/aarch64/cpunative/native_cpu_7.c: Ditto.
2023-12-16aarch64: Add cpu feature detection to libgccAndrew Carlotti2-0/+501
This is added to enable function multiversioning, but can also be used directly. The interface is chosen to match that used in LLVM's compiler-rt, to facilitate cross-compiler compatibility. The content of the patch is derived almost entirely from Pavel's prior contributions to compiler-rt/lib/builtins/cpu_model.c. I have made minor changes to align more closely with GCC coding style, and to exclude any code from other LLVM contributors, and am adding this to GCC with Pavel's approval. libgcc/ChangeLog: * config/aarch64/t-aarch64: Include cpuinfo.c * config/aarch64/cpuinfo.c: New file (__init_cpu_features_constructor) New. (__init_cpu_features_resolver) New. (__init_cpu_features) New. Co-authored-by: Pavel Iliin <Pavel.Iliin@arm.com>
2023-12-08libgcc: aarch64: Add SME unwinder supportSzabolcs Nagy2-0/+21
To support the ZA lazy save scheme, the PCS requires the unwinder to reset the SME state to PSTATE.SM=0, PSTATE.ZA=0, TPIDR2_EL0=0 on entry to an exception handler. We use the __arm_za_disable SME runtime call unconditionally to achieve this. https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst#exceptions The hidden alias is used to avoid a PLT and avoid inconsistent VPCS marking (we don't rely on special PCS at the call site). In case of static linking the SME runtime init code is linked in code that raises exceptions. libgcc/ChangeLog: * config/aarch64/__arm_za_disable.S: Add hidden alias. * config/aarch64/aarch64-unwind.h: Reset the SME state before EH return via the _Unwind_Frames_Extra hook.
2023-12-08libgcc: aarch64: Add SME runtime supportSzabolcs Nagy8-0/+517
The call ABI for SME (Scalable Matrix Extension) requires a number of helper routines which are added to libgcc so they are tied to the compiler version instead of the libc version. See https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst#sme-support-routines The routines are in shared libgcc and static libgcc eh, even though they are not related to exception handling. This is to avoid linking a copy of the routines into dynamic linked binaries, because TPIDR2_EL0 block can be extended in the future which is better to handle in a single place per process. The support routines have to decide if SME is accessible or not. Linux tells userspace if SME is accessible via AT_HWCAP2, otherwise a new __aarch64_sme_accessible symbol was introduced that a libc can define. Due to libgcc and libc build order, the symbol availability cannot be checked so for __aarch64_sme_accessible an unistd.h feature test macro is used while such detection mechanism is not available for __getauxval so we rely on configure checks based on the target triplet. Asm helper code is added to make writing the routines easier. libgcc/ChangeLog: * config/aarch64/t-aarch64: Add sources to the build. * config/aarch64/__aarch64_have_sme.c: New file. * config/aarch64/__arm_sme_state.S: New file. * config/aarch64/__arm_tpidr2_restore.S: New file. * config/aarch64/__arm_tpidr2_save.S: New file. * config/aarch64/__arm_za_disable.S: New file. * config/aarch64/aarch64-asm.h: New file. * config/aarch64/libgcc-sme.ver: New file.
2023-12-01aarch64: Avoid -Wincompatible-pointer-types warning in Linux unwinderFlorian Weimer1-1/+4
* config/aarch64/linux-unwind.h (aarch64_fallback_frame_state): Add cast to the expected type in sc assignment.
2023-11-30AArch64: Fix __sync_val_compare_and_swap [PR111404]Wilco Dijkstra1-4/+7
__sync_val_compare_and_swap may be used on 128-bit types and either calls the outline atomic code or uses an inline loop. On AArch64 LDXP is only atomic if the value is stored successfully using STXP, but the current implementations do not perform the store if the comparison fails. In this case the value returned is not read atomically. gcc/ChangeLog: PR target/111404 * config/aarch64/aarch64.cc (aarch64_split_compare_and_swap): For 128-bit store the loaded value and loop if needed. libgcc/ChangeLog: PR target/111404 * config/aarch64/lse.S (__aarch64_cas16_acq_rel): Execute STLXP using either new value or loaded value.
2023-10-24libgcc: make heap-based trampolines conditional on libc presenceSergei Trofimovich1-0/+5
To build `libc` for a target one needs to build `gcc` without `libc` support first. Commit r14-4823-g8abddb187b3348 "libgcc: support heap-based trampolines" added unconditional `libc` dependency and broke libc-less `gcc` builds. An example failure on `x86_64-unknown-linux-gnu`: $ mkdir -p /tmp/empty $ ../gcc/configure \ --disable-multilib \ --without-headers \ --with-newlib \ --enable-languages=c \ --disable-bootstrap \ --disable-gcov \ --disable-threads \ --disable-shared \ --disable-libssp \ --disable-libquadmath \ --disable-libgomp \ --disable-libatomic \ --with-build-sysroot=/tmp/empty $ make ... /tmp/gb/./gcc/xgcc -B/tmp/gb/./gcc/ -B/usr/local/x86_64-pc-linux-gnu/bin/ -B/usr/local/x86_64-pc-linux-gnu/lib/ -isystem /usr/local/x86_64-pc-linux-gnu/include -isystem /usr/local/x86_64-pc-linux-gnu/sys-include --sysroot=/tmp/empty -g -O2 -O2 -g -O2 -DIN_GCC -W -Wall -Wno-narrowing -Wwrite-strings -Wcast-qual -Wstrict-prototypes -Wmissing-prototypes -Wold-style-definition -isystem ./include -fpic -mlong-double-80 -DUSE_ELF_SYMVER -fcf-protection -mshstk -g -DIN_LIBGCC2 -fbuilding-libgcc -fno-stack-protector -Dinhibit_libc -fpic -mlong-double-80 -DUSE_ELF_SYMVER -fcf-protection -mshstk -I. -I. -I../.././gcc -I/home/slyfox/dev/git/gcc/libgcc -I/home/slyfox/dev/git/gcc/libgcc/. -I/home/slyfox/dev/git/gcc/libgcc/../gcc -I/home/slyfox/dev/git/gcc/libgcc/../include -DHAVE_CC_TLS -DUSE_TLS -o heap-trampoline.o -MT heap-trampoline.o -MD -MP -MF heap-trampoline.dep -c .../gcc/libgcc/config/i386/heap-trampoline.c -fvisibility=hidden -DHIDE_EXPORTS ../gcc/libgcc/config/i386/heap-trampoline.c:3:10: fatal error: unistd.h: No such file or directory 3 | #include <unistd.h> | ^~~~~~~~~~ compilation terminated. make[2]: *** [.../gcc/libgcc/static-object.mk:17: heap-trampoline.o] Error 1 make[2]: Leaving directory '/tmp/gb/x86_64-pc-linux-gnu/libgcc' make[1]: *** [Makefile:13307: all-target-libgcc] Error 2 The change inhibits any heap-based trampoline code. libgcc/ * config/aarch64/heap-trampoline.c: Disable when libc is not present. * config/i386/heap-trampoline.c: Ditto.
2023-10-22libgcc: support heap-based trampolinesAndrew Burgess2-0/+191
Add support for heap-based trampolines on x86_64-linux, aarch64-linux, and x86_64-darwin. Implement the __builtin_nested_func_ptr_created and __builtin_nested_func_ptr_deleted functions for these targets. Co-Authored-By: Maxim Blinov <maxim.blinov@embecosm.com> Co-Authored-By: Iain Sandoe <iain@sandoe.co.uk> Co-Authored-By: Francois-Xavier Coudert <fxcoudert@gcc.gnu.org> libgcc/ChangeLog: * libgcc2.h (__builtin_nested_func_ptr_created): Declare. (__builtin_nested_func_ptr_deleted): Declare. * libgcc-std.ver.in: Add the new symbols. * config/aarch64/heap-trampoline.c: Implement heap-based trampolines for aarch64. * config/aarch64/t-heap-trampoline: Add rule to build config/aarch64/heap-trampoline.c * config/i386/heap-trampoline.c: Implement heap-based trampolines for x86_64. * config/i386/t-heap-trampoline: Add rule to build config/i386/heap-trampoline.cc * config.host: Handle --enable-heap-trampolines on x86_64-*-linux*, aarch64-*-linux*, x86_64-*-darwin*.
2023-09-26AArch64: Remove BTI from outline atomicsWilco Dijkstra1-3/+3
The outline atomic functions have hidden visibility and can only be called directly. Therefore we can remove the BTI at function entry. This improves security by reducing the number of indirect entry points in a binary. The BTI markings on the objects are still emitted. libgcc/ChangeLog: * config/aarch64/lse.S (BTI_C): Remove define.
2023-09-20aarch64: Ensure const and sign correctnessPekka Seppänen1-2/+3
Be const and sign correct by using a matching CIE augmentation type. Use a builtin instead of relying <string.h> being included. libgcc/ChangeLog: * config/aarch64/aarch64-unwind.h (aarch64_cie_signed_with_b_key): Use const unsigned type and a builtin. Signed-off-by: Pekka Seppänen <pexu@gcc.mail.kapsi.fi>
2023-09-06libgcc _BitInt support [PR102989]Jakub Jelinek1-1/+1
This patch adds the library helpers for multiplication, division + modulo and casts from and to floating point (both binary and decimal). As described in the intro, the first step is try to reduce further the passed in precision by skipping over most significant limbs with just zeros or sign bit copies. For multiplication and division I've implemented a simple algorithm, using something smarter like Karatsuba or Toom N-Way might be faster for very large _BitInts (which we don't support right now anyway), but could mean more code in libgcc, which maybe isn't what people are willing to accept. For the to/from floating point conversions the patch uses soft-fp, because it already has tons of handy macros which can be used for that. In theory it could be implemented using {,unsigned} long long or {,unsigned} __int128 to/from floating point conversions with some frexp before/after, but at that point we already need to force it into integer registers and analyze it anyway. Plus, for 32-bit arches there is no __int128 that could be used for XF/TF mode stuff. I know that soft-fp is owned by glibc and I think the op-common.h change should be propagated there, but the bitint stuff is really GCC specific and IMHO doesn't belong into the glibc copy. 2023-09-06 Jakub Jelinek <jakub@redhat.com> PR c/102989 libgcc/ * config/aarch64/t-softfp (softfp_extras): Use += rather than :=. * config/i386/64/t-softfp (softfp_extras): Likewise. * config/i386/libgcc-glibc.ver (GCC_14.0.0): Export _BitInt support routines. * config/i386/t-softfp (softfp_extras): Add fixxfbitint and bf, hf and xf mode floatbitint. (CFLAGS-floatbitintbf.c, CFLAGS-floatbitinthf.c): Add -msse2. * config/riscv/t-softfp32 (softfp_extras): Use += rather than :=. * config/rs6000/t-e500v1-fp (softfp_extras): Likewise. * config/rs6000/t-e500v2-fp (softfp_extras): Likewise. * config/t-softfp (softfp_floatbitint_funcs): New. (softfp_bid_list): New. (softfp_func_list): Add sf and df mode from and to _BitInt libcalls. (softfp_bid_file_list): New. (LIB2ADD_ST): Add $(softfp_bid_file_list). * config/t-softfp-sfdftf (softfp_extras): Add fixtfbitint and floatbitinttf. * config/t-softfp-tf (softfp_extras): Likewise. * libgcc2.c (bitint_reduce_prec): New inline function. (BITINT_INC, BITINT_END): Define. (bitint_mul_1, bitint_addmul_1): New helper functions. (__mulbitint3): New function. (bitint_negate, bitint_submul_1): New helper functions. (__divmodbitint4): New function. * libgcc2.h (LIBGCC2_UNITS_PER_WORD): When building _BitInt support libcalls, redefine depending on __LIBGCC_BITINT_LIMB_WIDTH__. (__mulbitint3, __divmodbitint4): Declare. * libgcc-std.ver.in (GCC_14.0.0): Export _BitInt support routines. * Makefile.in (lib2funcs): Add _mulbitint3. (LIB2_DIVMOD_FUNCS): Add _divmodbitint4. * soft-fp/bitint.h: New file. * soft-fp/fixdfbitint.c: New file. * soft-fp/fixsfbitint.c: New file. * soft-fp/fixtfbitint.c: New file. * soft-fp/fixxfbitint.c: New file. * soft-fp/floatbitintbf.c: New file. * soft-fp/floatbitintdf.c: New file. * soft-fp/floatbitinthf.c: New file. * soft-fp/floatbitintsf.c: New file. * soft-fp/floatbitinttf.c: New file. * soft-fp/floatbitintxf.c: New file. * soft-fp/op-common.h (_FP_FROM_INT): Add support for rsize up to 4 * _FP_W_TYPE_SIZE rather than just 2 * _FP_W_TYPE_SIZE. * soft-fp/bitintpow10.c: New file. * soft-fp/fixsdbitint.c: New file. * soft-fp/fixddbitint.c: New file. * soft-fp/fixtdbitint.c: New file. * soft-fp/floatbitintsd.c: New file. * soft-fp/floatbitintdd.c: New file. * soft-fp/floatbitinttd.c: New file.
2023-03-13aarch64: Add bfloat16_t support for aarch64Jakub Jelinek3-3/+19
x86_64/i686 has for a few months working std::bfloat16_t support, __bf16 there is no longer a storage only type, but can be used for arithmetics and is supported in libgcc and libstdc++. The following patch adds similar support for AArch64. Unlike the x86 changes, this one keeps the old __bf16 mangling of u6__bf16 rather than DF16b (so an exception from Itanium ABI), but otherwise __bf16 and decltype (0.0bf16) are the same type and both in C++ act as extended floating-point type. 2023-03-13 Jakub Jelinek <jakub@redhat.com> gcc/ * config/aarch64/aarch64.h (aarch64_bf16_type_node): Remove. (aarch64_bf16_ptr_type_node): Adjust comment. * config/aarch64/aarch64.cc (aarch64_gimplify_va_arg_expr): Use bfloat16_type_node rather than aarch64_bf16_type_node. (aarch64_libgcc_floating_mode_supported_p, aarch64_scalar_mode_supported_p): Also support BFmode. (aarch64_invalid_conversion, aarch64_invalid_unary_op): Remove. (aarch64_invalid_binary_op): Remove BFmode related rejections. (TARGET_INVALID_CONVERSION, TARGET_INVALID_UNARY_OP): Don't redefine. * config/aarch64/aarch64-builtins.cc (aarch64_bf16_type_node): Remove. (aarch64_int_or_fp_type): Use bfloat16_type_node rather than aarch64_bf16_type_node. (aarch64_init_simd_builtin_types): Likewise. (aarch64_init_bf16_types): Likewise. Don't create bfloat16_type_node, which is created in tree.cc already. * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): Likewise. gcc/testsuite/ * gcc.target/aarch64/sve/acle/general-c/ternary_bfloat16_opt_n_1.c: Don't expect one __bf16 related error. * gcc.target/aarch64/bfloat16_vector_typecheck_1.c: Adjust or remove dg-error directives for __bf16 being an extended arithmetic type. * gcc.target/aarch64/bfloat16_vector_typecheck_2.c: Likewise. * gcc.target/aarch64/bfloat16_scalar_typecheck.c: Likewise. * g++.target/aarch64/bfloat_cpp_typecheck.C: Don't expect two __bf16 related errors. libgcc/ * config/aarch64/t-softfp (softfp_extensions): Add bfsf. (softfp_truncations): Add tfbf dfbf sfbf hfbf. (softfp_extras): Add floatdibf floatundibf floattibf floatuntibf. * config/aarch64/libgcc-softfp.ver (GCC_13.0.0): Export __extendbfsf2 and __trunc{s,d,t,h}fbf2. * config/aarch64/sfp-machine.h (_FP_NANFRAC_B, _FP_NANSIGN_B): Define. * soft-fp/floatundibf.c: New file. * soft-fp/floatdibf.c: New file. libstdc++-v3/ * config/abi/pre/gnu.ver (CXXABI_1.3.14): Also export __bf16 tinfos if it isn't mangled as DF16b but u6__bf16.
2023-01-18libgcc: Fix uninitialized RA signing on AArch64 [PR107678]Wilco Dijkstra1-28/+12
A recent change only initializes the regs.how[] during Dwarf unwinding which resulted in an uninitialized offset used in return address signing and random failures during unwinding. The fix is to encode the return address signing state in REG_UNSAVED and a new state REG_UNSAVED_ARCHEXT. libgcc/ PR target/107678 * unwind-dw2.h (REG_UNSAVED_ARCHEXT): Add new enum. * unwind-dw2.c (uw_update_context_1): Add REG_UNSAVED_ARCHEXT case. * unwind-dw2-execute_cfa.h: Use REG_UNSAVED_ARCHEXT/REG_UNSAVED to encode the return address signing state. * config/aarch64/aarch64-unwind.h (aarch64_demangle_return_addr) Check current return address signing state. (aarch64_frob_update_contex): Remove.
2023-01-16Update copyright years.Jakub Jelinek15-15/+15
2022-10-06libgcc: Decrease size of _Unwind_FrameState and even more size of cleared ↵Jakub Jelinek3-7/+7
area in uw_frame_state_for The following patch implements something that has Florian found as low hanging fruit in our unwinder and has been discussed in the https://gcc.gnu.org/wiki/cauldron2022#cauldron2022talks.inprocess_unwinding_bof talk. _Unwind_FrameState type seems to be (unlike the pre-GCC 3 frame_state which has been part of ABI) private to unwind-dw2.c + unwind.inc it includes, it is always defined on the stack of some entrypoints, initialized by static uw_frame_state_for and the address of it is also passed to other static functions or the static inlines handling machine dependent unwinding, but it isn't fortunately passed to any callbacks or public functions, so I think we can safely change it any time we want. Florian mentioned that the structure is large even on x86_64, 384 bytes there, starts with 328 bytes long element with frame_state_reg_info type which then starts with an array with __LIBGCC_DWARF_FRAME_REGISTERS__ + 1 elements, each of them is 16 bytes long, on x86_64 __LIBGCC_DWARF_FRAME_REGISTERS__ is just 17 but even that is big, on say riscv __LIBGCC_DWARF_FRAME_REGISTERS__ is I think 128, on powerpc 111, on sh 153 etc. And, we memset to zero the whole fs variable with the _Unwind_FrameState type at the start of the unwinding. The reason why each element is 16 byte (on 64-bit arches) is that it contains some pointer or pointer sized integer and then an enum (with just 7 different enumerators) + padding. The following patch decreases it by moving the enum into a separate array and using just one byte for each register in that second array. We could compress it even more, say 4 bits per register, but I don't want to uglify the code for it too much and make the accesses slower. Furthermore, the clearing of the object can clear only thos how array and members after it, because REG_UNSAVED enumerator (0) doesn't actually need any pointer or pointer sized integer, it is just the other kinds that need to have there something. By doing this, on x86_64 the above numbers change to _Unwind_FrameState type being now 264 bytes long, frame_state_reg_info 208 bytes and we don't clear the first 144 bytes of the object, so the memset is 120 bytes, so ~ 31% of the old clearing size. On riscv 64-bit assuming it has same structure layout rules for the few types used there that would be ~ 2160 bytes of _Unwind_FrameState type before and ~ 1264 bytes after, with the memset previously ~ 2160 bytes and after ~ 232 bytes after. We've also talked about possibly adding a number of initially initialized regs and initializing the rest lazily, but at least for x86_64 with 18 elements in the array that doesn't seem to be worth it anymore, especially because return address column is 16 there and that is usually the first thing to be touched. It might theory help with lots of registers if they are usually untouched, but would uglify and complicate any stores to how by having to check there for the not initialized yet cases and lazy initialization, and similarly for all reads of how to do there if below last initialized one, use how, otherwise imply REG_UNSAVED. The disadvantage of the patch is that touching reg[x].loc and how[x] now means 2 cachelines rather than one as before, and I admit beyond bootstrap/regtest I haven't benchmarked it in any way. 2022-10-06 Jakub Jelinek <jakub@redhat.com> * unwind-dw2.h (REG_UNSAVED, REG_SAVED_OFFSET, REG_SAVED_REG, REG_SAVED_EXP, REG_SAVED_VAL_OFFSET, REG_SAVED_VAL_EXP, REG_UNDEFINED): New anonymous enum, moved from inside of struct frame_state_reg_info. (struct frame_state_reg_info): Remove reg[].how element and the anonymous enum there. Add how element. * unwind-dw2.c: Include stddef.h. (uw_frame_state_for): Don't clear first offsetof (_Unwind_FrameState, regs.how[0]) bytes of *fs. (execute_cfa_program, __frame_state_for, uw_update_context_1, uw_update_context): Use fs->regs.how[X] instead of fs->regs.reg[X].how or fs.regs.how[X] instead of fs.regs.reg[X].how. * config/sh/linux-unwind.h (sh_fallback_frame_state): Likewise. * config/bfin/linux-unwind.h (bfin_fallback_frame_state): Likewise. * config/pa/linux-unwind.h (pa32_fallback_frame_state): Likewise. * config/pa/hpux-unwind.h (UPDATE_FS_FOR_SAR, UPDATE_FS_FOR_GR, UPDATE_FS_FOR_FR, UPDATE_FS_FOR_PC, pa_fallback_frame_state): Likewise. * config/alpha/vms-unwind.h (alpha_vms_fallback_frame_state): Likewise. * config/alpha/linux-unwind.h (alpha_fallback_frame_state): Likewise. * config/arc/linux-unwind.h (arc_fallback_frame_state, arc_frob_update_context): Likewise. * config/riscv/linux-unwind.h (riscv_fallback_frame_state): Likewise. * config/nios2/linux-unwind.h (NIOS2_REG): Likewise. * config/nds32/linux-unwind.h (NDS32_PUT_FS_REG): Likewise. * config/s390/tpf-unwind.h (s390_fallback_frame_state): Likewise. * config/s390/linux-unwind.h (s390_fallback_frame_state): Likewise. * config/sparc/sol2-unwind.h (sparc64_frob_update_context, MD_FALLBACK_FRAME_STATE_FOR): Likewise. * config/sparc/linux-unwind.h (sparc64_fallback_frame_state, sparc64_frob_update_context, sparc_fallback_frame_state): Likewise. * config/i386/sol2-unwind.h (x86_64_fallback_frame_state, x86_fallback_frame_state): Likewise. * config/i386/w32-unwind.h (i386_w32_fallback_frame_state): Likewise. * config/i386/linux-unwind.h (x86_64_fallback_frame_state, x86_fallback_frame_state): Likewise. * config/i386/freebsd-unwind.h (x86_64_freebsd_fallback_frame_state): Likewise. * config/i386/dragonfly-unwind.h (x86_64_dragonfly_fallback_frame_state): Likewise. * config/i386/gnu-unwind.h (x86_gnu_fallback_frame_state): Likewise. * config/csky/linux-unwind.h (csky_fallback_frame_state): Likewise. * config/aarch64/linux-unwind.h (aarch64_fallback_frame_state): Likewise. * config/aarch64/freebsd-unwind.h (aarch64_freebsd_fallback_frame_state): Likewise. * config/aarch64/aarch64-unwind.h (aarch64_frob_update_context): Likewise. * config/or1k/linux-unwind.h (or1k_fallback_frame_state): Likewise. * config/mips/linux-unwind.h (mips_fallback_frame_state): Likewise. * config/loongarch/linux-unwind.h (loongarch_fallback_frame_state): Likewise. * config/m68k/linux-unwind.h (m68k_fallback_frame_state): Likewise. * config/xtensa/linux-unwind.h (xtensa_fallback_frame_state): Likewise. * config/rs6000/darwin-fallback.c (set_offset): Likewise. * config/rs6000/aix-unwind.h (MD_FROB_UPDATE_CONTEXT): Likewise. * config/rs6000/linux-unwind.h (ppc_fallback_frame_state): Likewise. * config/rs6000/freebsd-unwind.h (frob_update_context): Likewise.
2022-05-25AArch64: Prioritise init_have_lse_atomics constructor [PR 105708]Wilco Dijkstra1-1/+3
Increase the priority of the init_have_lse_atomics constructor so it runs before other constructors. This improves chances that rr works when LSE atomics are supported. libgcc/ PR libgcc/105708 * config/aarch64/lse-init.c: Increase constructor priority.
2022-05-25aarch64: Fix pac-ret with unusual dwarf in libgcc unwinder [PR104689]Szabolcs Nagy1-1/+7
The RA_SIGN_STATE dwarf pseudo-register is normally only set using the DW_CFA_AARCH64_negate_ra_state (== DW_CFA_window_save) operation which toggles the return address signedness state (the default state is 0). (It may be set by remember/restore_state CFI too, those save/restore the state of all registers.) However RA_SIGN_STATE can be set directly via DW_CFA_val_expression too. GCC does not generate such CFI but some other compilers reportedly do. Note: the toggle operation must not be mixed with other dwarf register rule CFI within the same CIE and FDE. In libgcc we assume REG_UNSAVED means the RA_STATE is set using toggle operations, otherwise we assume its value is set by other CFI. libgcc/ChangeLog: PR target/104689 * config/aarch64/aarch64-unwind.h (aarch64_frob_update_context): Handle the !REG_UNSAVED case. * unwind-dw2.c (execute_cfa_program): Fail toggle if !REG_UNSAVED. gcc/testsuite/ChangeLog: PR target/104689 * gcc.target/aarch64/pr104689.c: New test.
2022-05-13[AArch64] add barriers to ool __sync builtinsSebastian Pop2-8/+42
2022-05-13 Sebastian Pop <spop@amazon.com> gcc/ PR target/105162 * config/aarch64/aarch64-protos.h (atomic_ool_names): Increase dimension of str array. * config/aarch64/aarch64.cc (aarch64_atomic_ool_func): Call memmodel_from_int and handle MEMMODEL_SYNC_*. (DEF0): Add __aarch64_*_sync functions. gcc/testsuite/ PR target/105162 * gcc.target/aarch64/sync-comp-swap-ool.c: New. * gcc.target/aarch64/sync-op-acquire-ool.c: New. * gcc.target/aarch64/sync-op-full-ool.c: New. * gcc.target/aarch64/target_attr_20.c: Update check. * gcc.target/aarch64/target_attr_21.c: Same. libgcc/ PR target/105162 * config/aarch64/lse.S: Define BARRIER and handle memory MODEL 5. * config/aarch64/t-lse: Add a 5th memory model for _sync functions.
2022-01-03Update copyright years.Jakub Jelinek15-15/+15
2021-08-31libgcc: Add missing runtime exception noticesRichard Sandiford1-0/+4
Quoting from https://gcc.gnu.org/pipermail/gcc/2021-July/236716.html: -------------------------------------------------------------------- It was pointed out to me off-list that config/aarch64/value-unwind.h is missing the runtime exception. It looks like a few other files are too; a fuller list is: libgcc/config/aarch64/value-unwind.h libgcc/config/frv/frv-abi.h libgcc/config/i386/value-unwind.h libgcc/config/pa/pa64-hpux-lib.h Certainly for the aarch64 file this was simply a mistake; it seems to have been copied from the i386 version, both of which reference the runtime exception but don't actually include it. -------------------------------------------------------------------- Similarly, frv-abi.h referenced the exception but didn't include it. pa64-hpux-lib.h was missing any reference to the exception. The decision was that this was simply a mistake [https://gcc.gnu.org/pipermail/gcc/2021-July/236717.html]: -------------------------------------------------------------------- […] It generally is considered a textual omission. The runtime library components of GCC are intended to be licensed under the runtime exception, which was granted and approved at the time of introduction. -------------------------------------------------------------------- and that we should simply change all of the files above [https://gcc.gnu.org/pipermail/gcc/2021-July/236719.html]: -------------------------------------------------------------------- Please correct the text in the files. The files in libgcc used in the GCC runtime are intended to be licensed with the runtime exception and GCC previously was granted approval for that licensing and purpose. […] The runtime exception explicitly was intended for this purpose and usage at the time that GCC received approval to apply the exception. -------------------------------------------------------------------- libgcc/ * config/aarch64/value-unwind.h: Add missing runtime exception paragraph. * config/frv/frv-abi.h: Likewise. * config/i386/value-unwind.h: Likewise. * config/pa/pa64-hpux-lib.h: Likewise.
2021-01-04Update copyright years.Jakub Jelinek15-15/+15
2020-09-28aarch64: Add HF routines to libgcc_s.soRichard Sandiford2-0/+29
The libgcc HF support routines were being linked into libgcc_s.so, but weren't being exported. libgcc/ * config/aarch64/libgcc-softfp.ver: New file. * config/aarch64/t-softfp (SHLIB_MAPFILES): Add it.
2020-09-17aarch64: Fixed unused variable warning in aarch64-unwind.hWei Wentao1-1/+2
libgcc/ * config/aarch64/aarch64-unwind.h (aarch64_demangle_return_addr): Fix unused variable warning.
2020-08-03aarch64: Fix up __aarch64_cas16_acq_rel fallbackJakub Jelinek1-1/+1
As mentioned in the PR, the fallback path when LSE is unavailable writes incorrect registers to the memory if the previous content compares equal to x0, x1 - it writes copy of x0, x1 from the start of function, but it should write x2, x3. 2020-08-03 Jakub Jelinek <jakub@redhat.com> PR target/96402 * config/aarch64/lse.S (__aarch64_cas16_acq_rel): Use x2, x3 instead of x(tmp0), x(tmp1) in STXP arguments. * gcc.target/aarch64/pr96402.c: New test.
2020-07-24aarch64: add PAC GNU property note to libgcc lse.SSzabolcs Nagy1-2/+15
This note is not used anywhere currently but it is supposed to mark objects if the return address is protected with PAC on the stack. Since lse.S only has leaf functions the return address is never saved on the stack so we can add the note. The note is only added if pac-ret is enabled because it can cause problems with old linkers and we don't have checks for that. This can be changed later to be unconditional, for now it is consistent with how gcc generates the notes. libgcc/ChangeLog: * config/aarch64/lse.S: Add PAC property note.
2020-07-13libgcc: fix the handling of return address mangling [PR94891]Szabolcs Nagy1-32/+8
Mangling, currently only used on AArch64 for return address signing, is an internal representation that should not be exposed via __builtin_return_address return value, __builtin_eh_return handler argument, _Unwind_DebugHook handler argument. Note that a mangled address might not even fit into a void *, e.g. with AArch64 ilp32 ABI the return address is stored as 64bit, so the mangled return address cannot be accessed via _Unwind_GetPtr. This patch changes the unwinder hooks as follows: MD_POST_EXTRACT_ROOT_ADDR is removed: root address comes from __builtin_return_address which is not mangled. MD_POST_EXTRACT_FRAME_ADDR is renamed to MD_DEMANGLE_RETURN_ADDR, it now operates on _Unwind_Word instead of void *, so the hook should work when return address signing is enabled on AArch64 ilp32. (But for that __builtin_aarch64_autia1716 should be fixed to operate on 64bit input instead of a void *.) MD_POST_FROB_EH_HANDLER_ADDR is removed: it is the responsibility of __builtin_eh_return to do the mangling if necessary. 2020-07-13 Szabolcs Nagy <szabolcs.nagy@arm.com> libgcc/ChangeLog: PR target/94891 * config/aarch64/aarch64-unwind.h (MD_POST_EXTRACT_ROOT_ADDR): Remove. (MD_POST_FROB_EH_HANDLER_ADDR): Remove. (MD_POST_EXTRACT_FRAME_ADDR): Rename to ... (MD_DEMANGLE_RETURN_ADDR): This. (aarch64_post_extract_frame_addr): Rename to ... (aarch64_demangle_return_addr): This. (aarch64_post_frob_eh_handler_addr): Remove. * unwind-dw2.c (uw_update_context): Demangle return address. (uw_frob_return_addr): Remove.