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2022-08-08AArch32: Fix 128-bit sequential consistency atomic operations.Tamar Christina1-0/+19
Similar to AArch64 the Arm implementation of 128-bit atomics is broken. For 128-bit atomics we rely on pthread barriers to correct guard the address in the pointer to get correct memory ordering. However for 128-bit atomics the address under the lock is different from the original pointer. This means that one of the values under the atomic operation is not protected properly and so we fail during when the user has requested sequential consistency as there's no barrier to enforce this requirement. As such users have resorted to adding an #ifdef GCC <emit barrier> #endif around the use of these atomics. This corrects the issue by issuing a barrier only when __ATOMIC_SEQ_CST was requested. I have hand verified that the barriers are inserted for atomic seq cst. libatomic/ChangeLog: PR target/102218 * config/arm/host-config.h (pre_seq_barrier, post_seq_barrier, pre_post_seq_barrier): Require barrier on __ATOMIC_SEQ_CST.
2022-01-03Update copyright years.Jakub Jelinek2-2/+2
2021-01-04Update copyright years.Jakub Jelinek2-2/+2
2020-01-01Update copyright years.Jakub Jelinek2-2/+2
From-SVN: r279813
2019-01-01Update copyright years.Jakub Jelinek2-2/+2
From-SVN: r267494
2018-06-21[ARM] Use __ARM_ARCH and __ARM_FEATURE_LDREX instead of __ARM_ARCH__Christophe Lyon1-47/+5
2018-06-21 Christophe Lyon <christophe.lyon@linaro.org> libatomic/ * config/arm/arm-config.h (__ARM_ARCH__): Remove definitions, use __ARM_ARCH instead. Use __ARM_FEATURE_LDREX to define HAVE_STREX and HAVE_STREXBHD libgcc/ * config/arm/lib1funcs.S (__ARM_ARCH__): Remove definitions, use __ARM_ARCH and __ARM_FEATURE_CLZ instead. (HAVE_ARM_CLZ): Remove definition, use __ARM_FEATURE_CLZ instead. * config/arm/ieee754-df.S: Use __ARM_FEATURE_CLZ instead of __ARM_ARCH__. * config/arm/ieee754-sf.S: Likewise. * config/arm/libunwind.S: Use __ARM_ARCH instead of __ARM_ARCH__. From-SVN: r261841
2018-01-03Update copyright years.Jakub Jelinek2-2/+2
From-SVN: r256169
2017-01-30[ARM][PR target/78945] Fix libatomic on armv7-mSzabolcs Nagy1-2/+2
ARM libatomic inline asm uses sel, uadd8, uadd16 instructions which are only available if __ARM_FEATURE_SIMD32 is defined. libatomic/ 2017-01-30 Szabolcs Nagy <szabolcs.nagy@arm.com> PR target/78945 * config/arm/exch_n.c (libat_exchange): Check __ARM_FEATURE_SIMD32. From-SVN: r245023
2017-01-01Update copyright years.Jakub Jelinek2-2/+2
From-SVN: r243994
2016-01-04Update copyright years.Jakub Jelinek2-2/+2
From-SVN: r232055
2015-01-05Update copyright years.Jakub Jelinek2-2/+2
From-SVN: r219188
2014-01-02Update copyright years in libatomic/Richard Sandiford2-2/+2
From-SVN: r206291
2013-01-14Update copyright years in libatomic.Richard Sandiford2-2/+2
From-SVN: r195164
2012-12-04libatomic: Detect and build for ARM architecture armv8-a.Marcus Shawcroft1-0/+4
2012-12-04 Marcus Shawcroft <marcus.shawcroft@arm.com> * config/arm/arm-config.h (__ARM_ARCH_8A__): New. From-SVN: r194150
2012-05-01Add libatomic as a target library.Richard Henderson3-0/+193
From-SVN: r187018
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