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2025-07-18Daily bump.GCC Administrator3-1/+269
2025-07-17gcse: Skip hardreg pre when the hardreg is never live [PR121095]Andrew Pinski1-1/+8
r15-6789-ge7f98d9603808b added a new RTL pass for hardreg PRE for the hard register of FPM_REGNUM, this pass could get expensive if you have a large number of basic blocks and the hard register was never live so it does nothing in the end. In the aarch64 case, FPM_REGNUM is only used for FP8 related code so it has a high probability of not being used. So skipping the pass for that register can improve both compile time and memory usage. Build and tested for aarch64-linux-gnu. PR middle-end/121095 gcc/ChangeLog: * gcse.cc (execute_hardreg_pre): Skip if the hardreg which is never live. Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
2025-07-17c++: constexpr array testcase [PR87097]Jason Merrill1-0/+13
This seems to have been fixed by r15-7260 for PR118285, but is sufficiently different to merit its own test. PR c++/87097 gcc/testsuite/ChangeLog: * g++.dg/cpp0x/constexpr-array29.C: New test.
2025-07-17tree-ssa-structalias / pta: Fix *more* GNU coding style deviationsFilip Kastl1-35/+36
This continues my previous commit, where I fixed some deviations from GNU coding style in pta files. This should fix all the remaining issues that contrib/check_GNU_style.py can detect (excluding false positives). Commiting as obvious. gcc/ChangeLog: * tree-ssa-structalias.cc (lookup_vi_for_tree): Fix GNU style. (process_constraint): Fix GNU style. (get_constraint_for_component_ref): Fix GNU style. (get_constraint_for_1): Fix GNU style. (get_function_part_constraint): Fix GNU style. (handle_lhs_call): Fix GNU style. (find_func_aliases_for_builtin_call): Fix GNU style. (find_func_aliases): Fix GNU style. (find_func_clobbers): Fix GNU style. (struct shared_bitmap_hasher): Fix GNU style. (shared_bitmap_hasher::hash): Fix GNU style. (pt_solution_includes_global): Fix GNU style. (init_base_vars): Fix GNU style. (visit_loadstore): Fix GNU style. (compute_dependence_clique): Fix GNU style. (struct pt_solution): Fix GNU style. (ipa_pta_execute): Fix GNU style. Signed-off-by: Filip Kastl <fkastl@suse.cz>
2025-07-17tree-ssa-structalias / pta: Fix some GNU coding style deviationsFilip Kastl3-27/+28
Fix some deviations from GNU coding style in pta files as reported by contrib/check_GNU_style.py. Most of these are "dot, space, space, end of comment". Commiting as obvious. gcc/ChangeLog: * pta-andersen.cc (struct constraint_graph): Fix GNU style. (constraint_equal): Fix GNU style. (set_union_with_increment): Fix GNU style. (insert_into_complex): Fix GNU style. (merge_node_constraints): Fix GNU style. (unify_nodes): Fix GNU style. (do_ds_constraint): Fix GNU style. (scc_info::scc_info): Fix GNU style. (find_indirect_cycles): Fix GNU style. (equiv_class_lookup_or_add): Fix GNU style. (label_visit): Fix GNU style. (dump_pred_graph): Fix GNU style. (perform_var_substitution): Fix GNU style. (eliminate_indirect_cycles): Fix GNU style. (solve_graph): Fix GNU style. (solve_constraints): Fix GNU style. * tree-ssa-structalias.cc (first_vi_for_offset): Fix GNU style. (debug_constraint): Fix GNU style. * tree-ssa-structalias.h (struct constraint_expr): Fix GNU style. (struct variable_info): Fix GNU style. Signed-off-by: Filip Kastl <fkastl@suse.cz>
2025-07-17x86: Don't change mode for XOR in ix86_expand_ternlogH.J. Lu1-27/+0
There is no need to change mode for XOR in ix86_expand_ternlog now. Whatever reasons for it in the first place no longer exist. Tested on x86-64 with -m32. There are no regressions. * config/i386/i386-expand.cc (ix86_expand_ternlog): Don't change mode for XOR. Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
2025-07-17tree-ssa-structalias: Put solver into its own fileFilip Kastl5-2978/+3130
This patch cuts out the points-to solver from tree-ssa-structalias.cc and places it into a new file pta-andersen.cc. It is the first part of my effort to split tree-ssa-structalias.cc into smaller parts. I had to give external linkage to some static functions and variables. I put those in the new header files tree-ssa-structalias.h and pta-andersen.h. Those header files are meant as an internal interface between parts of the points-to analyzer. Some functions and variables already had external linkage and were declared in tree-ssa-alias.h. I considered moving the declarations to tree-ssa-structalias.h but decided to leave them as is. I see those functions and variables as an external interface -- facing outwards to the rest of the compiler. For the internal interface, I made a new namespace "pointer_analysis". I didn't want to clutter the global namespace and possibly run into ODR problems. I wanted to encapsulate the constraint graph within the solver. To achieve that, I had to make some changes beyond just moving things around. They were only very small changes, though: - Add delete_graph() which gets called at the end of solve_constraints() - Problem: The solver assigns representatives to variables (union-find). To then get the solution for variable v, one has to look up the representative of v. The information needed to look up the representative is part of the graph. - Solution: Let the solver output an array that maps variables to their representatives and let this array outlive the graph (array var_rep). - Constructing the array means doing find() for every variable. That should amortize to O(size of the union-find structure). So this won't hurt the asymptotic time complexity. - We replace all calls to find(var) in tree-ssa-structalias.cc with just an array lookup var_rep[var]. - predbitmap_obstack gets initialized in init_graph(). gcc/ChangeLog: * Makefile.in: Add pta-andersen.o. * tree-ssa-structalias.cc (create_variable_info_for): Just move around. (unify_nodes): Move to pta-andersen.cc. (struct constraint): Move to tree-ssa-structalias.h. (EXECUTE_IF_IN_NONNULL_BITMAP): Move to pta-andersen.cc. (struct variable_info): Move to tree-ssa-structalias.h. (struct constraint_stats): Move to tree-ssa-structalias.h. (first_vi_for_offset): External linkage, move to namespace pointer_analysis. (first_or_preceding_vi_for_offset): External linkage, move to namespace pointer_analysis. (dump_constraint): External linkage, move to namespace pointer_analysis. (debug_constraint): External linkage, move to namespace pointer_analysis. (dump_constraints): External linkage, move to namespace pointer_analysis. (debug_constraints): External linkage, move to namespace pointer_analysis. (lookup_vi_for_tree): Move around inside tree-ssa-structalias.cc. (type_can_have_subvars): Move around inside tree-ssa-structalias.cc. (make_param_constraints): Move around inside tree-ssa-structalias.cc. (dump_solution_for_var): External linkage, move to namespace pointer_analysis. find (...) -> var_rep[...]. (get_varinfo): Move to tree-ssa-structalias.h. (debug_solution_for_var): External linkage, move to namespace pointer_analysis. (vi_next): Move to tree-ssa-structalias.h. (dump_sa_stats): External linkage, move to namespace pointer_analysis. (new_var_info): Just move around. (dump_sa_points_to_info): External linkage, move to namespace pointer_analysis. (debug_sa_points_to_info): External linkage, move to namespace pointer_analysis. (get_call_vi): Just move around. (dump_varinfo): External linkage, move to namespace pointer_analysis. (lookup_call_use_vi): Just move around. (lookup_call_clobber_vi): Just move around. (get_call_use_vi): Just move around. (get_call_clobber_vi): Just move around. (enum constraint_expr_type): Move to tree-ssa-structalias.h. (struct constraint_expr): Move to tree-ssa-structalias.h. (UNKNOWN_OFFSET): Move to tree-ssa-structalias.h. (get_constraint_for_1): Just move around. (get_constraint_for): Just move around. (get_constraint_for_rhs): Just move around. (do_deref): Just move around. (constraint_pool): Just move around. (struct constraint_graph): Move to pta-andersen.h. (FIRST_REF_NODE): Move to pta-andersen.cc. (LAST_REF_NODE): Move to pta-andersen.cc. (find): Move to pta-andersen.cc. (unite): Move to pta-andersen.cc. (new_constraint): Just move around. (debug_constraint_graph): External linkage, move to namespace pointer_analysis. (debug_varinfo): External linkage, move to namespace pointer_analysis. (debug_varmap): External linkage, move to namespace pointer_analysis. (dump_constraint_graph): External linkage, move to namespace pointer_analysis. (constraint_expr_equal): Move to pta-andersen.cc. (constraint_expr_less): Move to pta-andersen.cc. (constraint_less): Move to pta-andersen.cc. (constraint_equal): Move to pta-andersen.cc. (constraint_vec_find): Move to pta-andersen.cc. (constraint_set_union): Move to pta-andersen.cc. (solution_set_expand): Move to pta-andersen.cc. (set_union_with_increment): Move to pta-andersen.cc. (insert_into_complex): Move to pta-andersen.cc. (merge_node_constraints): Move to pta-andersen.cc. (clear_edges_for_node): Move to pta-andersen.cc. (merge_graph_nodes): Move to pta-andersen.cc. (add_implicit_graph_edge): Move to pta-andersen.cc. (add_pred_graph_edge): Move to pta-andersen.cc. (add_graph_edge): Move to pta-andersen.cc. (init_graph): Move to pta-andersen.cc. Initialize predbitmap_obstack here. (build_pred_graph): Move to pta-andersen.cc. (build_succ_graph): Move to pta-andersen.cc. (class scc_info): Move to pta-andersen.cc. (scc_visit): Move to pta-andersen.cc. (solve_add_graph_edge): Move to pta-andersen.cc. (do_sd_constraint): Move to pta-andersen.cc. (do_ds_constraint): Move to pta-andersen.cc. (do_complex_constraint): Move to pta-andersen.cc. (scc_info::scc_info): Move to pta-andersen.cc. (scc_info::~scc_info): Move to pta-andersen.cc. (find_indirect_cycles): Move to pta-andersen.cc. (topo_visit): Move to pta-andersen.cc. (compute_topo_order): Move to pta-andersen.cc. (struct equiv_class_hasher): Move to pta-andersen.cc. (equiv_class_hasher::hash): Move to pta-andersen.cc. (equiv_class_hasher::equal): Move to pta-andersen.cc. (equiv_class_lookup_or_add): Move to pta-andersen.cc. (condense_visit): Move to pta-andersen.cc. (label_visit): Move to pta-andersen.cc. (dump_pred_graph): External linkage, move to namespace pointer_analysis. (dump_varmap): External linkage, move to namespace pointer_analysis. (perform_var_substitution): Move to pta-andersen.cc. (free_var_substitution_info): Move to pta-andersen.cc. (find_equivalent_node): Move to pta-andersen.cc. (unite_pointer_equivalences): Move to pta-andersen.cc. (move_complex_constraints): Move to pta-andersen.cc. (rewrite_constraints): Move to pta-andersen.cc. (eliminate_indirect_cycles): Move to pta-andersen.cc. (solve_graph): Move to pta-andersen.cc. (set_uids_in_ptset): find (...) -> var_rep[...]. (find_what_var_points_to): find (...) -> var_rep[...]. (init_alias_vars): Don't initialize predbitmap_obstack here. (remove_preds_and_fake_succs): Move to pta-andersen.cc. (solve_constraints): Move to pta-andersen.cc. Call delete_graph() at the end. (delete_points_to_sets): Don't delete graph here. Delete var_rep here. (visit_loadstore): find (...) -> var_rep[...]. (compute_dependence_clique): find (...) -> var_rep[...]. (ipa_pta_execute): find (...) -> var_rep[...]. * pta-andersen.cc: New file. * pta-andersen.h: New file. * tree-ssa-structalias.h: New file. Signed-off-by: Filip Kastl <fkastl@suse.cz>
2025-07-17aarch64: Adapt unwinder to linux's SME signal behaviourRichard Sandiford4-0/+85
SME uses a lazy save system to manage ZA. The idea is that, if a function with ZA state wants to call a "normal" function, it can leave its state in ZA and instead set up a lazy save buffer. If, unexpectedly, that normal function contains a nested use of ZA, that nested use of ZA must commit the lazy save first. This lazy save system uses a special system register called TPIDR2_EL0. See: https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst#66the-za-lazy-saving-scheme for details. The ABI specifies that, on entry to an exception handler, the following things must be true: * PSTATE.SM must be 0 (the processor must be in non-streaming mode) * PSTATE.ZA must be 0 (ZA must be off) * TPIDR2_EL0 must be 0 (there must be no uncommitted lazy save) This is normally done by making _Unwind_RaiseException & friends commit any lazy save before they unwind. This also has the side effect of ensuring that TPIDR2_EL0 is never left pointing to a lazy save buffer that has been unwound. However, things get more complicated with signals. If: (a) a signal is raised while ZA is dormant (that is, while there is an uncommitted lazy save); (b) the signal handler throws an exception; and (c) that exception is caught outside the signal handler something must ensure that the lazy save from (a) is committed. This would be simple if the signal handler was entered with ZA and TPIDR2_EL0 intact. However, for various good reasons that are out of scope here, this is not done. Instead, Linux now clears both TPIDR2_EL0 and PSTATE.ZA before entering a signal handler, see: https://lore.kernel.org/all/20250417190113.3778111-1-mark.rutland@arm.com/ for details. Therefore, it is the unwinder that must simulate a commit of the lazy save from (a). It can do this by reading the previous values of TPIDR2_EL0 and ZA from the sigcontext. The SME-related sigcontext structures were only added to linux's asm/sigcontext.h relatively recently and we can't rely on GCC being built against such recent kernel header files. The patch therefore uses defines relevant macros if they are not defined and provide types that comply with ABI layout of the corresponding linux types. The patch includes some ugly casting in an attempt to support big-endian ILP32, even though SME on big-endian ILP32 linux should never be a thing. We can remove it if we also remove ILP32 support from GCC. Co-authored-by: Yury Khrustalev <yury.khrustalev@arm.com> Reviewed-by: Tamar Christina <tamar.christina@arm.com> gcc/ * doc/sourcebuild.texi (aarch64_sme_hw): Document. gcc/testsuite/ * lib/target-supports.exp (add_options_for_aarch64_sme) (check_effective_target_aarch64_sme_hw): New procedures. * g++.target/aarch64/sme/sme_throw_1.C: New test. * g++.target/aarch64/sme/sme_throw_2.C: Likewise. libgcc/ * config/aarch64/linux-unwind.h (aarch64_fallback_frame_state): If a signal was raised while there was an uncommitted lazy save, commit the save as part of the unwind process.
2025-07-17s390: Rework signbit optabStefan Schulze Frielinghaus9-5/+448
Currently for a signbit operation instructions tc{f,d,x}b + ipm + srl are emitted. If the source operand is a MEM, then a load precedes the sequence. A faster implementation is by issuing a load either from a REG or MEM into a GPR followed by a shift. In spirit of the signbit function of the C standard, the signbit optab only guarantees that the resulting value is nonzero if the signbit is set. The common code implementation computes a value where the signbit is stored in the most significant bit, i.e., all other bits are just masked out, whereas the current implementation of s390 results in a value where the signbit is stored in the least significant bit. Although, there is no guarantee where the signbit is stored, keep the current behaviour and, therefore, implement the signbit optab manually. Since z10, instruction lgdr can be effectively used for a 64-bit FPR-to-GPR load. However, there exists no 32-bit pendant. Thus, for target z10 make use of post-reload splitters which emit either a 64-bit or a 32-bit load depending on whether the source operand is a REG or a MEM and a corresponding 63 or 31-bit shift. We can do without post-reload splitter in case of vector extensions since there we also have a 32-bit VR-to-GPR load via instruction vlgvf. gcc/ChangeLog: * config/s390/s390.md (signbit_tdc): Rename expander. (signbit<mode>2): New expander. (signbit<mode>2_z10): New expander. gcc/testsuite/ChangeLog: * gcc.target/s390/isfinite-isinf-isnormal-signbit-2.c: Adapt scan assembler directives. * gcc.target/s390/isfinite-isinf-isnormal-signbit-3.c: Ditto. * gcc.target/s390/signbit-1.c: New test. * gcc.target/s390/signbit-2.c: New test. * gcc.target/s390/signbit-3.c: New test. * gcc.target/s390/signbit-4.c: New test. * gcc.target/s390/signbit-5.c: New test. * gcc.target/s390/signbit.h: New test.
2025-07-17s390: Adapt GPR<->VR costsStefan Schulze Frielinghaus1-1/+15
Moving between GPRs and VRs in any mode with size less than or equal to 8 bytes becomes available with vector extensions. Without adapting costs for those loads, we typically go over memory. gcc/ChangeLog: * config/s390/s390.cc (s390_register_move_cost): Add costing for vlvg/vlgv.
2025-07-17s390: Add implicit zero extend for VLGVStefan Schulze Frielinghaus2-6/+125
Exploit the fact that instruction VLGV zeros excessive bits of a GPR. gcc/ChangeLog: * config/s390/vector.md (bhfgq): Add scalar modes. (*movdi<mode>_zero_extend_A): New insn. (*movsi<mode>_zero_extend_A): New insn. (*movdi<mode>_zero_extend_B): New insn. (*movsi<mode>_zero_extend_B): New insn. gcc/testsuite/ChangeLog: * gcc.target/s390/vector/vlgv-zero-extend-1.c: New test.
2025-07-17LoongArch: Fix wrong code generated by TARGET_VECTORIZE_VEC_PERM_CONST ↵Xi Ruoyao4-99/+73
[PR121064] When TARGET_VECTORIZE_VEC_PERM_CONST is called, target may be the same pseudo as op0 and/or op1. Loading the selector into target would clobber the input, producing wrong code like vld $vr0, $t0 vshuf.w $vr0, $vr0, $vr1 So don't load the selector into d->target, use a new pseudo to hold the selector instead. The reload pass will load the pseudo for selector and the pseudo for target into the same hard register (following our constraint '0' on the shuf instructions) anyway. gcc/ChangeLog: PR target/121064 * config/loongarch/lsx.md (lsx_vshuf_<lsxfmt_f>): Add '@' to generate a mode-aware helper. Use <VIMODE> as the mode of the operand 1 (selector). * config/loongarch/lasx.md (lasx_xvshuf_<lasxfmt_f>): Likewise. * config/loongarch/loongarch.cc (loongarch_try_expand_lsx_vshuf_const): Create a new pseudo for the selector. Use the mode-aware helper to simplify the code. (loongarch_expand_vec_perm_const): Likewise. gcc/testsuite/ChangeLog: PR target/121064 * gcc.target/loongarch/pr121064.c: New test.
2025-07-17Reject single lane vector types for SLP buildRichard Biener2-2/+11
The following makes us never consider vector(1) T types for vectorization and ensures this during SLP build. This is a long-standing issue for BB vectorization and when we remove early loop vector type setting we lose the single place we have that rejects this for loops. Once we implement partial loop vectorization we should revisit this, but then use the original scalar types for the unvectorized parts. * tree-vect-slp.cc (vect_build_slp_tree_1): Reject single-lane vector types. * gcc.dg/vect/bb-slp-39.c: Adjust.
2025-07-17tree-optimization/121035 - handle stray VN values without expressionRichard Biener2-10/+105
When VN iterates we can end up with unreachable inserted expressions in the expression tables which in turn will not be added to their value by PREs compute_avail. This will later ICE when we pick them up and want to generate them. Deal with this by giving up. PR tree-optimization/121035 * tree-ssa-pre.cc (find_or_generate_expression): Handle values without expression. * gcc.dg/pr121035.c: New testcase.
2025-07-17Daily bump.GCC Administrator7-1/+683
2025-07-16diagnostics: remove redundant fieldDavid Malcolm1-5/+1
I stopped using state_diagram::m_show_tags in r16-2211-ga5d9debedd2f46 but forgot to remove the field. Do so now. Spotted by Filip Kastl via clang's -Wunused-private-field. gcc/ChangeLog: * diagnostic-state-to-dot.cc (state_diagram::m_show_tags): Drop unused field. Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2025-07-16openmp: Refactor handling of iteratorsKwok Cheung Yeung8-196/+173
Move code to calculate the iteration size and to generate the iterator expansion loop into separate functions. Use OMP_ITERATOR_DECL_P to check for iterators in clause declarations. gcc/c-family/ * c-omp.cc (c_finish_omp_depobj): Use OMP_ITERATOR_DECL_P. gcc/c/ * c-typeck.cc (handle_omp_array_sections): Use OMP_ITERATOR_DECL_P. (c_finish_omp_clauses): Likewise. gcc/cp/ * pt.cc (tsubst_omp_clause_decl): Use OMP_ITERATOR_DECL_P. * semantics.cc (handle_omp_array_sections): Likewise. (finish_omp_clauses): Likewise. gcc/ * gimplify.cc (gimplify_omp_affinity): Use OMP_ITERATOR_DECL_P. (compute_omp_iterator_count): New. (build_omp_iterator_loop): New. (gimplify_omp_depend): Use OMP_ITERATOR_DECL_P, compute_omp_iterator_count and build_omp_iterator_loop. * tree-inline.cc (copy_tree_body_r): Use OMP_ITERATOR_DECL_P. * tree-pretty-print.cc (dump_omp_clause): Likewise. * tree.h (OMP_ITERATOR_DECL_P): New macro.
2025-07-16x86: Convert MMX integer loads from constant vector poolUros Bizjak11-19/+181
For MMX 16-bit, 32-bit and 64-bit constant vector loads from constant vector pool: (insn 6 2 7 2 (set (reg:V1SI 5 di) (mem/u/c:V1SI (symbol_ref/u:DI ("*.LC0") [flags 0x2]) [0 S4 A32])) "pr121062-2.c":10:3 2036 {*movv1si_internal} (expr_list:REG_EQUAL (const_vector:V1SI [ (const_int -1 [0xffffffffffffffff]) ]) (nil))) we can convert it to (insn 12 2 7 2 (set (reg:SI 5 di) (const_int -1 [0xffffffffffffffff])) "pr121062-2.c":10:3 100 {*movsi_internal} (nil)) Co-Developed-by: H.J. Lu <hjl.tools@gmail.com> gcc/ PR target/121062 * config/i386/i386.cc (ix86_convert_const_vector_to_integer): Handle E_V1SImode and E_V1DImode. * config/i386/mmx.md (V_16_32_64): Add V1SI, V2BF and V1DI. (mmxinsnmode): Add V1DI and V1SI. Add V_16_32_64 splitter for constant vector loads from constant vector pool. (V_16_32_64:*mov<mode>_imm): Moved after V_16_32_64 splitter. Replace lowpart_subreg with adjust_address. gcc/testsuite/ PR target/121062 * gcc.target/i386/pr121062-1.c: New test. * gcc.target/i386/pr121062-2.c: Likewise. * gcc.target/i386/pr121062-3a.c: Likewise. * gcc.target/i386/pr121062-3b.c: Likewise. * gcc.target/i386/pr121062-3c.c: Likewise. * gcc.target/i386/pr121062-4.c: Likewise. * gcc.target/i386/pr121062-5.c: Likewise. * gcc.target/i386/pr121062-6.c: Likewise. * gcc.target/i386/pr121062-7.c: Likewise.
2025-07-16x86: Warn -pg without -mfentry only on glibc targetsH.J. Lu10-11/+18
Since only glibc targets support -mfentry, warn -pg without -mfentry only on glibc targets. gcc/ PR target/120881 PR testsuite/121078 * config/i386/i386-options.cc (ix86_option_override_internal): Warn -pg without -mfentry only on glibc targets. gcc/testsuite/ PR target/120881 PR testsuite/121078 * gcc.dg/20021014-1.c (dg-additional-options): Add -mfentry -fno-pic only on gnu/x86 targets. * gcc.dg/aru-2.c (dg-additional-options): Likewise. * gcc.dg/nest.c (dg-additional-options): Likewise. * gcc.dg/pr32450.c (dg-additional-options): Likewise. * gcc.dg/pr43643.c (dg-additional-options): Likewise. * gcc.target/i386/pr104447.c (dg-additional-options): Likewise. * gcc.target/i386/pr113122-3.c(dg-additional-options): Likewise. * gcc.target/i386/pr119386-1.c (dg-additional-options): Add -mfentry only on gnu targets. * gcc.target/i386/pr119386-2.c (dg-additional-options): Likewise. Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
2025-07-16i386: Use various predicates instead of open coding themUros Bizjak3-4/+4
No functional changes. gcc/ChangeLog: * config/i386/i386-expand.cc (ix86_expand_move): Use MEM_P predicate instead of open coding it. (ix86_erase_embedded_rounding): Use NONJUMP_INSN_P predicate instead of open coding it. * config/i386/i386-features.cc (convertible_comparison_p): Use REG_P predicate instead of open coding it. * config/i386/i386.cc (ix86_rtx_costs): Use SUBREG_P predicate instead of open coding it.
2025-07-16i386: Use LABEL_REF_P predicate instead of open coding itUros Bizjak4-21/+21
No functional changes. gcc/ChangeLog: * config/i386/i386.cc (symbolic_reference_mentioned_p): Use LABEL_REF_P predicate instead of open coding it. (ix86_legitimate_constant_p): Ditto. (legitimate_pic_address_disp_p): Ditto. (ix86_legitimate_address_p): Ditto. (legitimize_pic_address): Ditto. (ix86_print_operand): Ditto. (ix86_print_operand_address_as): Ditto. (ix86_rip_relative_addr_p): Ditto. * config/i386/i386.h (SYMBOLIC_CONST): Ditto. * config/i386/i386.md (*anddi_1 to *andsi_1_zext splitter): Ditto. * config/i386/predicates.md (symbolic_operand): Ditto. (local_symbolic_operand): Ditto. (vsib_address_operand): Ditto.
2025-07-16i386: Use SYMBOL_REF_P predicate instead of open coding itUros Bizjak6-46/+45
No functional changes. gcc/ChangeLog: * config/i386/i386-expand.cc (ix86_expand_move): Use SYMBOL_REF_P predicate instead of open coding it. (ix86_split_long_move): Ditto. (construct_plt_address): Ditto. (ix86_expand_call): Ditto. (ix86_notrack_prefixed_insn_p): Ditto. * config/i386/i386-features.cc (rest_of_insert_endbr_and_patchable_area): Ditto. * config/i386/i386.cc (symbolic_reference_mentioned_p): Ditto. (ix86_force_load_from_GOT_p): Ditto. (ix86_legitimate_constant_p): Ditto. (legitimate_pic_operand_p): Ditto. (legitimate_pic_address_disp_p): Ditto. (ix86_legitimate_address_p): Ditto. (legitimize_pic_address): Ditto. (ix86_legitimize_address): Ditto. (ix86_delegitimize_tls_address): Ditto. (ix86_print_operand): Ditto. (ix86_print_operand_address_as): Ditto. (ix86_rip_relative_addr_p): Ditto. (symbolic_base_address_p): Ditto. * config/i386/i386.h (SYMBOLIC_CONST): Ditto. * config/i386/i386.md (*anddi_1 to *andsi_1_zext splitter): Ditto. * config/i386/predicates.md (symbolic_operand): Ditto. (local_symbolic_operand): Ditto. (local_func_symbolic_operand): Ditto.
2025-07-16i386: Use CONST_VECTOR_P predicate instead of open coding itUros Bizjak4-22/+22
No functional changes. gcc/ChangeLog: * config/i386/i386-expand.cc (ix86_expand_vector_logical_operator): Use CONST_VECTOR_P instead of open coding it. (ix86_expand_int_sse_cmp): Ditto. (ix86_extract_perm_from_pool_constant): Ditto. (ix86_split_to_parts): Ditto. (const_vector_equal_evenodd_p): Ditto. * config/i386/i386.cc (ix86_print_operand): Ditto. * config/i386/predicates.md (zero_extended_scalar_load_operand): Ditto. (float_vector_all_ones_operand): Ditto. * config/i386/sse.md (avx512vl_vextractf128<mode>): Ditto.
2025-07-16tree-optimization/121049 - avoid loop masking with even/odd reductionRichard Biener4-0/+68
The following disables loop masking when we are using an even/odd widening operation in a reduction because the loop mask then aligns to the wrong elements. PR tree-optimization/121049 * internal-fn.h (widening_evenodd_fn_p): Declare. * internal-fn.cc (widening_evenodd_fn_p): New function. * tree-vect-stmts.cc (vectorizable_conversion): When using an even/odd widening function disable loop masking. * gcc.dg/vect/pr121049.c: New testcase.
2025-07-16ifconv: simple factor out operators while doing ifcvt [PR119920]Andrew Pinski4-0/+362
For possible reductions, ifconv currently handles if the addition is on one side of the if. But in the case of PR 119920, the reduction addition is on both sides of the if. E.g. ``` if (_27 == 0) goto <bb 14>; [50.00%] else goto <bb 13>; [50.00%] <bb 14> a_29 = b_14(D) + a_17; goto <bb 15>; [100.00%] <bb 13> a_28 = c_12(D) + a_17; <bb 15> # a_30 = PHI <a_28(13), a_29(14)> ``` Which ifcvt converts into: ``` _34 = _32 + _33; a_15 = (int) _34; _23 = _4 == 0; _37 = _33 + _35; a_13 = (int) _37; a_5 = _23 ? a_15 : a_13; ``` But the vectorizer does not recognize this as a reduction. To fix this, we should factor out the addition from the `if`. This allows us to get: ``` iftmp.0_7 = _22 ? b_13(D) : c_12(D); a_14 = iftmp.0_7 + a_18; ``` Which then the vectorizer recognizes as a reduction. In the case of PR 112324 and PR 110015, it is similar but with MAX_EXPR reduction instead of an addition. Note while this should be done in phiopt, there are regressions due to other passes not able to handle the factored out cases (see linked bug to PR 64700). I have not had time to fix all of the passes that could handle the addition being in the if/then/else rather than being outside yet. So this is I thought it would be useful just to have a localized version in ifconv which is then only used for the vectorizer. Bootstrapped and tested on x86_64-linux-gnu. PR tree-optimization/119920 PR tree-optimization/112324 PR tree-optimization/110015 gcc/ChangeLog: * tree-if-conv.cc (find_different_opnum): New function. (factor_out_operators): New function. (predicate_scalar_phi): Call factor_out_operators when there is only 2 elements of a phi. gcc/testsuite/ChangeLog: * gcc.dg/vect/vect-reduc-cond-1.c: New test. * gcc.dg/vect/vect-reduc-cond-2.c: New test. * gcc.dg/vect/vect-reduc-cond-3.c: New test. Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
2025-07-16ifconv: Small improvement to fold_build_cond_expr; lhs and rhs being the same.Andrew Pinski1-0/+4
This is a small compile time optimization, as match and simplify will generate the same thing but with rhs and lhs being the same we can return early instead of having to go through match and simplify. This might not show up that much at this point but can/will show up after my patch for PR 119920 where we factor out common code between the 2 sides of the if statement while in if-conv. Bootstrapped and tested on x86_64-linux-gnu. gcc/ChangeLog: * tree-if-conv.cc (fold_build_cond_expr): Return early if lhs and rhs are the same. Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
2025-07-16ifconv: Remove unused array predicatedAndrew Pinski1-4/+1
While starting to improve if-conv, I noticed that predicated was only being set once inside a loop and accessed right below. This became this way due to r14-8869-g8636c538b68068 and before it was needed since it was accessed via 2 loops but now it is only set and then accessed in the next statement, there is no reason for it being there. So let's remove it and just use the value from it instead. Bootstrapped and tested on x86_64-linux-gnu. gcc/ChangeLog: * tree-if-conv.cc (combine_blocks): Remove predicated dynamic array. Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
2025-07-16tree-optimization/121116 - avoid _BitInt for vector element initRichard Biener2-0/+22
When having a _BitInt induction we should make sure to not create the step vector elements as _BitInts but as vector element typed. PR tree-optimization/121116 * tree-vect-loop.cc (vectorizable_induction): Use the step vector element type for further processing. * gcc.dg/torture/pr121116.c: New testcase.
2025-07-16amdgcn: Fix various unrecognized pattern issues with add<mode>3_vcc_dupAndrew Stubbs1-11/+11
The patterns did not accept inline immediate constants, even though the hardware instructions do, which has lead to some errors in some patches I'm working on. Also the VCC update RTL was using the wrong operands in the wrong places. This appears to have been harmless(?) but is definitely not intended. gcc/ChangeLog: * config/gcn/gcn-valu.md (add<mode>3_vcc_dup<exec_vcc>): Change operand 2 to allow gcn_alu_operand. Swap the operands in the VCC update RTL. (add<mode>3_vcc_zext_dup): Likewise. (add<mode>3_vcc_zext_dup_exec): Likewise. (add<mode>3_vcc_zext_dup2): Likewise. (add<mode>3_vcc_zext_dup2_exec): Likewise.
2025-07-16aarch64: Fold builtins with highpart args to highpart equivalent [PR117850]Spencer Abson9-72/+1304
Add a fold at gimple_fold_builtin to prefer the highpart variant of a builtin if at least one argument is a vector highpart and all others are VECTOR_CSTs that we can extend to 128-bits. For example, we prefer to duplicate f0 and use UMULL2 here over DUP+UMULL: uint16x8_t foo (const uint8x16_t s) { const uint8x8_t f0 = vdup_n_u8 (4); return vmull_u8 (vget_high_u8 (s), f0); } gcc/ChangeLog: PR target/117850 * config/aarch64/aarch64-builtins.cc (LO_HI_PAIRINGS): New, group the lo/hi pairs from aarch64-builtin-pairs.def. (aarch64_get_highpart_builtin): New function. (aarch64_v128_highpart_ref): New function, helper to look for vector highparts. (aarch64_build_vector_cst): New function, helper to build duplicated VECTOR_CSTs. (aarch64_fold_lo_call_to_hi): New function. (aarch64_general_gimple_fold_builtin): Add cases for the lo builtins in aarch64-builtin-pairs.def. * config/aarch64/aarch64-builtin-pairs.def: New file, declare the parirs of lowpart-operating and highpart-operating builtins. gcc/testsuite/ChangeLog: PR target/117850 * gcc.target/aarch64/simd/vabal_combine.c: Removed. This is covered by fold_to_highpart_1.c * gcc.target/aarch64/simd/fold_to_highpart_1.c: New test. * gcc.target/aarch64/simd/fold_to_highpart_2.c: Likewise. * gcc.target/aarch64/simd/fold_to_highpart_3.c: Likewise. * gcc.target/aarch64/simd/fold_to_highpart_4.c: Likewise. * gcc.target/aarch64/simd/fold_to_highpart_5.c: Likewise. * gcc.target/aarch64/simd/fold_to_highpart_6.c: Likewise.
2025-07-16Add get_clone_versions and get_target_version functions.Alfie Richards3-1/+73
This is a reimplementation of get_target_clone_attr_len, get_attr_str, and separate_attrs using string_slice and auto_vec to make memory management and use simpler. Adds get_target_version helper function to get the target_version string from a decl. gcc/c-family/ChangeLog: * c-attribs.cc (handle_target_clones_attribute): Change to use get_clone_versions. gcc/ChangeLog: * tree.cc (get_clone_versions): New function. (get_clone_attr_versions): New function. (get_version): New function. * tree.h (get_clone_versions): New function. (get_clone_attr_versions): New function. (get_target_version): New function.
2025-07-16Change make_attribute to take string_slice.Alfie Richards2-12/+6
gcc/ChangeLog: * attribs.cc (make_attribute): Change arguments. * attribs.h (make_attribute): Change arguments.
2025-07-16Remove unnecessary `record` argument from maybe_version_functions.Alfie Richards3-17/+12
Previously, the `record` argument in maybe_version_function allowed the call to cgraph_node::record_function_versions to be skipped. However, this was only skipped when both decls were already marked as versioned, in which case we trigger the early exit in record_function_versions instead. Therefore, the argument is unnecessary. gcc/cp/ChangeLog: * class.cc (add_method): Remove argument. * cp-tree.h (maybe_version_functions): Ditto. * decl.cc (decls_match): Ditto. (maybe_version_functions): Ditto.
2025-07-16Add string_slice class.Alfie Richards6-4/+306
The string_slice inherits from array_slice and is used to refer to a substring of an array that is memory managed elsewhere without modifying the underlying array. For example, this is useful in cases such as when needing to refer to a substring of an attribute in the syntax tree. Adds some minimal helper functions for string_slice, such as a strtok alternative, equality operators, strcmp, and a function to strip whitespace from the beginning and end of a string_slice. gcc/c-family/ChangeLog: * c-format.cc (local_string_slice_node): New node type. (asm_fprintf_char_table): New entry. (init_dynamic_diag_info): Add support for string_slice. * c-format.h (T_STRING_SLICE): New node type. gcc/ChangeLog: * pretty-print.cc (format_phase_2): Add support for string_slice. * vec.cc (string_slice::tokenize): New static method. (string_slice::strcmp): New static method. (string_slice::strip): New method. (test_string_slice_initializers): New test. (test_string_slice_tokenize): Ditto. (test_string_slice_strcmp): Ditto. (test_string_slice_equality): Ditto. (test_string_slice_inequality): Ditto. (test_string_slice_invalid): Ditto. (test_string_slice_strip): Ditto. (vec_cc_tests): Add new tests. * vec.h (class string_slice): New class. gcc/testsuite/ChangeLog * g++.dg/warn/Wformat-gcc_diag-1.C: Add string_slice "%B" format tests.
2025-07-16expand: Allow fixed-point arithmetic for RDIV_EXPR.Robin Dapp3-2/+15
r16-2175-g5aa21765236730 introduced an assert for floating-point modes when expanding an RDIV_EXPR but forgot fixed-point modes. This patch adds ALL_FIXED_POINT_MODE_P to the assert. PR middle-end/121065 gcc/ChangeLog: * cfgexpand.cc (expand_debug_expr): Allow fixed-point modes for RDIV_EXPR. * optabs-tree.cc (optab_for_tree_code): Ditto. gcc/testsuite/ChangeLog: * gcc.target/arm/pr121065.c: New test.
2025-07-16RISC-V: Fix vsetvl merge rule.Robin Dapp2-3/+53
In PR120297 we fuse vsetvl e8,mf2,... vsetvl e64,m1,... into vsetvl e64,m4,... Individually, that's ok but we also change the new vsetvl's demand to "SEW only" even though the first original one demanded SEW >= 8 and ratio = 16. As we forget the ratio after the merge we find that the vsetvl following the merged one has ratio = 64 demand and we fuse into vsetvl e64,m1,.. which obviously doesn't have ratio = 16 any more. Regtested on rv64gcv_zvl512b. PR target/120297 gcc/ChangeLog: * config/riscv/riscv-vsetvl.def: Do not forget ratio demand of previous vsetvl. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/pr120297.c: New test.
2025-07-16aarch64: Use SVE2 BSL2N for vector EONKyrylo Tkachov2-0/+86
SVE2 BSL2N (x, y, z) = (x & z) | (~y & ~z). When x == y this computes: (x & z) | (~x & ~z) which is ~(x ^ z). Thus, we can use it to match RTL patterns (not (xor (...) (...))) for both Advanced SIMD and SVE modes when TARGET_SVE2. This patch does that. For code like: uint64x2_t eon_q(uint64x2_t a, uint64x2_t b) { return EON(a, b); } svuint64_t eon_z(svuint64_t a, svuint64_t b) { return EON(a, b); } We now generate: eon_q: bsl2n z0.d, z0.d, z0.d, z1.d ret eon_z: bsl2n z0.d, z0.d, z0.d, z1.d ret instead of the previous: eon_q: eor v0.16b, v0.16b, v1.16b not v0.16b, v0.16b ret eon_z: eor z0.d, z0.d, z1.d ptrue p3.b, all not z0.d, p3/m, z0.d ret Bootstrapped and tested on aarch64-none-linux-gnu. Signed-off-by: Kyrylo Tkachov <ktkachov@nvidia.com> gcc/ * config/aarch64/aarch64-sve2.md (*aarch64_sve2_bsl2n_eon<mode>): New pattern. (*aarch64_sve2_eon_bsl2n_unpred<mode>): Likewise. gcc/testsuite/ * gcc.target/aarch64/sve2/eon_bsl2n.c: New test.
2025-07-16aarch64: Use SVE2 NBSL for vector NOR and NAND for Advanced SIMD modesKyrylo Tkachov2-0/+97
We already have patterns to use the NBSL instruction to implement vector NOR and NAND operations for SVE types and modes. It is straightforward to have similar patterns for the fixed-width Advanced SIMD modes as well, though it requires combine patterns without the predicate operand and an explicit 'Z' output modifier. This patch does so. So now for example we generate for: uint64x2_t nand_q(uint64x2_t a, uint64x2_t b) { return NAND(a, b); } uint64x2_t nor_q(uint64x2_t a, uint64x2_t b) { return NOR(a, b); } nand_q: nbsl z0.d, z0.d, z1.d, z1.d ret nor_q: nbsl z0.d, z0.d, z1.d, z0.d ret instead of the previous: nand_q: and v0.16b, v0.16b, v1.16b not v0.16b, v0.16b ret nor_q: orr v0.16b, v0.16b, v1.16b not v0.16b, v0.16b ret The tied operand requirements for NBSL mean that we can generate the MOVPRFX when the operands fall that way, but I guess having a 2-insn MOVPRFX form is not worse than the current 2-insn codegen at least, and the MOVPRFX can be fused by many cores. Bootstrapped and tested on aarch64-none-linux-gnu. Signed-off-by: Kyrylo Tkachov <ktkachov@nvidia.com> gcc/ * config/aarch64/aarch64-sve2.md (*aarch64_sve2_unpred_nor<mode>): New define_insn. (*aarch64_sve2_nand_unpred<mode>): Likewise. gcc/testsuite/ * gcc.target/aarch64/sve2/nbsl_nor_nand_neon.c: New test.
2025-07-16Fortran: Fix ICE in ASSOCIATE with user defined operator [PR121060]Paul Thomas2-0/+57
2025-07-16 Paul Thomas <pault@gcc.gnu.org> gcc/fortran PR fortran/121060 * interface.cc (matching_typebound_op): Defer determination of specific procedure until resolution by returning NULL. gcc/testsuite/ PR fortran/121060 * gfortran.dg/associate_75.f90: New test.
2025-07-16Fortran: Fix ICE in F2018 IMPORT statements.Paul Thomas2-3/+27
2025-07-16 Steve Kargl <sgk@troutmask.apl.washington.edu> gcc/fortran * decl.cc (gfc_match_import): Correct minor whitespace snafu and fix NULL pointer dereferences in two places. gcc/testsuite/ * gfortran.dg/import13.f90: New test.
2025-07-15c, c++: Fix unused result for empty types [PR82134]Jeremy Rifkin5-0/+21
Hi, This fixes PR c/82134 which concerns gcc emitting an incorrect unused result diagnostic for empty types. This diagnostic is emitted from tree-cfg.cc because of a couple code paths which attempt to avoid copying empty types, resulting in GIMPLE that isn't using the returned value of a call. To fix this I've added suppress_warning in three locations and a corresponding check in do_warn_unused_result. Cheers, Jeremy PR c/82134 gcc/cp/ChangeLog: * call.cc (build_call_a): Add suppress_warning * cp-gimplify.cc (cp_gimplify_expr): Add suppress_warning gcc/ChangeLog: * gimplify.cc (gimplify_modify_expr): Add suppress_warning * tree-cfg.cc (do_warn_unused_result): Check warning_suppressed_p gcc/testsuite/ChangeLog: * c-c++-common/attr-warn-unused-result-2.c: New test. Signed-off-by: Jeremy Rifkin <jeremy@rifkin.dev>
2025-07-16i386: Decouple AMX-AVX512 from AVX10.2 and imply AVX512FHaochen Jiang5-11/+10
In ISE058, the AVX10.2 imply is removed from AMX-AVX512. This leads to re-consideration on the imply for AMX-AVX512. Since it is using zmm register and using zmm register only, we need to at least imply AVX512F. AVX512VL is not needed. On the other hand, if we imply AVX10.1 for AMX-AVX512, it will cause -mno-avx10.1 disabling AMX-AVX512. This would be a surprise for users. Based on the two reasons above, the patch is decoupling AMX-AVX512 from AVX10.2 and imply AVX512F. gcc/ChangeLog: * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_AMX_AVX512_SET): Do not set AVX10.2. (OPTION_MASK_ISA2_AVX10_2_UNSET): Remove AMX-AVX512 unset. (OPTION_MASK_ISA2_AVX512F_UNSET): Unset AMX-AVX512. (ix86_handle_option): Imply AVX512F for AMX-AVX512. gcc/testsuite/ChangeLog: * gcc.target/i386/amxavx512-cvtrowd2ps-2.c: Add -mavx512fp16 to use FP16 related intrins for convert. * gcc.target/i386/amxavx512-cvtrowps2bf16-2.c: Ditto. * gcc.target/i386/amxavx512-cvtrowps2ph-2.c: Ditto. * gcc.target/i386/amxavx512-movrow-2.c: Ditto.
2025-07-16RISC-V: Refine the scalar SAT_* test casesPan Li262-4101/+517
Per previous discuss with Jeff, we don't do complicated asm check like scalar saturation alu. It is somehow not easy to maintain, as well as fragile. Thus, we remove these function-body check, and introduce the jmp label asm check instead.The code-gen of SAT_* will never have a jmp, and the other run test will make sure the correctness of SAT_* code-gen. The below test suites are passed for this patch series. * The rv64gcv fully regression test. The below failed test cases are resolved: FAIL: gcc.target/riscv/sat/sat_s_add_imm-2-i8.c -Oz check-function-bodies sat_s_add_imm_int8_t_fmt_2_1 FAIL: gcc.target/riscv/sat/sat_s_add_imm-2-i8.c -Os check-function-bodies sat_s_add_imm_int8_t_fmt_2_1 FAIL: gcc.target/riscv/sat/sat_s_add_imm-2-i8.c -O3 check-function-bodies sat_s_add_imm_int8_t_fmt_2_1 FAIL: gcc.target/riscv/sat/sat_s_add_imm-2-i8.c -Ofast check-function-bodies sat_s_add_imm_int8_t_fmt_2_1 FAIL: gcc.target/riscv/sat/sat_s_add_imm-2-i8.c -O2 check-function-bodies sat_s_add_imm_int8_t_fmt_2_1 gcc/testsuite/ChangeLog: * gcc.target/riscv/sat/sat_s_add-1-i16.c: Remove function-body check and add no jmp label asm check. * gcc.target/riscv/sat/sat_s_add-1-i32.c: * gcc.target/riscv/sat/sat_s_add-1-i64.c: Ditto. * gcc.target/riscv/sat/sat_s_add-1-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_add-2-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_add-2-i32.c: Ditto. * gcc.target/riscv/sat/sat_s_add-2-i64.c: Ditto. * gcc.target/riscv/sat/sat_s_add-2-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_add-3-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_add-3-i32.c: Ditto. * gcc.target/riscv/sat/sat_s_add-3-i64.c: Ditto. * gcc.target/riscv/sat/sat_s_add-3-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_add-4-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_add-4-i32.c: Ditto. * gcc.target/riscv/sat/sat_s_add-4-i64.c: Ditto. * gcc.target/riscv/sat/sat_s_add-4-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_add_imm-1-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_add_imm-1-i32.c: Ditto. * gcc.target/riscv/sat/sat_s_add_imm-1-i64.c: Ditto. * gcc.target/riscv/sat/sat_s_add_imm-1-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_add_imm-2-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_add_imm-2-i32.c: Ditto. * gcc.target/riscv/sat/sat_s_add_imm-2-i64.c: Ditto. * gcc.target/riscv/sat/sat_s_add_imm-2-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_sub-1-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_sub-1-i32.c: Ditto. * gcc.target/riscv/sat/sat_s_sub-1-i64.c: Ditto. * gcc.target/riscv/sat/sat_s_sub-1-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_sub-2-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_sub-2-i32.c: Ditto. * gcc.target/riscv/sat/sat_s_sub-2-i64.c: Ditto. * gcc.target/riscv/sat/sat_s_sub-2-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_sub-3-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_sub-3-i32.c: Ditto. * gcc.target/riscv/sat/sat_s_sub-3-i64.c: Ditto. * gcc.target/riscv/sat/sat_s_sub-3-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_sub-4-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_sub-4-i32.c: Ditto. * gcc.target/riscv/sat/sat_s_sub-4-i64.c: Ditto. * gcc.target/riscv/sat/sat_s_sub-4-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-1-i16-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-1-i32-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i32.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-1-i64-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-2-i16-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-2-i32-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i32.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-2-i64-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-3-i16-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-3-i32-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i32.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-3-i64-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-4-i16-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-4-i32-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i32.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-4-i64-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-5-i16-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-5-i32-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i32.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-5-i64-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-6-i16-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-6-i32-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i32.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-6-i64-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-7-i16-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-7-i32-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i32.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-7-i64-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-8-i16-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-8-i32-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i16.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i32.c: Ditto. * gcc.target/riscv/sat/sat_s_trunc-8-i64-to-i8.c: Ditto. * gcc.target/riscv/sat/sat_u_add-1-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_add-1-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_add-1-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_add-1-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_add-2-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_add-2-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_add-2-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_add-2-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_add-3-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_add-3-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_add-3-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_add-3-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_add-4-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_add-4-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_add-4-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_add-4-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_add-5-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_add-5-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_add-5-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_add-5-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_add-6-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_add-6-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_add-6-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_add-6-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_add-7-u16-from-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_add-7-u16-from-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_add-7-u32-from-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_add-7-u8-from-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_add-7-u8-from-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_add-7-u8-from-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_add_imm-1-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_add_imm-1-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_add_imm-1-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_add_imm-1-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_add_imm-2-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_add_imm-2-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_add_imm-2-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_add_imm-2-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_add_imm-3-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_add_imm-3-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_add_imm-3-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_add_imm-3-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_add_imm-4-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_add_imm-4-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_add_imm-4-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_add_imm-4-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_mul-1-u16-from-u128.c: Ditto. * gcc.target/riscv/sat/sat_u_mul-1-u32-from-u128.c: Ditto. * gcc.target/riscv/sat/sat_u_mul-1-u64-from-u128.c: Ditto. * gcc.target/riscv/sat/sat_u_mul-1-u8-from-u128.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-1-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-1-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-1-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-1-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-10-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-10-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-10-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-10-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-11-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-11-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-11-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-11-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-12-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-12-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-12-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-12-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-2-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-2-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-2-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-2-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-3-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-3-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-3-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-3-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-4-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-4-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-4-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-4-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-5-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-5-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-5-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-5-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-6-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-6-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-6-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-6-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-7-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-7-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-7-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-7-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-8-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-8-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-8-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-8-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-9-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-9-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-9-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub-9-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u16-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u16-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u16-3.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u16-4.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u32-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u32-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u32-3.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u32-4.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u64-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u64-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u8-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u8-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u8-3.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u8-4.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-1-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u16-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u16-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u16-3.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u32-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u32-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u32-3.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u64-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u8-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u8-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u8-3.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-2-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-3-u16-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-3-u16-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-3-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-3-u32-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-3-u32-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-3-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-3-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-3-u8-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-3-u8-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-3-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-4-u16-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-4-u16-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-4-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-4-u32-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-4-u32-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-4-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-4-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-4-u8-1.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-4-u8-2.c: Ditto. * gcc.target/riscv/sat/sat_u_sub_imm-4-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-1-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-1-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-1-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-1-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-2-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-2-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-2-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-2-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-3-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-3-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-3-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-3-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-4-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-4-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-4-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-4-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-5-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-5-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-5-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-5-u8.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-6-u16.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-6-u32.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-6-u64.c: Ditto. * gcc.target/riscv/sat/sat_u_trunc-6-u8.c: Ditto. Signed-off-by: Pan Li <pan2.li@intel.com>
2025-07-16RISC-V: Support RVVDImode for avg3_floor auto vectPan Li17-13/+59
The avg3_floor pattern leverage the add and shift rtl with the DOUBLE_TRUNC mode iterator. Aka, RVVDImode iterator will generate avg3rvvsimode_floor, only the element size QI, HI and SI are allowed. Thus, this patch would like to support the DImode by the standard name, with the iterator V_VLSI_D. The below test suites are passed for this patch series. * The rv64gcv fully regression test. gcc/ChangeLog: * config/riscv/autovec.md (avg<mode>3_floor): Add new pattern of avg3_floor for rvv DImode. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/autovec/avg.h: Add int128 type when xlen == 64. * gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i16-from-i32.c: Suppress __int128 warning for run test. * gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i16-from-i64.c: Ditto. * gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i32-from-i64.c: Ditto. * gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i8-from-i16.c: Ditto. * gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i8-from-i32.c: Ditto. * gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i8-from-i64.c: Ditto. * gcc.target/riscv/rvv/autovec/avg_data.h: Fix one incorrect test data. * gcc.target/riscv/rvv/autovec/avg_floor-run-1-i16-from-i32.c: Ditto. * gcc.target/riscv/rvv/autovec/avg_floor-run-1-i16-from-i64.c: Ditto. * gcc.target/riscv/rvv/autovec/avg_floor-run-1-i32-from-i64.c: Ditto. * gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-from-i16.c: Ditto. * gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-from-i32.c: Ditto. * gcc.target/riscv/rvv/autovec/avg_floor-run-1-i8-from-i64.c: Ditto. * gcc.target/riscv/rvv/autovec/avg_floor-1-i64-from-i128.c: New test. * gcc.target/riscv/rvv/autovec/avg_floor-run-1-i64-from-i128.c: New test. Signed-off-by: Pan Li <pan2.li@intel.com>
2025-07-16Daily bump.GCC Administrator9-1/+481
2025-07-15spellcheck.{cc,h}: modernizationDavid Malcolm2-61/+66
No functional change intended. gcc/ChangeLog: * spellcheck.cc: Define INCLUDE_ALGORITHM. (CASE_COST, BASE_COST): Convert to... (case_cost, base_cost): ...these, in an anonymous namespace. (get_edit_distance): Update for above. Use std::min rather than MIN. (get_edit_distance_cutoff): Likewise. Use std::max rather than MAX. (selftest::test_edit_distances): Update for BASE_COST renaming. (selftest::get_old_cutoff): Likewise. Use std::max. (selftest::assert_not_suggested_for): Use nullptr. (selftest::test_find_closest_string): Likewise. * spellcheck.h: Replace TYPE with StringLikeType in templates, and use CamelCase. Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2025-07-15libgdiagnostics: add diagnostic_message_buffer [PR120792]David Malcolm28-205/+1852
This patch extends libgdiagnostics to provide a way to capture the pp tokens making up a message string, so that SARIF and HTML sinks can retain information such as event IDs and URLs. As well as richer output, this improves the round-tripping of such information through sarif-replay. This also allows diagnostic messages to be built up in pieces, with a drop-in replacement for fprintf, which I've found useful when attempting to port "ld" to use libgdiagnostics. gcc/ChangeLog: PR sarif-replay/120792 * auto-obstack.h: New file, based on material taken from pretty-print.cc. * diagnostic-digraphs.h (diagnostics::digraphs::digraph::set_description): New. (diagnostics::digraphs::node::set_label): New. * doc/libgdiagnostics/topics/compatibility.rst: Add LIBGDIAGNOSTICS_ABI_4. * doc/libgdiagnostics/topics/diagnostics.rst (diagnostic_finish_via_msg_buf): Document new entrypoint. * doc/libgdiagnostics/topics/execution-paths.rst (diagnostic_execution_path_add_event_via_msg_buf): Document new entrypoint. * doc/libgdiagnostics/topics/index.rst: Add message-buffers.rst. * doc/libgdiagnostics/topics/message-buffers.rst: New file. * doc/libgdiagnostics/topics/message-formatting.rst: Add note about message buffers. * doc/libgdiagnostics/topics/physical-locations.rst (diagnostic_add_location_with_label_via_msg_buf): Add. * doc/libgdiagnostics/tutorial/07-execution-paths.rst: Link to next section. * doc/libgdiagnostics/tutorial/08-message-buffers.rst: New file. * doc/libgdiagnostics/tutorial/index.rst: Add 08-message-buffers.rst. * libgdiagnostics++.h (libgdiagnostics::message_buffer): New class. (libgdiagnostics::execution_path::add_event_via_msg_buf): New. (libgdiagnostics::diagnostic::add_location_with_label): New. (libgdiagnostics::diagnostic::finish_via_msg_buf): New. (libgdiagnostics::graph::set_description): New overload. (libgdiagnostics::graph::add_edge): New overload. (libgdiagnostics::node::set_label): New overload. * libgdiagnostics-private.h (private_diagnostic_execution_path_add_event_2): Drop decl. (private_diagnostic_execution_path_add_event_3): New decl. * libgdiagnostics.cc: Include "pretty-print-format-impl.h", "pretty-print-markup.h", and "auto-obstack.h". (class copying_token_printer): New. (struct diagnostic_message_buffer): New. (class pp_element_message_buffer): New. (libgdiagnostics_path_event::libgdiagnostics_path_event): Replace params "gmsgid" and "args" with "msg_buf". (libgdiagnostics_path_event::print_desc): Reimplement using pp_element_message_buffer to replay m_msg_buf into "pp". (libgdiagnostics_path_event::m_desc_uncolored): Drop field. (libgdiagnostics_path_event::m_desc_colored): Drop field. (libgdiagnostics_path_event::msg_buf): New field. (diagnostic_execution_path::add_event_va): Reimplement. (diagnostic_execution_path::add_event_via_msg_buf): New. (diagnostic::add_location_with_label): New overload, using msg_buf. (diagnostic_manager::emit): Reimplement with... (diagnostic_manager::emit_va): ...this. (diagnostic_manager::emit_msg_buf): New. (FAIL_IF_NULL): Rename "p" to "ptr_arg". (diagnostic_finish_va): Update to use diagnostic_manager::emit_va. (diagnostic_graph::add_node_with_id): Rename "id" to "node_id". (diagnostic_graph_add_node): Likewise. (diagnostic_graph_add_edge): Rename "id" to "edge_id". (diagnostic_graph_get_node_by_id): Rename "id" to "node_id". (diagnostic_graph_get_edge_by_id): Rename "id" to "edge_id". (private_diagnostic_execution_path_add_event_2): Delete. (diagnostic_message_buffer_new): New public entrypoint. (diagnostic_message_buffer_release): Likewise. (diagnostic_message_buffer_append_str): Likewise. (diagnostic_message_buffer_append_text): Likewise. (diagnostic_message_buffer_append_byte): Likewise. (diagnostic_message_buffer_append_printf): Likewise. (diagnostic_message_buffer_append_event_id): Likewise. (diagnostic_message_buffer_begin_url): Likewise. (diagnostic_message_buffer_end_url): Likewise. (diagnostic_message_buffer_begin_quote): Likewise. (diagnostic_message_buffer_end_quote): Likewise. (diagnostic_message_buffer_begin_color): Likewise. (diagnostic_message_buffer_end_color): Likewise. (diagnostic_message_buffer_dump): Likewise. (diagnostic_finish_via_msg_buf): Likewise. (diagnostic_add_location_with_label_via_msg_buf): Likewise. (diagnostic_execution_path_add_event_via_msg_buf): Likewise. (diagnostic_graph_set_description_via_msg_buf): Likewise. (diagnostic_graph_add_edge_via_msg_buf): Likewise. (diagnostic_node_set_label_via_msg_buf): Likewise. (private_diagnostic_execution_path_add_event_3): New private entrypoint. * libgdiagnostics.h (LIBGDIAGNOSTICS_PARAM_FORMAT_STRING): New macro. (LIBGDIAGNOSTICS_PARAM_PRINTF_FORMAT_STRING): New macro. (diagnostic_message_buffer): New typedef. (LIBDIAGNOSTICS_HAVE_diagnostic_message_buffer): New define. (diagnostic_message_buffer_new): New decl. (diagnostic_message_buffer_release): New decl. (diagnostic_message_buffer_append_str): New decl. (diagnostic_message_buffer_append_text): New decl. (diagnostic_message_buffer_append_byte): New decl. (diagnostic_message_buffer_append_printf): New decl. (diagnostic_message_buffer_append_event_id): New decl. (diagnostic_message_buffer_begin_url): New decl. (diagnostic_message_buffer_end_url): New decl. (diagnostic_message_buffer_begin_quote): New decl. (diagnostic_message_buffer_end_quote): New decl. (diagnostic_message_buffer_begin_color): New decl. (diagnostic_message_buffer_end_color): New decl. (diagnostic_message_buffer_dump): New decl. (diagnostic_finish_via_msg_buf): New decl. (diagnostic_add_location_with_label_via_msg_buf): New decl. (diagnostic_execution_path_add_event_via_msg_buf): New decl. (diagnostic_graph_set_description_via_msg_buf): New decl. (diagnostic_graph_add_edge_via_msg_buf): New decl. (diagnostic_node_set_label_via_msg_buf): New decl. * libgdiagnostics.map (LIBGDIAGNOSTICS_ABI_3): Drop private_diagnostic_execution_path_add_event_2. (LIBGDIAGNOSTICS_ABI_4): New. * libsarifreplay.cc (class annotation): Use libgdiagnostics::message_buffer rather than label_text. (add_any_annotations): Likewise. (sarif_replayer::handle_result_obj): Likewise. (make_plain_text_within_result_message): Likewise. (handle_thread_flow_location_object): Likewise. (handle_location_object): Likewise. (sarif_replayer::handle_graph_object): Likewise. (sarif_replayer::handle_node_object): Likewise. (sarif_replayer::handle_edge_object): Likewise. * pretty-print-format-impl.h (pp_token_list::push_back_byte): New decl. * pretty-print-markup.h (pp_markup::context::begin_url): New decl. (pp_markup::context::end_url): New decl. (pp_markup::context::add_event_id): New decl. * pretty-print.cc: Include "auto-obstack.h". (pp_token_list::push_back_byte): New. (struct auto_obstack): Move to auto-obstack.h. (default_token_printer): Make non-static. (pp_markup::context::begin_url): New. (pp_markup::context::end_url): New. (pp_markup::context::add_event_id): New. gcc/testsuite/ChangeLog: PR sarif-replay/120792 * libgdiagnostics.dg/sarif.py: Delete duplicate script. * libgdiagnostics.dg/test-message-buffer-c.py: New test script. * libgdiagnostics.dg/test-message-buffer.c: New test. * libgdiagnostics.dg/test-warning-with-path-c.py: Update expected output to reflect that SARIF for event messages now contains JSON pointers when referring to other events by ID. * sarif-replay.dg/2.1.0-valid/3.11.6-embedded-links.sarif: Add HTML and SARIF output, and call out to Python scripts to verify the output. Add example of a result with a link in its message. * sarif-replay.dg/2.1.0-valid/embedded-links-check-html.py: New test script. * sarif-replay.dg/2.1.0-valid/embedded-links-check-sarif-roundtrip.py: New test script. Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2025-07-15c++: don't mark void exprs as read [PR44677]Jason Merrill3-40/+15
In Jakub's patch for PR44677 he added code to prevent mark_exp_read on e.g. (void)++i from marking i as read, but it seems to me that we can generalize that to avoid looking any farther into any void expression; you can't read a void value, and an explicit cast will have already called mark_exp_read on its operand in convert_to_void. For testing I added an assert to catch places where we were trying to mark void expressions as read, and fix a few that it found. But there were several other places (such as check_return_expr) where we could have a void expression but always calling mark_exp_read makes sense, so I dropped the assert from the final commit. PR c++/44677 gcc/cp/ChangeLog: * cp-gimplify.cc (cp_fold) [CLEANUP_POINT_EXPR]: Don't force rvalue. [COMPOUND_EXPR]: Likewise. * cvt.cc (convert_to_void): Call mark_exp_read later. * expr.cc (mark_use): Turn off read_p for any void argument. (mark_exp_read): Return early for void argument.
2025-07-15[PATCH v5] RISC-V: Mips P8700 Conditional Move Support.Umesh Kalappa10-37/+187
Updated the test for rv32 accordingly and no regress found for runs like "runtest --tool gcc --target_board='riscv-sim/-march=rv32gc_zba_zbb_zbc_zbs/-mabi=ilp32d/-mcmodel=medlow' riscv.exp" and "runtest --tool gcc --target_board='riscv-sim/-march=rv64gc_zba_zbb_zbc_zbs/-mabi=lp64d/-mcmodel=medlow' riscv.exp" lint warnings can be ignored for riscv-cores.def and riscv-ext-mips.def gcc/ChangeLog: * config/riscv/riscv-cores.def (RISCV_CORE): Updated the supported march. * config/riscv/riscv-ext-mips.def (DEFINE_RISCV_EXT): New file added for mips conditional mov extension. * config/riscv/riscv-ext.def: Likewise. * config/riscv/t-riscv: Generates riscv-ext.opt * config/riscv/riscv-ext.opt: Generated file. * config/riscv/riscv.cc (riscv_expand_conditional_move): Updated for mips cmov and outlined some code that handle arch cond move. * config/riscv/riscv.md (mov<mode>cc): updated expand for MIPS CCMOV. * config/riscv/mips-insn.md: New file for mips-p8700 ccmov insn. * doc/riscv-ext.texi: Updated for mips cmov. gcc/testsuite/ChangeLog: * gcc.target/riscv/mipscondmov.c: Test file for mips.ccmov insn.
2025-07-15c++: constexpr uninitialized union [PR120577]Jason Merrill2-3/+48
This was failing for two reasons: 1) We were wrongly treating the basic_string constructor as zero-initializing the object, which it doesn't. 2) Given that, when we went to look for a value for the anonymous union, we concluded that it was value-initialized, and trying to evaluate that broke because we weren't setting ctx->ctor for it. This patch fixes both issues, #1 by setting CONSTRUCTOR_NO_CLEARING and #2 by inserting a new CONSTRUCTOR for the member rather than evaluate it out of context, which is consistent with cxx_eval_store_expression. PR c++/120577 gcc/cp/ChangeLog: * constexpr.cc (cxx_eval_call_expression): Set CONSTRUCTOR_NO_CLEARING on initial value for ctor. (cxx_eval_component_reference): Make value-initialization of an aggregate member explicit. gcc/testsuite/ChangeLog: * g++.dg/cpp2a/constexpr-union9.C: New test.
generated by cgit v1.1 at 2025-09-23 21:12:52 +0000