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The problem here is that the testcase is part of another
testcase but dg-final does not work across source files
so it needs its own dg-* headers to that match up with
afdo-crossmodule-1.c.
Pushed as preapproved in https://gcc.gnu.org/bugzilla/show_bug.cgi?id=120859#c4 .
PR testsuite/120859
gcc/testsuite/ChangeLog:
* gcc.dg/tree-prof/afdo-crossmodule-1b.c: Add some dg-*
commands like what is in afdo-crossmodule-1.c
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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The previous test case doesn't leverage the right test helper macro,
it should be DEF_AVG_0_WRAP instead of DEF_AVG_0. We prefer the
test function name is test_avg_floor_int64_t_int32_t_0 instead
of test_avg_floor_WT_NT_0 for DEF_AVG_0(WT, NT).
The below test suites are passed for this patch.
* The rv64gcv fully regression test.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/avg_floor-1-i16-from-i32.c:
Leverage DEF_AVG_0_WRAP to generate the correct func name.
* gcc.target/riscv/rvv/autovec/avg_floor-1-i16-from-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/avg_floor-1-i32-from-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/avg_floor-1-i64-from-i128.c: Ditto.
* gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/avg_floor-1-i8-from-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/avg_ceil-1-i16-from-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/avg_ceil-1-i16-from-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/avg_ceil-1-i32-from-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/avg_ceil-1-i8-from-i16.c: Ditto.
* gcc.target/riscv/rvv/autovec/avg_ceil-1-i8-from-i32.c: Ditto.
* gcc.target/riscv/rvv/autovec/avg_ceil-1-i8-from-i64.c: Ditto.
* gcc.target/riscv/rvv/autovec/avg_ceil-1-i64-from-i128.c: Ditto.
Signed-off-by: Pan Li <pan2.li@intel.com>
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According to the semantics of the avg_floor and avg_ceil as below:
floor: op0 = (narrow) (((wide) op1 + (wide) op2) >> 1);
ceil: op0 = (narrow) (((wide) op1 + (wide) op2 + 1) >> 1);
Aka we have (const_int 1) as the op2 of the ashiftrt but seems missed.
Thus, add it back to align the definition.
The below test suites are passed for this patch.
* The rv64gcv fully regression test.
gcc/ChangeLog:
* config/riscv/autovec.md: Add (const_int 1) as the op2 of
ashiftrt.
Signed-off-by: Pan Li <pan2.li@intel.com>
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The ctable base address for SBCO/LBCO load/store patterns was
incorrectly stored as unsigned integer. That prevented matching
addresses with bit 31 set, because const_int RTL expression is expected
to be sign-extended.
Fix by using sign-extended 32-bit values for ctable base addresses.
PR target/121124
gcc/ChangeLog:
* config/pru/pru-pragma.cc (pru_pragma_ctable_entry): Handle the
ctable base address as signed 32-bit value, and sign-extend to
HOST_WIDE_INT.
* config/pru/pru-protos.h (struct pru_ctable_entry): Store the
ctable base address as signed.
(pru_get_ctable_exact_base_index): Pass base address as signed.
(pru_get_ctable_base_index): Ditto.
(pru_get_ctable_base_offset): Ditto.
* config/pru/pru.cc (pru_get_ctable_exact_base_index): Ditto.
(pru_get_ctable_base_index): Ditto.
(pru_get_ctable_base_offset): Ditto.
(pru_print_operand_address): Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/pru/pragma-ctable_entry-2.c: New test.
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[PR119100]
This pattern enables the combine pass (or late-combine, depending on the case)
to merge a float_extend'ed vec_duplicate into a (possibly negated) minus-mult
RTL instruction.
Before this patch, we have six instructions, e.g.:
vsetivli zero,4,e32,m1,ta,ma
fcvt.s.h fa5,fa5
vfmv.v.f v4,fa5
vfwcvt.f.f.v v1,v3
vsetvli zero,zero,e32,m1,ta,ma
vfnmadd.vv v1,v4,v2
After, we get only one:
vfwnmacc.vf v1,fa5,v2
PR target/119100
gcc/ChangeLog:
* config/riscv/autovec-opt.md (*vfwnmacc_vf_<mode>): New pattern.
(*vfwnmsac_vf_<mode>): New pattern.
* config/riscv/riscv.cc (get_vector_binary_rtx_cost): Add support for a
vec_duplicate in a neg.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f16.c: Add vfwnmacc and
vfwnmsac.
* gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f32.c: Likewise.
* gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f16.c: Likewise.
* gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f32.c: Likewise.
* gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f16.c: Likewise.
* gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f32.c: Likewise.
* gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f16.c: Likewise.
* gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f32.c: Likewise.
* gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwnmacc-run-1-f16.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwnmacc-run-1-f32.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwnmsac-run-1-f16.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwnmsac-run-1-f32.c: New test.
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> A number of folks have had their fingers in this code and it's going to take
> a few submissions to do everything we want to do.
>
> This patch is primarily concerned with avoiding signaling that fusion can
> occur in cases where it obviously should not be signaling fusion.
Hi Jeff,
With this change, we're liable to ICE whenever prev_set or curr_set are
NULL_RTX. For a fix, how about something like the below?
Thanks,
Artemiy
Introduced in r16-1984-g83d19b5d842dad, initializers for
{prev,curr}_dest_regno can cause an ICE if the respective insn isn't a
single set. Rectify this by inserting a NULL_RTX check before using
{prev,curr}_set.
Regtested on riscv32.
gcc/
* config/riscv/riscv.cc (riscv_macro_fusion_pair_p): Protect
from a NULL PREV_SET or CURR_SET.
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gcc/
* config/avr/avr-passes.cc (avr_optimize_casesi): Fuse
get_insns() with end_sequence().
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This patch fixes the 2nd parameter name mismatch in
ARRAYOFCHAR.mod.
gcc/m2/ChangeLog:
PR modula2/121164
* gm2-libs/ARRAYOFCHAR.mod (Write): Rename 2nd parameter
name a to str.
Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
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PR fortran/121145
gcc/fortran/ChangeLog:
* trans-expr.cc (gfc_conv_procedure_call): Do not create pointer
check for proc-pointer actual passed to optional dummy.
gcc/testsuite/ChangeLog:
* gfortran.dg/pointer_check_15.f90: New test.
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[PR121153]
I missed this when I added the two testcase vect-reduc-cond-[12].c. These testcases
require support of vectorization of `a ? b : c` which some targets (e.g. sparc) does
not support.
Pushed as obvious after a quick test.
PR testsuite/121153
gcc/testsuite/ChangeLog:
* gcc.dg/vect/vect-reduc-cond-1.c: Require vect_condition.
* gcc.dg/vect/vect-reduc-cond-2.c: Likewise.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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Like the avg3_floor pattern, the avg3_ceil has the
similar issue that lack of the RVV DImode support.
Thus, this patch would like to support the DImode by
the standard name, with the iterator V_VLSI_D.
The below test suites are passed for this patch series.
* The rv64gcv fully regression test.
gcc/ChangeLog:
* config/riscv/autovec.md (avg<mode>3_ceil): Add new pattern
of avg3_ceil for RVV DImode
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/avg_data.h: Adjust the test data.
* gcc.target/riscv/rvv/autovec/avg_ceil-1-i64-from-i128.c: New test.
* gcc.target/riscv/rvv/autovec/avg_ceil-run-1-i64-from-i128.c: New test.
Signed-off-by: Pan Li <pan2.li@intel.com>
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Testcase of PR 117423 shows a flaw in the fancy way we do "total
scalarization" in SRA now. We use the types encountered in the
function body and not in type declaration (allowing us to totally
scalarize when only one union field is ever used, since we effectively
"skip" the union then) and can accommodate pre-existing accesses that
happen to fall into padding.
In this case, we skipped the union (bypassing the
totally_scalarizable_type_p check) and the access falling into the
"padding" is an aggregate and so not a candidate for SRA but actually
containing data. Arguably total scalarization should just bail out
when it encounters this situation (but I decided not to depend on this
mainly because we'd need to detect all cases when we eventually cannot
scalarize, such as when a scalar access has children accesses) but the
actual bug is that the detection if all data in an aggregate is indeed
covered by replacements just assumes that is always the case if total
scalarization triggers which however may not be the case in cases like
this - and perhaps more.
This patch fixes the bug by just assuming that all padding is taken
care of when total scalarization triggered, not that every access was
actually scalarized.
gcc/ChangeLog:
2025-07-17 Martin Jambor <mjambor@suse.cz>
PR tree-optimization/117423
* tree-sra.cc (analyze_access_subtree): Fix computation of grp_covered
flag.
gcc/testsuite/ChangeLog:
2025-07-17 Martin Jambor <mjambor@suse.cz>
PR tree-optimization/117423
* gcc.dg/tree-ssa/pr117423.c: New test.
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The following makes sure we analyze live LC PHIs not part of
a double reduction.
PR tree-optimization/121126
* tree-vect-stmts.cc (vect_analyze_stmt): Analyze the
live lane extract for LC PHIs that are vect_internal_def.
* gcc.dg/vect/pr121126.c: New testcase.
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This removes paths gated by !slp_node and propagates out ncopies == 1,
thereby reducing the vectorizable_live_operation_1 API.
* tree-vect-loop.cc (vectorizable_live_operation_1):
Remove stmt_info and ncopies parameters. Remove !slp_node
paths.
(vectorizable_live_operation): Remove !slp_node paths.
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The PR shows that the uninit analysis limits are set too low in
cases we lower switches to ifs as happens on s390x for a linux
kernel TU. This causes false positive uninit diagnostics as we
abort the attempt to prove that a value is initialized on all
paths. The new testcase only would require upping to 9.
PR tree-optimization/120924
* params.opt (uninit-max-chain-len): Up from 8 to 12.
* gcc.dg/uninit-pr120924.c: New testcase.
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In some cases involving a generic with two formal parameters, a formal package
and a formal derived type that is derived from an interface type declared in
the formal package, a legal instantiation of that generic is rejected with a
message incorrectly stating that the second actual parameter does not implement
the required interface.
gcc/ada/ChangeLog:
* sem_ch12.adb (Validate_Derived_Type_Instance): Cope with the case
where the ancestor type for a formal derived type is declared in
an earlier formal package but Get_Instance_Of does not return the
corresponding type from the corresponding actual package.
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...because it breaks one test that uses --RTS=light.
"Is_Composite_Type" is needed; "not Is_Scalar_Type"
was wrong.
gcc/ada/ChangeLog:
* tbuild.adb (Unchecked_Convert_To): Back out
change.
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When inlining function calls that return on the secondary stack used as
function actual or in a return statement, the compiler creates an
invalid GNAT Tree with a variable of an unconstrained type without an
initializer.
Also add an extra assertion to catch problematic cases directly in
Expand_Inlined_Call.
gcc/ada/ChangeLog:
* exp_ch6.adb (Convert): Do not call Expand_Inlined_Call for
unsupported cases.
* inline.adb (Expand_Inlined_Call): Add assert to catch unsupported
case.
Co-authored-by: Eric Botcazou <botcazou@adacore.com>
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The compiler incorrectly treats an overriding private subprogram that
should not be visible outside a package (because it only overrides in
the private part) as a possible interpretation for a call using prefixed
notation outside of the package. This can result in an ambiguity if there
is another subprogram with the same name but a different profile declared
in the visible part of the package, or can result in resolving to the
private operation in cases where it shouldn't resolve. This happens due
to the compiler improperly concluding that the private overriding subprogram
overrides an inherited subprogram in the package visible part, even though
the only inherited subprogram is in the private part, as a result of
a misuse of the Overridden_Operation field, which, contrary to what
its name suggests, actually refers to operations of the parent type,
rather than to the operations derived from the parent's operations.
gcc/ada/ChangeLog:
* einfo.ads: Document new field Overridden_Inherited_Operation and
list it as a field for the entity kinds that it applies to.
* gen_il-fields.ads (type Opt_Field_Enum): Add new literal
Overridden_Inherited_Operation to the type.
* gen_il-gen-gen_entities.adb: Add Overridden_Inherited_Operation as
a field of entities of kinds E_Enumeration_Literal and Subprogram_Kind.
* sem_ch4.adb (Is_Callable_Private_Overriding): Change name (was
Is_Private_Overriding). Replace Is_Hidden test on Overridden_Operation
with test of Is_Hidden on the new field Overridden_Inherited_Operation.
* sem_ch6.adb (New_Overloaded_Entity): Set the new field
Overridden_Inherited_Operation on an operation derived from
an interface to refer to the inherited operation of a private
extension that's overridden by the derived operation. Also set
that field in the more common cases of an explicit subprogram
that overrides, to refer to the inherited subprogram that is
overridden. (Contrary to its name, the Overridden_Operation
field of the overriding subprogram, which is also set in these
places, refers to the *parent* subprogram from which the inherited
subprogram is derived.) Also, remove a redundant Present (Alias (S))
test in an if_statement and the dead "else" part of that statement.
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For non-instance units GNAT builds elaboration entities before the ghost mode
is inherited from those units. However, for generic instances GNAT was building
elaboration entities with ghost mode inherited from those instances, which
effectively caused elaboration entities to become ghost objects.
This patch add ghost management to routine that builds elaboration entities,
which seems simpler and more robust than adjusting the ghost mode in all
callers of this routine.
gcc/ada/ChangeLog:
* sem_util.adb (Build_Elaboration_Entity): Set ghost mode to none
before creating the elaboration entity; restore the ghost mode
afterwards.
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gcc/ada/ChangeLog:
* exp_aggr.adb (Gen_Assign): Code cleanup.
(Initialize_Component): Do not adjust the tag when the type of
the aggregate components is a mutably tagged type.
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The following moves rejecting loop vectorization with vector(1)
typed vectors from the initial vector type determining to after
SLP discovery when we can check whether there's any instance
with other than vector(1) vectors. For RVV at least vector(1)
instances serve as a limited way to support partial loop vectorization.
The following restores this.
PR tree-optimization/121048
* tree-vect-loop.cc (vect_determine_vectype_for_stmt_1):
Remove rejecting vector(1) vector types.
(vect_set_stmts_vectype): Likewise.
* tree-vect-slp.cc (vect_make_slp_decision): Only
count instances with non-vector(1) root towards whether
we have any interesting instances to vectorize.
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The following testcase ICEs because SCALAR_INT_TYPE_MODE of course
doesn't work for large BITINT_TYPE types which have BLKmode.
native_encode* as well as e.g. r14-8276 use in cases like these
GET_MODE_SIZE (SCALAR_INT_TYPE_MODE ()) and TREE_INT_CST_LOW (TYPE_SIZE_UNIT
()) for the BLKmode ones.
In this case, it wants bits rather than bytes, so I've used
GET_MODE_BITSIZE like before and TYPE_SIZE otherwise.
Furthermore, the patch only computes encoding_size for big endian
targets, for little endian we don't really adjust anything, so there
is no point computing it.
2025-07-18 Jakub Jelinek <jakub@redhat.com>
PR tree-optimization/121131
* gimple-fold.cc (fold_nonarray_ctor_reference): Use
TREE_INT_CST_LOW (TYPE_SIZE ()) instead of
GET_MODE_BITSIZE (SCALAR_INT_TYPE_MODE ()) for BLKmode BITINT_TYPEs.
Don't compute encoding_size at all for little endian targets.
* gcc.dg/bitint-124.c: New test.
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r15-6789-ge7f98d9603808b added a new RTL pass for hardreg PRE for the hard register
of FPM_REGNUM, this pass could get expensive if you have a large number of basic blocks
and the hard register was never live so it does nothing in the end.
In the aarch64 case, FPM_REGNUM is only used for FP8 related code so it has a high probability
of not being used. So skipping the pass for that register can improve both compile time and memory
usage.
Build and tested for aarch64-linux-gnu.
PR middle-end/121095
gcc/ChangeLog:
* gcse.cc (execute_hardreg_pre): Skip if the hardreg which is never live.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
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This seems to have been fixed by r15-7260 for PR118285, but is sufficiently
different to merit its own test.
PR c++/87097
gcc/testsuite/ChangeLog:
* g++.dg/cpp0x/constexpr-array29.C: New test.
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This continues my previous commit, where I fixed some deviations from
GNU coding style in pta files. This should fix all the remaining issues
that contrib/check_GNU_style.py can detect (excluding false positives).
Commiting as obvious.
gcc/ChangeLog:
* tree-ssa-structalias.cc (lookup_vi_for_tree): Fix GNU style.
(process_constraint): Fix GNU style.
(get_constraint_for_component_ref): Fix GNU style.
(get_constraint_for_1): Fix GNU style.
(get_function_part_constraint): Fix GNU style.
(handle_lhs_call): Fix GNU style.
(find_func_aliases_for_builtin_call): Fix GNU style.
(find_func_aliases): Fix GNU style.
(find_func_clobbers): Fix GNU style.
(struct shared_bitmap_hasher): Fix GNU style.
(shared_bitmap_hasher::hash): Fix GNU style.
(pt_solution_includes_global): Fix GNU style.
(init_base_vars): Fix GNU style.
(visit_loadstore): Fix GNU style.
(compute_dependence_clique): Fix GNU style.
(struct pt_solution): Fix GNU style.
(ipa_pta_execute): Fix GNU style.
Signed-off-by: Filip Kastl <fkastl@suse.cz>
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Fix some deviations from GNU coding style in pta files as reported by
contrib/check_GNU_style.py. Most of these are "dot, space, space, end
of comment".
Commiting as obvious.
gcc/ChangeLog:
* pta-andersen.cc (struct constraint_graph): Fix GNU style.
(constraint_equal): Fix GNU style.
(set_union_with_increment): Fix GNU style.
(insert_into_complex): Fix GNU style.
(merge_node_constraints): Fix GNU style.
(unify_nodes): Fix GNU style.
(do_ds_constraint): Fix GNU style.
(scc_info::scc_info): Fix GNU style.
(find_indirect_cycles): Fix GNU style.
(equiv_class_lookup_or_add): Fix GNU style.
(label_visit): Fix GNU style.
(dump_pred_graph): Fix GNU style.
(perform_var_substitution): Fix GNU style.
(eliminate_indirect_cycles): Fix GNU style.
(solve_graph): Fix GNU style.
(solve_constraints): Fix GNU style.
* tree-ssa-structalias.cc (first_vi_for_offset): Fix GNU style.
(debug_constraint): Fix GNU style.
* tree-ssa-structalias.h (struct constraint_expr): Fix GNU
style.
(struct variable_info): Fix GNU style.
Signed-off-by: Filip Kastl <fkastl@suse.cz>
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There is no need to change mode for XOR in ix86_expand_ternlog now.
Whatever reasons for it in the first place no longer exist. Tested
on x86-64 with -m32. There are no regressions.
* config/i386/i386-expand.cc (ix86_expand_ternlog): Don't change
mode for XOR.
Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
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This patch cuts out the points-to solver from tree-ssa-structalias.cc
and places it into a new file pta-andersen.cc. It is the first part of
my effort to split tree-ssa-structalias.cc into smaller parts.
I had to give external linkage to some static functions and variables.
I put those in the new header files tree-ssa-structalias.h and
pta-andersen.h. Those header files are meant as an internal interface
between parts of the points-to analyzer.
Some functions and variables already had external linkage and were declared in
tree-ssa-alias.h. I considered moving the declarations to
tree-ssa-structalias.h but decided to leave them as is. I see those functions
and variables as an external interface -- facing outwards to the rest of the
compiler.
For the internal interface, I made a new namespace "pointer_analysis".
I didn't want to clutter the global namespace and possibly run into ODR
problems.
I wanted to encapsulate the constraint graph within the solver. To achieve
that, I had to make some changes beyond just moving things around. They were
only very small changes, though:
- Add delete_graph() which gets called at the end of solve_constraints()
- Problem: The solver assigns representatives to variables (union-find). To
then get the solution for variable v, one has to look up the representative
of v. The information needed to look up the representative is part of the
graph.
- Solution: Let the solver output an array that maps variables to their
representatives and let this array outlive the graph (array var_rep).
- Constructing the array means doing find() for every variable. That should
amortize to O(size of the union-find structure). So this won't hurt the
asymptotic time complexity.
- We replace all calls to find(var) in tree-ssa-structalias.cc with
just an array lookup var_rep[var].
- predbitmap_obstack gets initialized in init_graph().
gcc/ChangeLog:
* Makefile.in: Add pta-andersen.o.
* tree-ssa-structalias.cc (create_variable_info_for): Just move
around.
(unify_nodes): Move to pta-andersen.cc.
(struct constraint): Move to tree-ssa-structalias.h.
(EXECUTE_IF_IN_NONNULL_BITMAP): Move to pta-andersen.cc.
(struct variable_info): Move to tree-ssa-structalias.h.
(struct constraint_stats): Move to tree-ssa-structalias.h.
(first_vi_for_offset): External linkage, move to namespace
pointer_analysis.
(first_or_preceding_vi_for_offset): External linkage, move to namespace
pointer_analysis.
(dump_constraint): External linkage, move to namespace
pointer_analysis.
(debug_constraint): External linkage, move to namespace
pointer_analysis.
(dump_constraints): External linkage, move to namespace
pointer_analysis.
(debug_constraints): External linkage, move to namespace
pointer_analysis.
(lookup_vi_for_tree): Move around inside tree-ssa-structalias.cc.
(type_can_have_subvars): Move around inside tree-ssa-structalias.cc.
(make_param_constraints): Move around inside tree-ssa-structalias.cc.
(dump_solution_for_var): External linkage, move to namespace
pointer_analysis. find (...) -> var_rep[...].
(get_varinfo): Move to tree-ssa-structalias.h.
(debug_solution_for_var): External linkage, move to namespace
pointer_analysis.
(vi_next): Move to tree-ssa-structalias.h.
(dump_sa_stats): External linkage, move to namespace pointer_analysis.
(new_var_info): Just move around.
(dump_sa_points_to_info): External linkage, move to namespace
pointer_analysis.
(debug_sa_points_to_info): External linkage, move to namespace
pointer_analysis.
(get_call_vi): Just move around.
(dump_varinfo): External linkage, move to namespace pointer_analysis.
(lookup_call_use_vi): Just move around.
(lookup_call_clobber_vi): Just move around.
(get_call_use_vi): Just move around.
(get_call_clobber_vi): Just move around.
(enum constraint_expr_type): Move to tree-ssa-structalias.h.
(struct constraint_expr): Move to tree-ssa-structalias.h.
(UNKNOWN_OFFSET): Move to tree-ssa-structalias.h.
(get_constraint_for_1): Just move around.
(get_constraint_for): Just move around.
(get_constraint_for_rhs): Just move around.
(do_deref): Just move around.
(constraint_pool): Just move around.
(struct constraint_graph): Move to pta-andersen.h.
(FIRST_REF_NODE): Move to pta-andersen.cc.
(LAST_REF_NODE): Move to pta-andersen.cc.
(find): Move to pta-andersen.cc.
(unite): Move to pta-andersen.cc.
(new_constraint): Just move around.
(debug_constraint_graph): External linkage, move to namespace
pointer_analysis.
(debug_varinfo): External linkage, move to namespace pointer_analysis.
(debug_varmap): External linkage, move to namespace pointer_analysis.
(dump_constraint_graph): External linkage, move to namespace
pointer_analysis.
(constraint_expr_equal): Move to pta-andersen.cc.
(constraint_expr_less): Move to pta-andersen.cc.
(constraint_less): Move to pta-andersen.cc.
(constraint_equal): Move to pta-andersen.cc.
(constraint_vec_find): Move to pta-andersen.cc.
(constraint_set_union): Move to pta-andersen.cc.
(solution_set_expand): Move to pta-andersen.cc.
(set_union_with_increment): Move to pta-andersen.cc.
(insert_into_complex): Move to pta-andersen.cc.
(merge_node_constraints): Move to pta-andersen.cc.
(clear_edges_for_node): Move to pta-andersen.cc.
(merge_graph_nodes): Move to pta-andersen.cc.
(add_implicit_graph_edge): Move to pta-andersen.cc.
(add_pred_graph_edge): Move to pta-andersen.cc.
(add_graph_edge): Move to pta-andersen.cc.
(init_graph): Move to pta-andersen.cc. Initialize
predbitmap_obstack here.
(build_pred_graph): Move to pta-andersen.cc.
(build_succ_graph): Move to pta-andersen.cc.
(class scc_info): Move to pta-andersen.cc.
(scc_visit): Move to pta-andersen.cc.
(solve_add_graph_edge): Move to pta-andersen.cc.
(do_sd_constraint): Move to pta-andersen.cc.
(do_ds_constraint): Move to pta-andersen.cc.
(do_complex_constraint): Move to pta-andersen.cc.
(scc_info::scc_info): Move to pta-andersen.cc.
(scc_info::~scc_info): Move to pta-andersen.cc.
(find_indirect_cycles): Move to pta-andersen.cc.
(topo_visit): Move to pta-andersen.cc.
(compute_topo_order): Move to pta-andersen.cc.
(struct equiv_class_hasher): Move to pta-andersen.cc.
(equiv_class_hasher::hash): Move to pta-andersen.cc.
(equiv_class_hasher::equal): Move to pta-andersen.cc.
(equiv_class_lookup_or_add): Move to pta-andersen.cc.
(condense_visit): Move to pta-andersen.cc.
(label_visit): Move to pta-andersen.cc.
(dump_pred_graph): External linkage, move to namespace
pointer_analysis.
(dump_varmap): External linkage, move to namespace pointer_analysis.
(perform_var_substitution): Move to pta-andersen.cc.
(free_var_substitution_info): Move to pta-andersen.cc.
(find_equivalent_node): Move to pta-andersen.cc.
(unite_pointer_equivalences): Move to pta-andersen.cc.
(move_complex_constraints): Move to pta-andersen.cc.
(rewrite_constraints): Move to pta-andersen.cc.
(eliminate_indirect_cycles): Move to pta-andersen.cc.
(solve_graph): Move to pta-andersen.cc.
(set_uids_in_ptset): find (...) -> var_rep[...].
(find_what_var_points_to): find (...) -> var_rep[...].
(init_alias_vars): Don't initialize predbitmap_obstack here.
(remove_preds_and_fake_succs): Move to pta-andersen.cc.
(solve_constraints): Move to pta-andersen.cc. Call
delete_graph() at the end.
(delete_points_to_sets): Don't delete graph here. Delete var_rep here.
(visit_loadstore): find (...) -> var_rep[...].
(compute_dependence_clique): find (...) -> var_rep[...].
(ipa_pta_execute): find (...) -> var_rep[...].
* pta-andersen.cc: New file.
* pta-andersen.h: New file.
* tree-ssa-structalias.h: New file.
Signed-off-by: Filip Kastl <fkastl@suse.cz>
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|
SME uses a lazy save system to manage ZA. The idea is that,
if a function with ZA state wants to call a "normal" function,
it can leave its state in ZA and instead set up a lazy save buffer.
If, unexpectedly, that normal function contains a nested use of ZA,
that nested use of ZA must commit the lazy save first.
This lazy save system uses a special system register called TPIDR2_EL0.
See:
https://github.com/ARM-software/abi-aa/blob/main/aapcs64/aapcs64.rst#66the-za-lazy-saving-scheme
for details.
The ABI specifies that, on entry to an exception handler, the following
things must be true:
* PSTATE.SM must be 0 (the processor must be in non-streaming mode)
* PSTATE.ZA must be 0 (ZA must be off)
* TPIDR2_EL0 must be 0 (there must be no uncommitted lazy save)
This is normally done by making _Unwind_RaiseException & friends
commit any lazy save before they unwind. This also has the side
effect of ensuring that TPIDR2_EL0 is never left pointing to a
lazy save buffer that has been unwound.
However, things get more complicated with signals. If:
(a) a signal is raised while ZA is dormant (that is, while there is an
uncommitted lazy save);
(b) the signal handler throws an exception; and
(c) that exception is caught outside the signal handler
something must ensure that the lazy save from (a) is committed.
This would be simple if the signal handler was entered with ZA and
TPIDR2_EL0 intact. However, for various good reasons that are out
of scope here, this is not done. Instead, Linux now clears both
TPIDR2_EL0 and PSTATE.ZA before entering a signal handler, see:
https://lore.kernel.org/all/20250417190113.3778111-1-mark.rutland@arm.com/
for details.
Therefore, it is the unwinder that must simulate a commit of the lazy
save from (a). It can do this by reading the previous values of
TPIDR2_EL0 and ZA from the sigcontext.
The SME-related sigcontext structures were only added to linux's
asm/sigcontext.h relatively recently and we can't rely on GCC being
built against such recent kernel header files. The patch therefore uses
defines relevant macros if they are not defined and provide types that
comply with ABI layout of the corresponding linux types.
The patch includes some ugly casting in an attempt to support big-endian
ILP32, even though SME on big-endian ILP32 linux should never be a thing.
We can remove it if we also remove ILP32 support from GCC.
Co-authored-by: Yury Khrustalev <yury.khrustalev@arm.com>
Reviewed-by: Tamar Christina <tamar.christina@arm.com>
gcc/
* doc/sourcebuild.texi (aarch64_sme_hw): Document.
gcc/testsuite/
* lib/target-supports.exp (add_options_for_aarch64_sme)
(check_effective_target_aarch64_sme_hw): New procedures.
* g++.target/aarch64/sme/sme_throw_1.C: New test.
* g++.target/aarch64/sme/sme_throw_2.C: Likewise.
libgcc/
* config/aarch64/linux-unwind.h (aarch64_fallback_frame_state):
If a signal was raised while there was an uncommitted lazy save,
commit the save as part of the unwind process.
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|
Currently for a signbit operation instructions tc{f,d,x}b + ipm + srl
are emitted. If the source operand is a MEM, then a load precedes the
sequence. A faster implementation is by issuing a load either from a
REG or MEM into a GPR followed by a shift.
In spirit of the signbit function of the C standard, the signbit optab
only guarantees that the resulting value is nonzero if the signbit is
set. The common code implementation computes a value where the signbit
is stored in the most significant bit, i.e., all other bits are just
masked out, whereas the current implementation of s390 results in a
value where the signbit is stored in the least significant bit.
Although, there is no guarantee where the signbit is stored, keep the
current behaviour and, therefore, implement the signbit optab manually.
Since z10, instruction lgdr can be effectively used for a 64-bit
FPR-to-GPR load. However, there exists no 32-bit pendant. Thus, for
target z10 make use of post-reload splitters which emit either a 64-bit
or a 32-bit load depending on whether the source operand is a REG or a
MEM and a corresponding 63 or 31-bit shift. We can do without
post-reload splitter in case of vector extensions since there we also
have a 32-bit VR-to-GPR load via instruction vlgvf.
gcc/ChangeLog:
* config/s390/s390.md (signbit_tdc): Rename expander.
(signbit<mode>2): New expander.
(signbit<mode>2_z10): New expander.
gcc/testsuite/ChangeLog:
* gcc.target/s390/isfinite-isinf-isnormal-signbit-2.c: Adapt
scan assembler directives.
* gcc.target/s390/isfinite-isinf-isnormal-signbit-3.c: Ditto.
* gcc.target/s390/signbit-1.c: New test.
* gcc.target/s390/signbit-2.c: New test.
* gcc.target/s390/signbit-3.c: New test.
* gcc.target/s390/signbit-4.c: New test.
* gcc.target/s390/signbit-5.c: New test.
* gcc.target/s390/signbit.h: New test.
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|
Moving between GPRs and VRs in any mode with size less than or equal to
8 bytes becomes available with vector extensions. Without adapting
costs for those loads, we typically go over memory.
gcc/ChangeLog:
* config/s390/s390.cc (s390_register_move_cost): Add costing for
vlvg/vlgv.
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|
Exploit the fact that instruction VLGV zeros excessive bits of a GPR.
gcc/ChangeLog:
* config/s390/vector.md (bhfgq): Add scalar modes.
(*movdi<mode>_zero_extend_A): New insn.
(*movsi<mode>_zero_extend_A): New insn.
(*movdi<mode>_zero_extend_B): New insn.
(*movsi<mode>_zero_extend_B): New insn.
gcc/testsuite/ChangeLog:
* gcc.target/s390/vector/vlgv-zero-extend-1.c: New test.
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|
[PR121064]
When TARGET_VECTORIZE_VEC_PERM_CONST is called, target may be the
same pseudo as op0 and/or op1. Loading the selector into target
would clobber the input, producing wrong code like
vld $vr0, $t0
vshuf.w $vr0, $vr0, $vr1
So don't load the selector into d->target, use a new pseudo to hold the
selector instead. The reload pass will load the pseudo for selector and
the pseudo for target into the same hard register (following our
constraint '0' on the shuf instructions) anyway.
gcc/ChangeLog:
PR target/121064
* config/loongarch/lsx.md (lsx_vshuf_<lsxfmt_f>): Add '@' to
generate a mode-aware helper. Use <VIMODE> as the mode of the
operand 1 (selector).
* config/loongarch/lasx.md (lasx_xvshuf_<lasxfmt_f>): Likewise.
* config/loongarch/loongarch.cc
(loongarch_try_expand_lsx_vshuf_const): Create a new pseudo for
the selector. Use the mode-aware helper to simplify the code.
(loongarch_expand_vec_perm_const): Likewise.
gcc/testsuite/ChangeLog:
PR target/121064
* gcc.target/loongarch/pr121064.c: New test.
|
|
The following makes us never consider vector(1) T types for
vectorization and ensures this during SLP build. This is a
long-standing issue for BB vectorization and when we remove
early loop vector type setting we lose the single place we have
that rejects this for loops.
Once we implement partial loop vectorization we should revisit
this, but then use the original scalar types for the unvectorized
parts.
* tree-vect-slp.cc (vect_build_slp_tree_1): Reject
single-lane vector types.
* gcc.dg/vect/bb-slp-39.c: Adjust.
|
|
When VN iterates we can end up with unreachable inserted expressions
in the expression tables which in turn will not be added to their
value by PREs compute_avail. This will later ICE when we pick
them up and want to generate them. Deal with this by giving up.
PR tree-optimization/121035
* tree-ssa-pre.cc (find_or_generate_expression): Handle
values without expression.
* gcc.dg/pr121035.c: New testcase.
|
|
|
|
I stopped using state_diagram::m_show_tags in r16-2211-ga5d9debedd2f46
but forgot to remove the field. Do so now.
Spotted by Filip Kastl via clang's -Wunused-private-field.
gcc/ChangeLog:
* diagnostic-state-to-dot.cc (state_diagram::m_show_tags): Drop
unused field.
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
|
|
Move code to calculate the iteration size and to generate the iterator
expansion loop into separate functions.
Use OMP_ITERATOR_DECL_P to check for iterators in clause declarations.
gcc/c-family/
* c-omp.cc (c_finish_omp_depobj): Use OMP_ITERATOR_DECL_P.
gcc/c/
* c-typeck.cc (handle_omp_array_sections): Use OMP_ITERATOR_DECL_P.
(c_finish_omp_clauses): Likewise.
gcc/cp/
* pt.cc (tsubst_omp_clause_decl): Use OMP_ITERATOR_DECL_P.
* semantics.cc (handle_omp_array_sections): Likewise.
(finish_omp_clauses): Likewise.
gcc/
* gimplify.cc (gimplify_omp_affinity): Use OMP_ITERATOR_DECL_P.
(compute_omp_iterator_count): New.
(build_omp_iterator_loop): New.
(gimplify_omp_depend): Use OMP_ITERATOR_DECL_P,
compute_omp_iterator_count and build_omp_iterator_loop.
* tree-inline.cc (copy_tree_body_r): Use OMP_ITERATOR_DECL_P.
* tree-pretty-print.cc (dump_omp_clause): Likewise.
* tree.h (OMP_ITERATOR_DECL_P): New macro.
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|
For MMX 16-bit, 32-bit and 64-bit constant vector loads from constant
vector pool:
(insn 6 2 7 2 (set (reg:V1SI 5 di)
(mem/u/c:V1SI (symbol_ref/u:DI ("*.LC0") [flags 0x2]) [0 S4 A32])) "pr121062-2.c":10:3 2036 {*movv1si_internal}
(expr_list:REG_EQUAL (const_vector:V1SI [
(const_int -1 [0xffffffffffffffff])
])
(nil)))
we can convert it to
(insn 12 2 7 2 (set (reg:SI 5 di)
(const_int -1 [0xffffffffffffffff])) "pr121062-2.c":10:3 100 {*movsi_internal}
(nil))
Co-Developed-by: H.J. Lu <hjl.tools@gmail.com>
gcc/
PR target/121062
* config/i386/i386.cc (ix86_convert_const_vector_to_integer):
Handle E_V1SImode and E_V1DImode.
* config/i386/mmx.md (V_16_32_64): Add V1SI, V2BF and V1DI.
(mmxinsnmode): Add V1DI and V1SI.
Add V_16_32_64 splitter for constant vector loads from constant
vector pool.
(V_16_32_64:*mov<mode>_imm): Moved after V_16_32_64 splitter.
Replace lowpart_subreg with adjust_address.
gcc/testsuite/
PR target/121062
* gcc.target/i386/pr121062-1.c: New test.
* gcc.target/i386/pr121062-2.c: Likewise.
* gcc.target/i386/pr121062-3a.c: Likewise.
* gcc.target/i386/pr121062-3b.c: Likewise.
* gcc.target/i386/pr121062-3c.c: Likewise.
* gcc.target/i386/pr121062-4.c: Likewise.
* gcc.target/i386/pr121062-5.c: Likewise.
* gcc.target/i386/pr121062-6.c: Likewise.
* gcc.target/i386/pr121062-7.c: Likewise.
|
|
Since only glibc targets support -mfentry, warn -pg without -mfentry only
on glibc targets.
gcc/
PR target/120881
PR testsuite/121078
* config/i386/i386-options.cc (ix86_option_override_internal):
Warn -pg without -mfentry only on glibc targets.
gcc/testsuite/
PR target/120881
PR testsuite/121078
* gcc.dg/20021014-1.c (dg-additional-options): Add -mfentry
-fno-pic only on gnu/x86 targets.
* gcc.dg/aru-2.c (dg-additional-options): Likewise.
* gcc.dg/nest.c (dg-additional-options): Likewise.
* gcc.dg/pr32450.c (dg-additional-options): Likewise.
* gcc.dg/pr43643.c (dg-additional-options): Likewise.
* gcc.target/i386/pr104447.c (dg-additional-options): Likewise.
* gcc.target/i386/pr113122-3.c(dg-additional-options): Likewise.
* gcc.target/i386/pr119386-1.c (dg-additional-options): Add
-mfentry only on gnu targets.
* gcc.target/i386/pr119386-2.c (dg-additional-options): Likewise.
Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
|
|
No functional changes.
gcc/ChangeLog:
* config/i386/i386-expand.cc (ix86_expand_move):
Use MEM_P predicate instead of open coding it.
(ix86_erase_embedded_rounding):
Use NONJUMP_INSN_P predicate instead of open coding it.
* config/i386/i386-features.cc (convertible_comparison_p):
Use REG_P predicate instead of open coding it.
* config/i386/i386.cc (ix86_rtx_costs):
Use SUBREG_P predicate instead of open coding it.
|
|
No functional changes.
gcc/ChangeLog:
* config/i386/i386.cc (symbolic_reference_mentioned_p):
Use LABEL_REF_P predicate instead of open coding it.
(ix86_legitimate_constant_p): Ditto.
(legitimate_pic_address_disp_p): Ditto.
(ix86_legitimate_address_p): Ditto.
(legitimize_pic_address): Ditto.
(ix86_print_operand): Ditto.
(ix86_print_operand_address_as): Ditto.
(ix86_rip_relative_addr_p): Ditto.
* config/i386/i386.h (SYMBOLIC_CONST): Ditto.
* config/i386/i386.md (*anddi_1 to *andsi_1_zext splitter): Ditto.
* config/i386/predicates.md (symbolic_operand): Ditto.
(local_symbolic_operand): Ditto.
(vsib_address_operand): Ditto.
|
|
No functional changes.
gcc/ChangeLog:
* config/i386/i386-expand.cc (ix86_expand_move):
Use SYMBOL_REF_P predicate instead of open coding it.
(ix86_split_long_move): Ditto.
(construct_plt_address): Ditto.
(ix86_expand_call): Ditto.
(ix86_notrack_prefixed_insn_p): Ditto.
* config/i386/i386-features.cc
(rest_of_insert_endbr_and_patchable_area): Ditto.
* config/i386/i386.cc (symbolic_reference_mentioned_p): Ditto.
(ix86_force_load_from_GOT_p): Ditto.
(ix86_legitimate_constant_p): Ditto.
(legitimate_pic_operand_p): Ditto.
(legitimate_pic_address_disp_p): Ditto.
(ix86_legitimate_address_p): Ditto.
(legitimize_pic_address): Ditto.
(ix86_legitimize_address): Ditto.
(ix86_delegitimize_tls_address): Ditto.
(ix86_print_operand): Ditto.
(ix86_print_operand_address_as): Ditto.
(ix86_rip_relative_addr_p): Ditto.
(symbolic_base_address_p): Ditto.
* config/i386/i386.h (SYMBOLIC_CONST): Ditto.
* config/i386/i386.md (*anddi_1 to *andsi_1_zext splitter): Ditto.
* config/i386/predicates.md (symbolic_operand): Ditto.
(local_symbolic_operand): Ditto.
(local_func_symbolic_operand): Ditto.
|
|
No functional changes.
gcc/ChangeLog:
* config/i386/i386-expand.cc (ix86_expand_vector_logical_operator):
Use CONST_VECTOR_P instead of open coding it.
(ix86_expand_int_sse_cmp): Ditto.
(ix86_extract_perm_from_pool_constant): Ditto.
(ix86_split_to_parts): Ditto.
(const_vector_equal_evenodd_p): Ditto.
* config/i386/i386.cc (ix86_print_operand): Ditto.
* config/i386/predicates.md (zero_extended_scalar_load_operand): Ditto.
(float_vector_all_ones_operand): Ditto.
* config/i386/sse.md (avx512vl_vextractf128<mode>): Ditto.
|
|
The following disables loop masking when we are using an even/odd
widening operation in a reduction because the loop mask then aligns
to the wrong elements.
PR tree-optimization/121049
* internal-fn.h (widening_evenodd_fn_p): Declare.
* internal-fn.cc (widening_evenodd_fn_p): New function.
* tree-vect-stmts.cc (vectorizable_conversion): When using
an even/odd widening function disable loop masking.
* gcc.dg/vect/pr121049.c: New testcase.
|
|
For possible reductions, ifconv currently handles if the addition
is on one side of the if. But in the case of PR 119920, the reduction
addition is on both sides of the if.
E.g.
```
if (_27 == 0)
goto <bb 14>; [50.00%]
else
goto <bb 13>; [50.00%]
<bb 14>
a_29 = b_14(D) + a_17;
goto <bb 15>; [100.00%]
<bb 13>
a_28 = c_12(D) + a_17;
<bb 15>
# a_30 = PHI <a_28(13), a_29(14)>
```
Which ifcvt converts into:
```
_34 = _32 + _33;
a_15 = (int) _34;
_23 = _4 == 0;
_37 = _33 + _35;
a_13 = (int) _37;
a_5 = _23 ? a_15 : a_13;
```
But the vectorizer does not recognize this as a reduction.
To fix this, we should factor out the addition from the `if`.
This allows us to get:
```
iftmp.0_7 = _22 ? b_13(D) : c_12(D);
a_14 = iftmp.0_7 + a_18;
```
Which then the vectorizer recognizes as a reduction.
In the case of PR 112324 and PR 110015, it is similar but with MAX_EXPR reduction
instead of an addition.
Note while this should be done in phiopt, there are regressions
due to other passes not able to handle the factored out cases
(see linked bug to PR 64700). I have not had time to fix all of the passes
that could handle the addition being in the if/then/else rather than being outside yet.
So this is I thought it would be useful just to have a localized version in ifconv which
is then only used for the vectorizer.
Bootstrapped and tested on x86_64-linux-gnu.
PR tree-optimization/119920
PR tree-optimization/112324
PR tree-optimization/110015
gcc/ChangeLog:
* tree-if-conv.cc (find_different_opnum): New function.
(factor_out_operators): New function.
(predicate_scalar_phi): Call factor_out_operators when
there is only 2 elements of a phi.
gcc/testsuite/ChangeLog:
* gcc.dg/vect/vect-reduc-cond-1.c: New test.
* gcc.dg/vect/vect-reduc-cond-2.c: New test.
* gcc.dg/vect/vect-reduc-cond-3.c: New test.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
|
