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We correctly accept this testcase since r11-1571.
gcc/testsuite/ChangeLog:
PR c++/94102
* g++.dg/cpp1z/class-deduction87.C: New test.
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* fr.po: Update.
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This patch fixes an oversight in the handling of debug instructions
in rtl-ssa. At the moment (and whether this is a good idea or not
remains to be seen), we maintain a linear RPO sequence of definitions
and non-debug uses. If a register is defined more than once, we use
a degenerate phi to reestablish a previous definition where necessary.
However, debug instructions shouldn't of course affect codegen,
so we can't create a new definition just for them. In those situations
we instead hang the debug use off the real definition (meaning that
debug uses do not follow a linear order wrt definitions). Again,
it remains to be seen whether that's a good idea.
The problem in the PR was that we weren't taking this into account
when increasing (or potentially increasing) the live range of an
existing definition. We'd create the phi even if it would only
be used by debug instructions.
The patch goes for the simple but inelegant approach of passing
a bool to say whether the use is a debug use or not. I imagine
this area will need some tweaking based on experience in future.
gcc/
PR rtl-optimization/100303
* rtl-ssa/accesses.cc (function_info::make_use_available): Take a
boolean that indicates whether the use will only be used in
debug instructions. Treat it in the same way that existing
cross-EBB debug references would be handled if so.
(function_info::make_uses_available): Likewise.
* rtl-ssa/functions.h (function_info::make_uses_available): Update
prototype accordingly.
(function_info::make_uses_available): Likewise.
* fwprop.c (try_fwprop_subst): Update call accordingly.
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gcc
* config/nios2/nios2-protos.h (nios2_fpu_insn_enabled): Move outside
of RTX_CODE guard.
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Mark x86 AVX and AVX2 masked load builtins pure to enable dead code
elimination and more appropriate alias analysis.
2021-04-29 Uroš Bizjak <ubizjak@gmail.com>
Richard Biener <rguenther@suse.de>
gcc/
PR target/100312
* config/i386/i386-builtin.def (IX86_BUILTIN_MASKLOADPD)
(IX86_BUILTIN_MASKLOADPS, IX86_BUILTIN_MASKLOADPD256)
(IX86_BUILTIN_MASKLOADPS256, IX86_BUILTIN_MASKLOADD)
(IX86_BUILTIN_MASKLOADQ, IX86_BUILTIN_MASKLOADD256)
(IX86_BUILTIN_MASKLOADQ256): Move from SPECIAL_ARGS
to PURE_ARGS category.
* config/i386/i386-builtins.c (ix86_init_mmx_sse_builtins):
Handle PURE_ARGS category.
* config/i386/i386-expand.c (ix86_expand_builtin): Ditto.
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If you attempt a profiled bootstrap on the MinGW platforms with -jN, N > 1,
it miserably fails because of profile mismatches all over the place, the
reason being that gcov has no support for parallelism on these platforms.
libgcc/
* libgcov.h: For the target, define GCOV_LOCKED_WITH_LOCKING
if __MSVCRT__ and, for the host, define it if HOST_HAS_LK_LOCK.
* libgcov-driver.c: Add directives if GCOV_LOCKED_WITH_LOCKING.
gcc/
* configure.ac: Check for the presence of sys/locking.h header and
for whether _LK_LOCK is supported by _locking.
* configure: Regenerate.
* config.in: Likewise.
* gcov-io.h: Define GCOV_LOCKED_WITH_LOCKING if HOST_HAS_LK_LOCK.
* gcov-io.c (gcov_open): Add support for GCOV_LOCKED_WITH_LOCKING.
* system.h: Include <sys/locking.h> if HAVE_SYS_LOCKING_H.
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CCCmode is allowed only with GEU and LTU comparison codes. Also allow
CCGZmode for these two codes. There is no need to check for trivial FP
comparison operator, ix86_fp_compare_code_to_integer will return
UNKNOWN code for unsupported operators.
2021-04-29 Uroš Bizjak <ubizjak@gmail.com>
gcc/
* config/i386/predicates.md (fcmov_comparison_operator):
Do not check for trivial FP comparison operator.
<case GEU, case LTU>: Allow CCGZmode.
<case GTU, case LEU>: Do not allow CCCmode.
(ix86_comparison_operator) <case GTU, case LEU>: Allow only CCmode.
(ix86_carry_flag_operator): Match only LTU and UNLT code.
Do not check for trivial FP comparison operator. Allow CCGZmode.
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Consider the test-case libgomp.c/pr81778.c added in this commit, with
this core loop (note: CANARY_SIZE set to 0 for simplicity):
...
int s = 1;
#pragma omp target simd
for (int i = N - 1; i > -1; i -= s)
a[i] = 1;
...
which, given that N is 32, sets a[0..31] to 1.
After omp-expand, this looks like:
...
<bb 5> :
simduid.7 = .GOMP_SIMT_ENTER (simduid.7);
.omp_simt.8 = .GOMP_SIMT_ENTER_ALLOC (simduid.7);
D.3193 = -s;
s.9 = s;
D.3204 = .GOMP_SIMT_LANE ();
D.3205 = -s.9;
D.3206 = (int) D.3204;
D.3207 = D.3205 * D.3206;
i = D.3207 + 31;
D.3209 = 0;
D.3210 = -s.9;
D.3211 = D.3210 - i;
D.3210 = -s.9;
D.3212 = D.3211 / D.3210;
D.3213 = (unsigned int) D.3212;
D.3213 = i >= 0 ? D.3213 : 0;
<bb 19> :
if (D.3209 < D.3213)
goto <bb 6>; [87.50%]
else
goto <bb 7>; [12.50%]
<bb 6> :
a[i] = 1;
D.3215 = -s.9;
D.3219 = .GOMP_SIMT_VF ();
D.3216 = (int) D.3219;
D.3220 = D.3215 * D.3216;
i = D.3220 + i;
D.3209 = D.3209 + 1;
goto <bb 19>; [100.00%]
...
On nvptx, the first time bb6 is executed, i is in the 0..31 range (depending
on the lane that is executing) at bb entry.
So we have the following sequence:
- a[0..31] is set to 1
- i is updated to -32..-1
- D.3209 is updated to 1 (being 0 initially)
- bb19 is executed, and if condition (D.3209 < D.3213) == (1 < 32) evaluates
to true
- bb6 is once more executed, which should not happen because all the elements
that needed to be handled were already handled.
- consequently, elements that should not be written are written
- with CANARY_SIZE == 0, we may run into a libgomp error:
...
libgomp: cuCtxSynchronize error: an illegal memory access was encountered
...
and with CANARY_SIZE unmodified, we run into:
...
Expected 0, got 1 at base[-961]
Aborted (core dumped)
...
The cause of this is as follows:
- because the step s is a variable rather than a constant, an alternative
IV (D.3209 in our example) is generated in expand_omp_simd, and the
loop condition is tested in terms of the alternative IV rather than
the original IV (i in our example).
- the SIMT code in expand_omp_simd works by modifying step and initial value.
- The initial value fd->loop.n1 is loaded into a variable n1, which is
modified by the SIMT code and then used there-after.
- The step fd->loop.step is loaded into a variable step, which is modified
by the SIMT code, but afterwards there are uses of both step and
fd->loop.step.
- There are uses of fd->loop.step in the alternative IV handling code,
which should use step instead.
Fix this by introducing an additional variable orig_step, which is not
modified by the SIMT code and replacing all remaining uses of fd->loop.step
by either step or orig_step.
Build on x86_64-linux with nvptx accelerator, tested libgomp.
This fixes for-5.c and for-6.c FAILs I'm currently seeing on a quadro m1200
with driver 450.66.
gcc/ChangeLog:
2020-10-02 Tom de Vries <tdevries@suse.de>
* omp-expand.c (expand_omp_simd): Add step_orig, and replace uses of
fd->loop.step by either step or orig_step.
libgomp/ChangeLog:
2020-10-02 Tom de Vries <tdevries@suse.de>
* testsuite/libgomp.c/pr81778.c: New test.
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gcc/
* config/sparc/sparc.c (gen_load_pcrel_sym): Delete.
(load_got_register): Do the PIC dance here.
(sparc_legitimize_tls_address): Simplify.
(sparc_emit_probe_stack_range): Likewise.
(sparc32_initialize_trampoline): Likewise.
(sparc64_initialize_trampoline): Likewise.
* config/sparc/sparc.md (load_pcrel_sym<P:mode>): Add @ marker.
(probe_stack_range<P:mode>): Likewise.
(flush<P:mode>): Likewise.
(tgd_hi22<P:mode>): Likewise.
(tgd_lo10<P:mode>): Likewise.
(tgd_add<P:mode>): Likewise.
(tgd_call<P:mode>): Likewise.
(tldm_hi22<P:mode>): Likewise.
(tldm_lo10<P:mode>): Likewise.
(tldm_add<P:mode>): Likewise.
(tldm_call<P:mode>): Likewise.
(tldo_hix22<P:mode>): Likewise.
(tldo_lox10<P:mode>): Likewise.
(tldo_add<P:mode>): Likewise.
(tie_hi22<P:mode>): Likewise.
(tie_lo10<P:mode>): Likewise.
(tie_add<P:mode>): Likewise.
(tle_hix22<P:mode>): Likewise.
(tle_lox10<P:mode>): Likewise.
(stack_protect_setsi): Rename to...
(stack_protect_set32): ...this.
(stack_protect_setdi): Rename to...
(stack_protect_set64): ...this.
(stack_protect_set): Adjust calls to above.
(stack_protect_testsi): Rename to...
(stack_protect_test32): ...this.
(stack_protect_testdi): Rename to...
(stack_protect_test64): ...this.
(stack_protect_test): Adjust calls to above.
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Add an overlap_op_by_pieces_p target hook for op_by_pieces operations
between two areas of memory to generate one offset adjusted operation
in the smallest integer mode for the remaining bytes on the last piece
operation of a memory region to avoid doing more than one smaller
operations.
Pass the RTL information from the previous iteration to m_constfn in
op_by_pieces operation so that builtin_memset_[read|gen]_str can
generate the new RTL from the previous RTL.
Tested on Linux/x86-64.
gcc/
PR middle-end/90773
* builtins.c (builtin_memcpy_read_str): Add a dummy argument.
(builtin_strncpy_read_str): Likewise.
(builtin_memset_read_str): Add an argument for the previous RTL
information and generate the new RTL from the previous RTL info.
(builtin_memset_gen_str): Likewise.
* builtins.h (builtin_strncpy_read_str): Update the prototype.
(builtin_memset_read_str): Likewise.
* expr.c (by_pieces_ninsns): If targetm.overlap_op_by_pieces_p()
returns true, round up size and alignment to the widest integer
mode for maximum size.
(pieces_addr::adjust): Add a pointer to by_pieces_prev argument
and pass it to m_constfn.
(op_by_pieces_d): Add m_push and m_overlap_op_by_pieces.
(op_by_pieces_d::op_by_pieces_d): Add a bool argument to
initialize m_push. Initialize m_overlap_op_by_pieces with
targetm.overlap_op_by_pieces_p ().
(op_by_pieces_d::run): Pass the previous RTL information to
pieces_addr::adjust and generate overlapping operations if
m_overlap_op_by_pieces is true.
(PUSHG_P): New.
(move_by_pieces_d::move_by_pieces_d): Updated for op_by_pieces_d
change.
(store_by_pieces_d::store_by_pieces_d): Updated for op_by_pieces_d
change.
(can_store_by_pieces): Use by_pieces_constfn on constfun.
(store_by_pieces): Use by_pieces_constfn on constfun. Updated
for op_by_pieces_d change.
(clear_by_pieces_1): Add a dummy argument.
(clear_by_pieces): Updated for op_by_pieces_d change.
(compare_by_pieces_d::compare_by_pieces_d): Likewise.
(string_cst_read_str): Add a dummy argument.
* expr.h (by_pieces_constfn): Add a dummy argument.
(by_pieces_prev): New.
* target.def (overlap_op_by_pieces_p): New target hook.
* config/i386/i386.c (TARGET_OVERLAP_OP_BY_PIECES_P): New.
* doc/tm.texi.in: Add TARGET_OVERLAP_OP_BY_PIECES_P.
* doc/tm.texi: Regenerated.
gcc/testsuite/
PR middle-end/90773
* g++.dg/pr90773-1.h: New test.
* g++.dg/pr90773-1a.C: Likewise.
* g++.dg/pr90773-1b.C: Likewise.
* g++.dg/pr90773-1c.C: Likewise.
* g++.dg/pr90773-1d.C: Likewise.
* gcc.target/i386/pr90773-1.c: Likewise.
* gcc.target/i386/pr90773-2.c: Likewise.
* gcc.target/i386/pr90773-3.c: Likewise.
* gcc.target/i386/pr90773-4.c: Likewise.
* gcc.target/i386/pr90773-5.c: Likewise.
* gcc.target/i386/pr90773-6.c: Likewise.
* gcc.target/i386/pr90773-7.c: Likewise.
* gcc.target/i386/pr90773-8.c: Likewise.
* gcc.target/i386/pr90773-9.c: Likewise.
* gcc.target/i386/pr90773-10.c: Likewise.
* gcc.target/i386/pr90773-11.c: Likewise.
* gcc.target/i386/pr90773-12.c: Likewise.
* gcc.target/i386/pr90773-13.c: Likewise.
* gcc.target/i386/pr90773-14.c: Likewise.
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At some point DR_MISALIGNMENT was supposed to be -1 when the
access was not element aligned. That's obviously not true at this
point so this adjusts both store and load vectorizing to no longer
assume this which in turn allows simplifying the code.
2021-04-29 Richard Biener <rguenther@suse.de>
PR tree-optimization/100253
* tree-vect-stmts.c (vectorizable_load): Do not assume
element alignment when DR_MISALIGNMENT is -1.
(vectorizable_store): Likewise.
* g++.dg/pr100253.C: New testcase.
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The test FAILs on i?86-linux (due to -Wpsabi warnings). But, on closer
inspection it seems there is another problem, the dg-options in the testcase
means that the test is compiled with -O0 -O, -O1 -O, -O2 -O, -O3 -O, -Os -O
etc. options, so effectively is tested multiple times with the same options.
Fixed by dropping the dg-options line, then we have -w by default and iterate
over all the optimization levels (including the -O).
2021-04-29 Jakub Jelinek <jakub@redhat.com>
PR target/100305
* gcc.c-torture/compile/pr100305.c: Remove dg-options. Add PR line.
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In PR94121 I've changed aarch64_add_offset_1 to use absu_hwi instead of
abs_hwi because offset can be HOST_WIDE_INT_MIN. As can be seen with
the testcase below, aarch64_add_offset_1_temporaries suffers from the same
problem and should be in sync with aarch64_add_offset_1, i.e. for
HOST_WIDE_INT_MIN it needs a temporary.
2021-04-29 Jakub Jelinek <jakub@redhat.com>
PR target/100302
* config/aarch64/aarch64.c (aarch64_add_offset_1_temporaries): Use
absu_hwi instead of abs_hwi.
* gcc.target/aarch64/sve/pr100302.c: New test.
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The standard says that "The event-handle will be considered as if it
was specified on a firstprivate clause." which means that it can't
be explicitly specified in some other data-sharing clause.
The checking is implemented correctly for C, but for C++ when detach_seen
is true (i.e. the construct had detach clause) we were comparing
OMP_CLAUSE_DECL (c) with t, which was previously initialized to
OMP_CLAUSE_DECL (c), which means it complained about any explicit
data-sharing clause on the same construct with a detach clause.
Fixed by remembering the detach clause in detach_seen (instead of a boolean
flag) and comparing against its OMP_CLAUSE_DECL.
2021-04-29 Jakub Jelinek <jakub@redhat.com>
PR c++/100319
* semantics.c (finish_omp_clauses): Fix up check that variable
mentioned in detach clause doesn't appear in data-sharing clauses.
* c-c++-common/gomp/task-detach-3.c: New test.
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In testcases like PR38474 and PR99912 we're seeing very slow
PTA solving. One can observe an excessive amount of forwarding,
mostly during sd constraint solving. The way we solve the graph
does not avoid forwarding the same bits through multiple paths,
and especially when such alternate path involves ESCAPED as
intermediate this causes the ESCAPED solution to be expanded
in receivers.
The following adds heuristic to add_graph_edge which adds
forwarding edges but also guards the initial solution forwarding
(which is the expensive part) to detect the case of ESCAPED
receiving the same set and the destination already containing
ESCAPED.
This speeds up the PTA solving process by more than 50%.
2021-04-29 Richard Biener <rguenther@suse.de>
PR middle-end/38474
* tree-ssa-structalias.c (add_graph_edge): Avoid direct
forwarding when indirect forwarding through ESCAPED
alread happens.
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gcc/ada/
* exp_attr.adb (Expand_N_Attribute_Reference)
<Attribute_Max_Size_In_Storage_Elements>: Apply the checks for
universal integer contexts only in the default case.
* exp_ch4.adb (Get_Size_For_Range): Move to library level.
(Expand_N_Type_Conversion): If the operand has Universal_Integer
type and the conversion requires an overflow check, try to do an
intermediate conversion to a narrower type.
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gcc/ada/
* sem_ch3.adb (Check_Anonymous_Access_Component): Factor out
core processing of Check_Anonymous_Access_Components.
(Check_Anonymous_Access_Components): Call
Check_Anonymous_Access_Component.
(Process_Discriminants): Call Check_Anonymous_Access_Component.
* freeze.adb (Freeze_Record_Type): Code cleanups and add more tree
checking to handle changes in sem_ch3.adb.
* sem_ch8.adb (Find_Type): Remove special case for access
discriminant in task types, these are now supported.
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gcc/ada/
* exp_ch4.adb (Expand_Compare_Minimize_Eliminate_Overflow): Remove
entry condition.
(Expand_N_In): Call Minimized_Eliminated_Overflow_Check on the left
operand before doing the special overflow expansion.
(Expand_N_Op_Eq): Likewise.
(Expand_N_Op_Ge): Likewise.
(Expand_N_Op_Gt): Likewise.
(Expand_N_Op_Le): Likewise.
(Expand_N_Op_Lt): Likewise.
(Expand_N_Op_Ne): Likewise.
(Minimized_Eliminated_Overflow_Check): Return False for Minimized
if the size of the type is greater than that of Long_Long_Integer.
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gcc/ada/
* exp_ch5.adb (Expand_N_If_Statement): Only perform the
simplification on return True/False for internal nodes when
-fpreserve-control-flow is not set.
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gcc/ada/
* sem_attr.adb (Eval_Attribute) <Attribute_Machine>: Use
Round_Even instead of Round in the call to the Machine routine.
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gcc/ada/
* sem_attr.adb (Analyze_Attribute): Change "$" to "&".
Otherwise, Errout will trip over an uninitialized (invalid)
variable (Error_Msg_Unit_1).
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gcc/ada/
* libgnat/s-valuer.adb (Scan_Decimal_Digits): Set Extra to zero
when the precision limit is reached by means of trailing zeros
and prevent it from being overwritten later.
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gcc/ada/
* errout.adb (Output_Messages): Insert SGR strings where needed.
* erroutc.adb (Output_Message_Txt): Insert SGR strings where
needed in the text of the message itself.
(Output_Msg_Text): Allow for style message not to start
with (style).
* erroutc.ads: Add new constants and functions to control colors
in messages output to the terminal. Add variable Use_SGR_Control
that should be set to True for using SGR color control strings.
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gcc/ada/
* sem_eval.adb (Check_Non_Static_Context_For_Overflow): Apply
compile-time checking for overflows in non-static contexts
including inlined code.
(Eval_Arithmetic_Op): Use the new procedure.
(Eval_Unary_Op, Eval_Op_Expon): Add call to the new procedure.
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gcc/ada/
* checks.adb (Apply_Type_Conversion_Checks): Move out constraint
check generation, and add case for general access types with
constraints.
(Make_Discriminant_Constraint_Check): Created to centralize
generation of constraint checks for stored discriminants.
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gcc/ada/
* gnat1drv.adb (Adjust_Global_Switches): Force a 32-bit Duration
type if the maximum integer size is lower than 64 bits.
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gcc/ada/
* Makefile.rtl (ADA_EXCLUDE_SRCS): Remove unused files.
(ADA_INCLUDE_SRCS): Remove libgnat/system.ads
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gcc/ada/
* exp_aggr.adb (Collect_Initialization_Statements): Removed.
(Convert_Aggr_In_Object_Decl, Expand_Array_Aggregate): Fix
creation and insertion of Initialization_Statements. Do not set
Initialization_Statements when a transient scope is involved.
Move processing of Array_Slice here. Ensure that an object with
an Array_Slice call gets its array component initialized. Add
comments.
* exp_ch7.adb: Update comments.
(Store_Actions_In_Scope): Deal properly with an empty list which
might now be generated by Convert_Aggr_In_Object_Decl.
* exp_ch3.adb: Update comments.
(Expand_N_Object_Declaration): Remove processing of Array_Slice.
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gcc/ada/
* sem_ch8.adb (Analyze_Object_Renaming): Update check for
AI12-0401.
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gcc/ada/
* libgnat/s-stoele.ads (Storage_Offset): Cleanup comment.
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types
gcc/ada/
* exp_util.adb (Add_Own_DIC): Relax the suppression of adding a
DIC Check pragma that's done for abstract types by still doing
it in the case where GNATprove_Mode is set.
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gcc/ada/
* Makefile.rtl (ADA_EXCLUDE_SRCS): Remove s-gcc.adb, s-gcc.ads,
s-gccdiv.adb, s-gccdiv.ads, s-gccshi.adb and s-gccshi.ads.
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gcc/ada/
* layout.adb (Layout_Type): Refine type of a local variable with
the required size of object from Int to Pos (it is initialized
with 8 and only multiplied by 2); fix unbalanced parens in
comment.
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gcc/ada/
* eval_fat.adb (Succ): Use Ureal_Half in a couple of places.
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gcc/ada/
* sem_util.adb (Build_Constrained_Itype): Inhibit the generation
of predicate functions for this Itype, which is created for an
aggregate of a discriminated type. The object to which the
aggregate is assigned, e.g a writable actual parameter, will
apply the predicates if any are inherited from the base type.
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gcc/ada/
* sem_cat.adb (Set_Categorization_From_Pragmas): Remove special
case for generic child units; remove optimization for empty list
of pragmas; properly restore visibility.
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gcc/ada/
* sem_elab.adb (Process_SPARK_Instantiation): Fix typo in
comment.
* sem_prag.adb (Find_Related_Context): Add missing reference to
No_Caching in the comment; handle pragmas on compilation units.
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gcc/ada/
* doc/gnat_rm/implementation_defined_attributes.rst: Change all
occurrences of "permissible prefix" to "allowed prefix", for
consistency.
* gnat_rm.texi: Regenerate.
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gcc/ada/
* eval_fat.adb (Succ): Add a special case for zero if the type does
not support denormalized numbers. Always use the canonical formula
in other cases and add commentary throughout the function.
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gcc/ada/
* libgnat/s-fatgen.adb: Remove with clause for Interfaces and
use type clauses for Interfaces.Unsigned_{16,32,64}.
(Small16): Remove.
(Small32): Likewise
(Small64): Likewise.
(Small80): Likewise.
(Tiny16): Likewise.
(Tiny32): Likewise.
(Tiny64): Likewise.
(Tiny80): Likewise.
(Siz): Always use 16.
(NR): New constant.
(Rep_Last): Use it in the computation.
(Exp_Factor): Remove special case for 80-bit.
(Sign_Mask): Likewise.
(Finite_Succ): New function implementing the Succ attribute for
finite numbers.
(Pred): Rewrite in terms of Finite_Succ.
(Succ): Likewise.
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gcc/ada/
* debug_a.adb (Debug_Output_Astring): Remove obsolete comment.
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gcc/ada/
* sem_attr.adb (Check_Image_Type): Protect against empty
Image_Type.
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gcc/ada/
* libgnat/a-nbnbin.ads (From_Universal_Image): New.
(Big_Integer): Update definition.
* libgnat/a-nbnbre.ads, libgnat/a-nbnbre.adb
(From_Universal_Image): New.
(From_String): Remove alternate body, replaced by
From_Universal_Image.
(Big_Real): Update definition.
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gcc/ada/
* sem_ch8.adb (Find_Type): Check the No_Obsolescent_Features
restriction for 'Class applied to an untagged incomplete
type (when Ada_Version >= Ada_2005). Remove disabling of the
warning message for such usage, along with the ??? comment,
which no longer applies (because the -gnatg switch no longer
sets Warn_On_Obsolescent_Feature).
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gcc/ada/
* errout.adb (Error_Msg_NEL): Extract span from node.
(First_And_Last_Nodes): Use spans for subtype indications and
attribute definition clauses.
(Write_Source_Code_Lines): Fix for tabulation characters. Change
output for large spans to skip intermediate lines.
* sem_case.adb (Check_Choice_Set): Report duplicate choice on
the Original_Node for the case.
(Generic_Check_Choices): Set the Original_Node for the rewritten
case, so that the subtree used in spans has the correct
locations.
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When running the test-case included in this patch using an
nvptx accelerator, it fails in execution.
The problem is that the expansion of GOMP_SIMT_XCHG_BFLY is optimized away
during pass_jump as "trivially dead insns".
This is caused by this code in expand_GOMP_SIMT_XCHG_BFLY:
...
class expand_operand ops[3];
create_output_operand (&ops[0], target, mode);
...
expand_insn (targetm.code_for_omp_simt_xchg_bfly, 3, ops);
...
which doesn't guarantee that target is assigned to by the expanded insn.
F.i., if target is:
...
(gdb) call debug_rtx ( target )
(subreg/s/u:QI (reg:SI 40 [ _61 ]) 0)
...
then after expand_insn, we have:
...
(gdb) call debug_rtx ( ops[0].value )
(reg:QI 57)
...
See commit 3af3bec2e4d "internal-fn: Avoid dropping the lhs of some
calls [PR94941]" for a similar problem.
Fix this in the same way, by adding:
...
if (!rtx_equal_p (target, ops[0].value))
emit_move_insn (target, ops[0].value);
...
where applicable in the expand_GOMP_SIMT_* functions.
Tested libgomp on x86_64 with nvptx accelerator.
gcc/ChangeLog:
2021-04-28 Tom de Vries <tdevries@suse.de>
PR target/100232
* internal-fn.c (expand_GOMP_SIMT_ENTER_ALLOC)
(expand_GOMP_SIMT_LAST_LANE, expand_GOMP_SIMT_ORDERED_PRED)
(expand_GOMP_SIMT_VOTE_ANY, expand_GOMP_SIMT_XCHG_BFLY)
(expand_GOMP_SIMT_XCHG_IDX): Ensure target is assigned to.
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DSE performs a backwards walk over stmts removing stores but it
leaves removing resulting dead SSA defs to later passes. This
eats into its own alias walking budget if the removed stores kept
loads live. The following patch adds removal of trivially dead
SSA defs which helps in this situation and reduces the amount of
garbage followup passes need to deal with.
2021-04-28 Richard Biener <rguenther@suse.de>
PR tree-optimization/99912
* tree-ssa-dse.c (dse_dom_walker::m_need_cfg_cleanup): New.
(dse_dom_walker::todo): Likewise.
(dse_dom_walker::dse_optimize_stmt): Move VDEF check to the
caller.
(dse_dom_walker::before_dom_children): Remove trivially
dead SSA defs and schedule CFG cleanup if we removed all
PHIs in a block.
(pass_dse::execute): Get TODO as computed by the DOM walker
and return it. Wipe dominator info earlier.
* gcc.dg/pr95580.c: Disable DSE.
* gcc.dg/Wrestrict-8.c: Place a use after each memcpy.
* c-c++-common/ubsan/overflow-negate-3.c: Make asms volatile
to prevent them from being removed.
* c-c++-common/ubsan/overflow-sub-4.c: Likewise.
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This makes sure to fall into the delete_unreachable_blocks_update_callgraph
handling to remove blocks becoming unreachable when removing EH edges
by tracking blocks to need EH cleanup and doing that after releasing
dominance info.
This fixes an ICE seen with gfortran.dg/gomp/pr88933.f90 when enhancing
DSE.
2021-04-28 Richard Biener <rguenther@suse.de>
PR ipa/100308
* ipa-prop.c (ipcp_modif_dom_walker::before_dom_children):
Track blocks to cleanup EH in new m_need_eh_cleanup.
(ipcp_modif_dom_walker::cleanup_eh): New.
(ipcp_transform_function): Release dominator info before
doing EH cleanup.
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gcc/ChangeLog:
PR middle-end/100250
* attribs.c (attr_access::array_as_string): Avoid dereferencing
a pointer when it's null.
gcc/testsuite/ChangeLog:
PR middle-end/100250
* gcc.dg/uninit-pr100250.c: New test.
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gcc/ChangeLog:
* Makefile.in (OBJS): Add ipa-free-lang-data.o.
* ipa-free-lang-data.cc: New file.
* tree.c: Move pass free_lang_data to file above.
(build_array_type_1): Declare extern.
* tree.h (build_array_type_1): Declare.
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