Age | Commit message (Collapse) | Author | Files | Lines |
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PR tree-optimization/58619
2013-10-08 Dehao Chen <dehao@google.com>
* tree-inline.c (copy_phis_for_bb): Combine location data
only if non-null.
From-SVN: r203269
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2013-10-08 Zhenqiang Chen <zhenqiang.chen@linaro.org>
PR target/58423
* config/arm/arm.c (arm_emit_ldrd_pop): Attach
RTX_FRAME_RELATED_P on INSN.
From-SVN: r203267
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From-SVN: r203259
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2013-10-07 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/rs6000.c (altivec_expand_vec_perm_const_le): New.
(altivec_expand_vec_perm_const): Call it.
From-SVN: r203247
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stores at expand time.
gcc:
2013-10-07 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/vector.md (mov<mode>): Emit permuted move
sequences for LE VSX loads and stores at expand time.
* config/rs6000/rs6000-protos.h (rs6000_emit_le_vsx_move): New
prototype.
* config/rs6000/rs6000.c (rs6000_const_vec): New.
(rs6000_gen_le_vsx_permute): New.
(rs6000_gen_le_vsx_load): New.
(rs6000_gen_le_vsx_store): New.
(rs6000_gen_le_vsx_move): New.
* config/rs6000/vsx.md (*vsx_le_perm_load_v2di): New.
(*vsx_le_perm_load_v4si): New.
(*vsx_le_perm_load_v8hi): New.
(*vsx_le_perm_load_v16qi): New.
(*vsx_le_perm_store_v2di): New.
(*vsx_le_perm_store_v4si): New.
(*vsx_le_perm_store_v8hi): New.
(*vsx_le_perm_store_v16qi): New.
(*vsx_xxpermdi2_le_<mode>): New.
(*vsx_xxpermdi4_le_<mode>): New.
(*vsx_xxpermdi8_le_V8HI): New.
(*vsx_xxpermdi16_le_V16QI): New.
(*vsx_lxvd2x2_le_<mode>): New.
(*vsx_lxvd2x4_le_<mode>): New.
(*vsx_lxvd2x8_le_V8HI): New.
(*vsx_lxvd2x16_le_V16QI): New.
(*vsx_stxvd2x2_le_<mode>): New.
(*vsx_stxvd2x4_le_<mode>): New.
(*vsx_stxvd2x8_le_V8HI): New.
(*vsx_stxvd2x16_le_V16QI): New.
gcc/testsuite:
2013-10-07 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* gcc.target/powerpc/pr43154.c: Skip for ppc64 little endian.
* gcc.target/powerpc/fusion.c: Likewise.
From-SVN: r203246
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[gcc/]
2013-10-07 Renlin Li <Renlin.Li@arm.com>
* config/arm/arm-cores.def (cortex-a53): Use cortex tuning.
From-SVN: r203241
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31bit ABI.
2013-10-07 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* config/s390/s390.c (s390_register_info): Make the call-saved FPR
loop to work also for 31bit ABI.
Save the stack pointer for frame_size > 0.
2013-10-07 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gcc.target/s390/htm-nofloat-2.c: New testcase.
From-SVN: r203240
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* config/s390/s390.md ("tbegin", "tbegin_nofloat", "tbegin_retry")
("tbegin_retry_nofloat", "tend", "tabort", "tx_assist"): Remove
constraint letters from expanders.
("tbegin_retry", "tbegin_retry_nofloat"): Change predicate of the
retry count to general_operand.
("tabort"): Give operand 0 a mode.
("tabort_1"): Add mode and constraint letter for operand 0.
* doc/extend.texi: Fix protoype of __builtin_non_tx_store.
2013-10-07 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
* gcc.target/s390/htm-1.c: Add more tests to cover different
operand types.
From-SVN: r203239
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From-SVN: r203235
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reference member)
/cp
2013-10-06 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/58126
* class.c (check_bases): Propagate CLASSTYPE_READONLY_FIELDS_NEED_INIT
and CLASSTYPE_REF_FIELDS_NEED_INIT from bases to derived.
* init.c (diagnose_uninitialized_cst_or_ref_member_1): Extend error
messages about uninitialized const and references members to mention
the base class.
/testsuite
2013-10-06 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/58126
* g++.dg/init/uninitialized1.C: New.
From-SVN: r203232
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cp/pt.c:19742)
/cp
2013-10-06 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/56060
* pt.c (type_dependent_expression_p): Handle EXPR_PACK_EXPANSION.
/testsuite
2013-10-06 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/56060
* g++.dg/cpp0x/variadic144.C: New.
From-SVN: r203229
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From-SVN: r203227
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From-SVN: r203223
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/cp
2013-10-04 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/58560
* typeck2.c (build_functional_cast): Use error_operand_p on exp.
/testsuite
2013-10-04 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/58560
* g++.dg/cpp0x/auto39.C: New.
From-SVN: r203220
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/cp
2013-10-04 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/58503
* parser.c (cp_parser_perform_range_for_lookup): If eventually
either *begin or *end is type-dependent, return NULL_TREE.
(do_range_for_auto_deduction): If cp_parser_perform_range_for_lookup
returns NULL_TREE, don't actually do_auto_deduction.
/testsuite
2013-10-04 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/58503
* g++.dg/cpp0x/range-for26.C: New.
* g++.dg/cpp0x/range-for27.C: Likewise.
From-SVN: r203219
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/cp
2013-10-04 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/58448
* pt.c (tsubst): Use error_operand_p on parameter t.
/testsuite
2013-10-04 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/58448
* g++.dg/template/crash117.C: New.
From-SVN: r203218
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* tree-ssa-threadedge.c: Fix some trailing whitespace problems.
* tree-ssa-threadedge.c (thread_through_normal_block): Broken out of ...
(thread_across_edge): Here. Call it.
From-SVN: r203217
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* go-gcc.cc (Backend::convert_expression): New function.
From-SVN: r203209
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location list expression (or a...
gcc/
* dwarf2out.c (dw_sra_loc_expr): Release addr_table entries when
discarding a location list expression (or a piece of one).
From-SVN: r203206
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From-SVN: r203205
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From-SVN: r203199
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* ChangeLog: Fix ChangeLog.
* testsuite/ChangeLog: Ditto.
From-SVN: r203198
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From-SVN: r203197
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2013-10-04 Marc Glisse <marc.glisse@inria.fr>
PR c++/19476
gcc/cp/
* decl.c (cxx_init_decl_processing): Set operator_new_flag.
gcc/testsuite/
* g++.dg/tree-ssa/pr19476-5.C: New file.
* g++.dg/tree-ssa/pr19476-1.C: Mention pr19476-5.C.
From-SVN: r203194
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/cp
2013-10-04 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/58584
* decl2.c (save_template_attributes): Handle error_mark_node as
*attr_p argument.
(cp_check_const_attributes): Likewise for attributes.
* parser.c (cp_parser_std_attribute_spec): When alignas_expr is an
error_mark_node call cp_parser_skip_to_end_of_statement.
/testsuite
2013-10-04 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/58584
* g++.dg/cpp0x/gen-attrs-55.C: New.
From-SVN: r203193
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2013-10-03 Easwaran Raman <eraman@google.com>
PR c++/33911
* parser.c (cp_parser_init_declarator): Do not drop attributes
of template member functions.
2013-10-03 Easwaran Raman <eraman@google.com>
PR c++/33911
* g++.dg/ext/attribute47.C: New.
From-SVN: r203174
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* i386.c (ix86_issue_rate): Pentium4, Nocona has issue rate of 2.
Core2, Corei7 and Haswell has issue rate of 4.
(ix86_adjust_cost): Remove ATOM case; fix core2/corei7/Haswell case.
From-SVN: r203172
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accumulate-outgoing-args when producing unwind info.
* i386.c (ix86_option_override_internal): Do not enable
accumulate-outgoing-args when producing unwind info.
From-SVN: r203171
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simplify_operand_subreg.
2013-10-03 Wei Mi <wmi@google.com>
* lra-constraints.c (insert_move_for_subreg): New function
extracted from simplify_operand_subreg.
(simplify_operand_subreg): Add reload for paradoxical subreg.
From-SVN: r203169
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builtin_expect such that we should fix the size/time...
* ipa-inline-analysis.c (find_foldable_builtin_expect): Find
the candidate of builtin_expect such that we should fix the
size/time estimation.
(estimate_function_body_sizes): Do the acutally size/time fix-up
for builtin_expect.
From-SVN: r203168
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from param builtin_expect_probability.
* predict.c (tree_predict_by_opcode): Get the probability
for builtin_expect from param builtin_expect_probability.
* params.def (BUILTIN_EXPECT_PROBABILITY): New parameter.
* predict.def (PRED_BUILTIN_EXPECT_RELAXED): Fix comments.
* doc/invoke.texi: Add documentation for builtin-expect-probability.
* gcc.target/i386/cold-attribute-2.c: Fix the test by using original
probability.
* gcc.dg/tree-ssa/ipa-split-5.c: Ditto.
* gcc.dg/tree-ssa/ipa-split-6.c: Ditto.
--This li (t)ene, and those below, will be ignored--
M gcc/params.def
M gcc/predict.def
M gcc/ChangeLog
M gcc/testsuite/gcc.dg/tree-ssa/ipa-split-5.c
M gcc/testsuite/gcc.dg/tree-ssa/ipa-split-6.c
M gcc/testsuite/gcc.target/i386/cold-attribute-2.c
M gcc/predict.c
M gcc/doc/invoke.texi
From-SVN: r203167
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in union)
PR c++/58510
cp/
* init.c (sort_mem_initializers): Splice when giving an error.
testsuite/
* g++.dg/cpp0x/pr58510.C: New test.
From-SVN: r203165
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2013-10-03 Marc Glisse <marc.glisse@inria.fr>
PR c++/19476
gcc/c-family/
* c.opt (fcheck-new): Move to common.opt.
gcc/
* common.opt (fcheck-new): Moved from c.opt. Make it 'Common'.
* calls.c (alloca_call_p): Use get_callee_fndecl.
* fold-const.c (tree_expr_nonzero_warnv_p): Handle operator new.
* tree-vrp.c (gimple_stmt_nonzero_warnv_p, stmt_interesting_for_vrp):
Likewise.
(vrp_visit_stmt): Remove duplicated code.
gcc/testsuite/
* g++.dg/tree-ssa/pr19476-1.C: New file.
* g++.dg/tree-ssa/pr19476-2.C: Likewise.
* g++.dg/tree-ssa/pr19476-3.C: Likewise.
* g++.dg/tree-ssa/pr19476-4.C: Likewise.
From-SVN: r203163
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vsx_* name.
[gcc]
2013-10-03 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000-builtin.def (XSRDPIM): Use floatdf2,
ceildf2, btruncdf2, instead of vsx_* name.
* config/rs6000/vsx.md (vsx_add<mode>3): Change arithmetic
iterators to only do V2DF and V4SF here. Move the DF code to
rs6000.md where it is combined with SF mode. Replace <VSv> with
just 'v' since only vector operations are handled with these insns
after moving the DF support to rs6000.md.
(vsx_sub<mode>3): Likewise.
(vsx_mul<mode>3): Likewise.
(vsx_div<mode>3): Likewise.
(vsx_fre<mode>2): Likewise.
(vsx_neg<mode>2): Likewise.
(vsx_abs<mode>2): Likewise.
(vsx_nabs<mode>2): Likewise.
(vsx_smax<mode>3): Likewise.
(vsx_smin<mode>3): Likewise.
(vsx_sqrt<mode>2): Likewise.
(vsx_rsqrte<mode>2): Likewise.
(vsx_fms<mode>4): Likewise.
(vsx_nfma<mode>4): Likewise.
(vsx_copysign<mode>3): Likewise.
(vsx_btrunc<mode>2): Likewise.
(vsx_floor<mode>2): Likewise.
(vsx_ceil<mode>2): Likewise.
(vsx_smaxsf3): Delete scalar ops that were moved to rs6000.md.
(vsx_sminsf3): Likewise.
(vsx_fmadf4): Likewise.
(vsx_fmsdf4): Likewise.
(vsx_nfmadf4): Likewise.
(vsx_nfmsdf4): Likewise.
(vsx_cmpdf_internal1): Likewise.
* config/rs6000/rs6000.h (TARGET_SF_SPE): Define macros to make it
simpler to select whether a target has SPE or traditional floating
point support in iterators.
(TARGET_DF_SPE): Likewise.
(TARGET_SF_FPR): Likewise.
(TARGET_DF_FPR): Likewise.
(TARGET_SF_INSN): Macros to say whether floating point support
exists for a given operation for expanders.
(TARGET_DF_INSN): Likewise.
* config/rs6000/rs6000.c (Ftrad): New mode attributes to allow
combining of SF/DF mode operations, using both traditional and VSX
registers.
(Fvsx): Likewise.
(Ff): Likewise.
(Fv): Likewise.
(Fs): Likewise.
(Ffre): Likewise.
(FFRE): Likewise.
(abs<mode>2): Combine SF/DF modes using traditional floating point
instructions. Add support for using the upper DF registers with
VSX support, and SF registers with power8-vector support. Update
expanders for operations supported by both the SPE and traditional
floating point units.
(abs<mode>2_fpr): Likewise.
(nabs<mode>2): Likewise.
(nabs<mode>2_fpr): Likewise.
(neg<mode>2): Likewise.
(neg<mode>2_fpr): Likewise.
(add<mode>3): Likewise.
(add<mode>3_fpr): Likewise.
(sub<mode>3): Likewise.
(sub<mode>3_fpr): Likewise.
(mul<mode>3): Likewise.
(mul<mode>3_fpr): Likewise.
(div<mode>3): Likewise.
(div<mode>3_fpr): Likewise.
(sqrt<mode>3): Likewise.
(sqrt<mode>3_fpr): Likewise.
(fre<Fs>): Likewise.
(rsqrt<mode>2): Likewise.
(cmp<mode>_fpr): Likewise.
(smax<mode>3): Likewise.
(smin<mode>3): Likewise.
(smax<mode>3_vsx): Likewise.
(smin<mode>3_vsx): Likewise.
(negsf2): Delete SF operations that are merged with DF.
(abssf2): Likewise.
(addsf3): Likewise.
(subsf3): Likewise.
(mulsf3): Likewise.
(divsf3): Likewise.
(fres): Likewise.
(fmasf4_fpr): Likewise.
(fmssf4_fpr): Likewise.
(nfmasf4_fpr): Likewise.
(nfmssf4_fpr): Likewise.
(sqrtsf2): Likewise.
(rsqrtsf_internal1): Likewise.
(smaxsf3): Likewise.
(sminsf3): Likewise.
(cmpsf_internal1): Likewise.
(copysign<mode>3_fcpsgn): Add VSX/power8-vector support.
(negdf2): Delete DF operations that are merged with SF.
(absdf2): Likewise.
(nabsdf2): Likewise.
(adddf3): Likewise.
(subdf3): Likewise.
(muldf3): Likewise.
(divdf3): Likewise.
(fred): Likewise.
(rsqrtdf_internal1): Likewise.
(fmadf4_fpr): Likewise.
(fmsdf4_fpr): Likewise.
(nfmadf4_fpr): Likewise.
(nfmsdf4_fpr): Likewise.
(sqrtdf2): Likewise.
(smaxdf3): Likewise.
(smindf3): Likewise.
(cmpdf_internal1): Likewise.
(lrint<mode>di2): Use TARGET_<MODE>_FPR macro.
(btrunc<mode>2): Delete separate expander, and combine with the
insn and add VSX instruction support. Use TARGET_<MODE>_FPR.
(btrunc<mode>2_fpr): Likewise.
(ceil<mode>2): Likewise.
(ceil<mode>2_fpr): Likewise.
(floor<mode>2): Likewise.
(floor<mode>2_fpr): Likewise.
(fma<mode>4_fpr): Combine SF and DF fused multiply/add support.
Add support for using the upper registers with VSX and
power8-vector. Move insns to be closer to the define_expands. On
VSX systems, prefer the traditional form of FMA over the VSX
version, since the traditional form allows the target not to
overlap with the inputs.
(fms<mode>4_fpr): Likewise.
(nfma<mode>4_fpr): Likewise.
(nfms<mode>4_fpr): Likewise.
[gcc/testsuite]
2013-10-03 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/p8vector-fp.c: New test for floating point
scalar operations when using -mupper-regs-sf and -mupper-regs-df.
* gcc.target/powerpc/ppc-target-1.c: Update tests to allow either
VSX scalar operations or the traditional floating point form of
the instruction.
* gcc.target/powerpc/ppc-target-2.c: Likewise.
* gcc.target/powerpc/recip-3.c: Likewise.
* gcc.target/powerpc/recip-5.c: Likewise.
* gcc.target/powerpc/pr72747.c: Likewise.
* gcc.target/powerpc/vsx-builtin-3.c: Likewise.
From-SVN: r203162
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[gcc/]
2013-10-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Richard Earnshaw <richard.earnshaw@arm.com>
* config/arm/aarch-common-protos.h (struct alu_cost_table): New.
(struct mult_cost_table): Likewise.
(struct mem_cost_table): Likewise.
(struct fp_cost_table): Likewise.
(struct vector_cost_table): Likewise.
(cpu_cost_table): Likewise.
* config/arm/arm.opt (mold-rts-costs): New option.
(mnew-generic-costs): Likewise.
* config/arm/arm.c (generic_extra_costs): New table.
(cortexa15_extra_costs): Likewise.
(arm_slowmul_tune): Use NULL as new costs.
(arm_fastmul_tune): Likewise.
(arm_strongarm_tune): Likewise.
(arm_xscale_tune): Likewise.
(arm_9e_tune): Likewise.
(arm_v6t2_tune): Likewise.
(arm_cortex_a5_tune): Likewise.
(arm_cortex_a9_tune): Likewise.
(arm_v6m_tune): Likewise.
(arm_fa726te_tune): Likewise.
(arm_cortex_a15_tune): Use cortex15_extra_costs.
(arm_cortex_tune): Use generict_extra_costs.
(shifter_op_p): New function.
(arm_unspec_cost): Likewise.
(LIBCALL_COST): Define.
(arm_new_rtx_costs): New function.
(arm_rtx_costs): Use arm_new_rtx_costs when core-specific
table is available. Use old costs otherwise unless mnew-generic-costs
is specified.
* config/arm/arm-protos.h (tune_params): Add insn_extra_cost field.
(cpu_cost_table): Declare.
Co-Authored-By: Richard Earnshaw <rearnsha@arm.com>
From-SVN: r203160
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PR58460, the add and sub shifted register instruction forms in AArch64
do not permit the stack register. This patch removes k constraint
from the relevant patterns and adds reduced form of the test case.
From-SVN: r203157
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From-SVN: r203156
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2013-10-02 Teresa Johnson <tejohnson@google.com>
* predict.c (probably_never_executed): New function.
(probably_never_executed_bb_p): Invoke probably_never_executed.
(probably_never_executed_edge_p): Ditto.
* bb-reorder.c (find_rarely_executed_basic_blocks_and_crossing_edges):
Treat profile insanities conservatively.
From-SVN: r203152
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* config.gcc (hppa*64*-*-linux*): Don't add pa/t-linux to tmake_file.
From-SVN: r203148
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2013-10-02 Vladimir Makarov <vmakarov@redhat.com>
* lra-constraints.c (process_alt_operand): Calculate scratch_p and
use it. Use smaller increase for scratch. Don't increase reject
for early clobber scratch.
* lra-eliminations.c (eliminate_regs_in_insn): Remove all insns
setting eliminated regs except setting fp from hfp.
(lra_eliminate): Check lra_insn_recog_data on NULL.
From-SVN: r203147
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From-SVN: r203146
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2013-10-02 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/58587
* config/rs6000/rs6000-cpus.def (ISA_2_6_MASKS_SERVER): Turn off
setting -mvsx-timode by default until the underlying problem is
fixed.
(RS6000_CPU, power7 defaults): Likewise.
From-SVN: r203142
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* config/x-linux (host-linux.o): Remove header dependencies.
Use $(COMPILE) and $(POSTCOMPILE).
* config/t-linux-android (linux-android.o): Ditto.
From-SVN: r203136
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fortran/trans-expr.c:2360)
2013-10-02 Tobias Burnus <burnus@net-b.de>
PR fortran/58593
* trans-expr.c (gfc_conv_string_tmp): Fix obtaining
the byte size of a single character.
2013-10-02 Tobias Burnus <burnus@net-b.de>
PR fortran/58593
* gfortran.dg/char_length_19.f90: New.
From-SVN: r203135
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* Makefile.in (expmed.o-warn): Remove.
From-SVN: r203130
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* graphite-scop-detection.c: Include tree-ssa-propagate,h.
* graphite-sese-to-poly.c: Include tree-ssa-propagate.h.
From-SVN: r203129
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* go-gcc.cc: Include "real.h" and "realmpfr.h".
(Backend::integer_constant_expression): New function.
(Backend::float_constant_expression): New function.
(Backend::complex_constant_expression): New function.
From-SVN: r203127
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This patch fixes an issue where expansion of an ORIF expression arbitrarily
applied the probability that the entire condition was true to just the
first condition. When the ORIF true probability was 100%, this resulted
in the second condition's jump being given a count of zero (since the
first condition's jump got 100% of the count), leading to incorrect function
splitting when it had a non-zero probability in reality. Since there
currently isn't better information about which condition resulted
in the ORIF being true, apply a 50-50 probability that it is the first
vs. second condition that caused the entire expression to be true,
so that neither condition's true label ends up as a 0-count bb.
An equivalent fix is made for ANDIF expansion.
2013-10-02 Teresa Johnson <tejohnson@google.com>
* dojump.c (do_jump_1): Divide probability between
both conditions of a TRUTH_ORIF_EXPR.
From-SVN: r203126
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From-SVN: r203125
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/cp
2013-10-02 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/58535
* parser.c (cp_parser_function_specifier_opt): Upon error about
virtual templates don't set ds_virtual.
(finish_fully_implicit_template): Reject virtual implicit templates.
/testsuite
2013-10-02 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/58535
* g++.dg/parse/crash65.C: New.
* g++.dg/cpp1y/pr58535.C: Likewise.
From-SVN: r203123
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