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2015-07-10attr_thumb.c: Skip if Thumb is not supported.Christophe Lyon3-0/+9
2015-07-10 Christophe Lyon <christophe.lyon@linaro.org> * gcc.target/arm/attr_thumb.c: Skip if Thumb is not supported. * gcc.target/arm/flip-thumb.c: Likewise. From-SVN: r225665
2015-07-10genmatch.c (dt_node::gen_kids_1): Fix indenting of case labels.Richard Biener2-25/+32
2015-07-10 Richard Biener <rguenther@suse.de> * genmatch.c (dt_node::gen_kids_1): Fix indenting of case labels. (decision_tree::gen_gimple): Likewise. (decision_tree::gen_generic): Likewise. From-SVN: r225663
2015-07-10re PR target/66813 (gcc.target/i386/asm-flag-5.c failed with -march=pentium)Uros Bizjak4-1/+27
PR target/66813 * config/i386/i386.c (ix86_md_asm_adjust): Emit movstrictqi sequence for TARGET_ZERO_EXTEND_WITH_AND targets. testsuite/ChangeLog: PR target/66813 * gcc.target/i386/pr66813.c: New test. From-SVN: r225662
2015-07-10re PR middle-end/66820 (internal compiler error: in get_expr_operands, at ↵Jakub Jelinek5-6/+38
tree-ssa-operands.c:910) PR middle-end/66820 * gimplify.c (maybe_fold_stmt): Don't fold in ORT_PARALLEL or ORT_TASK contexts. * omp-low.c (lower_omp): Call fold_stmt even if taskreg_nesting_level is non-zero. * gcc.dg/gomp/pr66820.c: New test. From-SVN: r225661
2015-07-10[obvious] Fix typos above expand_cond_expr_using_cmoveKyrylo Tkachov2-3/+8
* expr.c (expand_cond_expr_using_cmove): Fix typos in comment above function. From-SVN: r225659
2015-07-10re PR c++/65592 (internal compiler error: Segmentation fault when using ↵Paolo Carlini2-0/+24
non-existent enum class enumerator) 2015-07-10 Paolo Carlini <paolo.carlini@oracle.com> PR c++/65592 * g++.dg/cpp0x/scoped_enum6.C: New. From-SVN: r225658
2015-07-10Insert new bound in try_transform_to_exit_first_loop_altTom de Vries5-1/+70
2015-07-10 Tom de Vries <tom@codesourcery.com> * tree-parloops.c (try_transform_to_exit_first_loop_alt): If not found, insert nit + 1 bound. * testsuite/libgomp.fortran/parloops-exit-first-loop-alt-2.f95: New test. * testsuite/libgomp.fortran/parloops-exit-first-loop-alt.f95: New test. * gfortran.dg/parloops-exit-first-loop-alt-2.f95: New test. * gfortran.dg/parloops-exit-first-loop-alt.f95: New test. From-SVN: r225655
2015-07-10tree-if-conv.c (if_convertible_gimple_assign_stmt_p): Use ifcvt_could_trap_p ↵Richard Biener2-22/+21
also when not flag_tree_loop_if_convert_stores. 2015-07-10 Richard Biener <rguenther@suse.de> * tree-if-conv.c (if_convertible_gimple_assign_stmt_p): Use ifcvt_could_trap_p also when not flag_tree_loop_if_convert_stores. (if_convertible_loop_p_1): For this always compute bb predicates. (if_convertible_loop_p): And free them. From-SVN: r225654
2015-07-10ipa-icf.c: Fix typo in dump messageBernhard Reutner-Fischer2-1/+6
2015-07-10 Bernhard Reutner-Fischer <aldot@gcc.gnu.org> * ipa-icf.c (sem_item_optimizer::do_congruence_step): Fix typo in dump message. From-SVN: r225653
2015-07-10re PR tree-optimization/66823 (-ftree-loop-if-convert-stores miscompiles ↵Richard Biener4-3/+14
gfortran.dg/elemental_optional_args_3.f90) 2015-07-10 Richard Biener <rguenther@suse.de> PR tree-optimization/66823 * tree-if-conv.c (memrefs_read_or_written_unconditionally): Fix inverted predicate. * gcc.dg/vect/pr61194.c: Remove -ftree-loop-if-convert-stores which should not be necessary. XFAIL. From-SVN: r225652
2015-07-10re PR c++/64848 (G++ internal compiler error with templated lambdas ↵Paolo Carlini2-0/+37
capturing variable) 2015-07-09 Paolo Carlini <paolo.carlini@oracle.com> PR c++/64848 * g++.dg/cpp0x/lambda/lambda-ice14.C: New. From-SVN: r225648
2015-07-10Daily bump.GCC Administrator1-1/+1
From-SVN: r225646
2015-07-09mti-linux.h (MIPS_SYSVERSION_SPEC): Update to handle mips[32|64]r3 and ↵Steve Ellcey2-4/+13
mips[32|64]r5. 2015-07-09 Steve Ellcey <sellcey@imgtec.com> * config/mips/mti-linux.h (MIPS_SYSVERSION_SPEC): Update to handle mips[32|64]r3 and mips[32|64]r5. From-SVN: r225643
2015-07-09re PR middle-end/66633 (ICE on valid "verify_gimple failed" with OpenMP)Jakub Jelinek7-8/+108
PR middle-end/66633 * tree-nested.c (get_static_chain): Or in a flag into info->static_chain_added. (get_frame_field, get_nonlocal_debug_decl): Likewise. (convert_nonlocal_omp_clauses, convert_local_omp_clauses): Revert 2015-07-01 changes. (convert_tramp_reference_stmt): If a frame_decl or chain_decl is needed newly inside of GIMPLE_OMP_{PARALLEL,TASK,TARGET} body, add it to clauses. * gcc.dg/gomp/pr66633-1.c: New test. * gcc.dg/gomp/pr66633-2.c: New test. * gcc.dg/gomp/pr66633-3.c: New test. * gcc.dg/gomp/pr66633-4.c: New test. From-SVN: r225638
2015-07-09re PR tree-optimization/66718 (Non-invariant ADDR_EXPR not vectorized)Jakub Jelinek2-7/+110
PR tree-optimization/66718 * tree-vect-stmts.c (struct simd_call_arg_info): Add simd_lane_linear field. (vect_simd_lane_linear): New function. (vectorizable_simd_clone_call): Support using linear arguments for addresses of arrays elements indexed by GOMP_SIMD_LANE result. From-SVN: r225637
2015-07-09target-supports.exp (check_effective_target_pie): Add *-*-dragonfly*John Marino2-0/+6
2015-07-09 John Marino <gnugcc@marino.st> * lib/target-supports.exp (check_effective_target_pie): Add *-*-dragonfly* From-SVN: r225636
2015-07-09Adjust variable shift costs for IA MCUH.J. Lu2-1/+6
We reduce code size for IA MCU by adjusting variable shift costs for IA MCU PR target/66821 * config/i386/i386.c (iamcu_cost): Adjust variable shift costs. From-SVN: r225635
2015-07-09rs6000-protos.h (rs6000_secondary_reload_memory): Use machine mode, not enum ↵Michael Meissner1-0/+58
machine_mode in the prototype. 2015-07-09 Michael Meissner <meissner@linux.vnet.ibm.com> * config/rs6000/rs6000-protos.h (rs6000_secondary_reload_memory): Use machine mode, not enum machine_mode in the prototype. * config/rs6000/rs6000.h (FLOAT128_IEEE_P): New helper macros to classify 128-bit floating point support. (FLOAT128_IBM_P): Likewise. (FLOAT128_VECTOR_P): Likewise. (FLOAT128_2REG_P): Likewise. (SCALAR_FLOAT_MODE_NOT_VECTOR_P): Likewise. (SLOW_UNALIGNED_ACCESS): Add IEEE 128-bit floating point support. (HARD_REGNO_CALLER_SAVE_MODE): Likewise. (HARD_REGNO_CALL_PART_CLOBBERED): Likewise. * config/rs6000/rs6000.c (rs6000_hard_regno_nregs_internal): Drop tests against TFmode/TDmode, since those modes do not use VSX addresses. (rs6000_hard_regno_mode_ok): Add IEEE 128-bit floating point support. (rs6000_init_hard_regno_mode_ok): Use new helper macros instead of tests against TFmode, etc. (invalid_e500_subreg): Add tests against IFmode/KFmode. (reg_offset_addressing_ok_p): Likewise. (rs6000_legitimate_offset_address_p): Likewise. (rs6000_legitimize_address): Likewise. (rs6000_legitimize_reload_address): Likewise. (rs6000_legitimate_address_p): Clean up tests against TFmode and TDmode to use the new helper macros, which will include IFmode and KFmode. (rs6000_emit_move): Likewise. (rs6000_darwin64_record_arg_recurse): Likewise. (print_operand): Likewise. (rs6000_member_type_forces_blk): Treat IEEE 128-bit floating point that uses a single vector register as a vector and not as a floating point register in terms of the calling sequence. (rs6000_discover_homogeneous_aggregate): Likewise. (rs6000_return_in_memory): Likewise. (init_cumulative_args): Likewise. (rs6000_function_arg_boundary): Likewise. (rs6000_function_arg_advance_1): Likewise. (rs6000_function_arg): Likewise. (rs6000_pass_by_reference): Likewise. (rs6000_gimplify_va_arg): Likewise. (rs6000_secondary_reload_memory): Use machine_mode not enum machine mode. (rs6000_split_multireg_move): Use new helper macros. (spe_func_has_64bit_regs_p): Likewise. (rs6000_output_function_epilogue): Add IFmode/KFmode support. (output_toc): Use new helper macros. (rs6000_register_move_cost): Likewise. (rs6000_function_value): Add IEEE 128-bit floating point calling sequence support. (rs6000_libcall_value): Likewise. (rs6000_scalar_mode_supported_p): Add support for IEEE 128-bit floating point support. (rs6000_vector_mode_supported_p): Likewise. From-SVN: r225632
2015-07-09rs6000-protos.h (rs6000_secondary_reload_memory): Use machine mode, not enum ↵Michael Meissner3-60/+113
machine_mode in the prototype. 2015-07-09 Michael Meissner <meissner@linux.vnet.ibm.com> * config/rs6000/rs6000-protos.h (rs6000_secondary_reload_memory): Use machine mode, not enum machine_mode in the prototype. * config/rs6000/rs6000.h (FLOAT128_IEEE_P): New helper macros to classify 128-bit floating point support. (FLOAT128_IBM_P): Likewise. (FLOAT128_VECTOR_P): Likewise. (FLOAT128_2REG_P): Likewise. (SCALAR_FLOAT_MODE_NOT_VECTOR_P): Likewise. (SLOW_UNALIGNED_ACCESS): Add IEEE 128-bit floating point support. (HARD_REGNO_CALLER_SAVE_MODE): Likewise. (HARD_REGNO_CALL_PART_CLOBBERED): Likewise. * config/rs6000/rs6000.c (rs6000_hard_regno_nregs_internal): Drop tests against TFmode/TDmode, since those modes do not use VSX addresses. (rs6000_hard_regno_mode_ok): Add IEEE 128-bit floating point support. (rs6000_init_hard_regno_mode_ok): Use new helper macros instead of tests against TFmode, etc. (invalid_e500_subreg): Add tests against IFmode/KFmode. (reg_offset_addressing_ok_p): Likewise. (rs6000_legitimate_offset_address_p): Likewise. (rs6000_legitimize_address): Likewise. (rs6000_legitimize_reload_address): Likewise. (rs6000_legitimate_address_p): Clean up tests against TFmode and TDmode to use the new helper macros, which will include IFmode and KFmode. (rs6000_emit_move): Likewise. (rs6000_darwin64_record_arg_recurse): Likewise. (print_operand): Likewise. (rs6000_member_type_forces_blk): Treat IEEE 128-bit floating point that uses a single vector register as a vector and not as a floating point register in terms of the calling sequence. (rs6000_discover_homogeneous_aggregate): Likewise. (rs6000_return_in_memory): Likewise. (init_cumulative_args): Likewise. (rs6000_function_arg_boundary): Likewise. (rs6000_function_arg_advance_1): Likewise. (rs6000_function_arg): Likewise. (rs6000_pass_by_reference): Likewise. (rs6000_gimplify_va_arg): Likewise. (rs6000_secondary_reload_memory): Use machine_mode not enum machine mode. (rs6000_split_multireg_move): Use new helper macros. (spe_func_has_64bit_regs_p): Likewise. (rs6000_output_function_epilogue): Add IFmode/KFmode support. (output_toc): Use new helper macros. (rs6000_register_move_cost): Likewise. (rs6000_function_value): Add IEEE 128-bit floating point calling sequence support. (rs6000_libcall_value): Likewise. (rs6000_scalar_mode_supported_p): Add support for IEEE 128-bit floating point support. (rs6000_vector_mode_supported_p): Likewise. From-SVN: r225631
2015-07-09pt.c (instantiation_dependent_r): Call value_dependent_expression_p.Jason Merrill3-5/+6
* pt.c (instantiation_dependent_r) [TRAIT_EXPR]: Call value_dependent_expression_p. From-SVN: r225622
2015-07-09cp-tree.h (struct cp_parameter_declarator): Rename ellipsis_p to ↵Jason Merrill3-79/+43
template_parameter_pack_p. * cp-tree.h (struct cp_parameter_declarator): Rename ellipsis_p to template_parameter_pack_p. * parser.c (declarator_can_be_parameter_pack): False if parameter_pack_p is set. (make_parameter_declarator): Add template_parameter_pack_p parm. (cp_parser_template_parameter): Remove parameter pack parsing. (cp_parser_parameter_declaration): Handle all parameter packs. Tweak default argument permerror. From-SVN: r225621
2015-07-09* parser.c (cp_parser_default_type_template_argument)Andrew Sutton2-40/+72
(cp_parser_default_template_template_argument): Factor out from cp_parser_type_parameter. From-SVN: r225620
2015-07-09re PR rtl-optimization/66782 (Unable to run 64-bit wine after MS->SYSV ↵Vladimir Makarov5-9/+50
register changes) 2015-07-09 Vladimir Makarov <vmakarov@redhat.com> PR rtl-optimization/66782 * lra-int.h (struct lra_insn_recog_data): Add comment about clobbered hard regs for arg_hard_regs. * lra.c (lra_set_insn_recog_data): Add clobbered hard regs. * lra-lives.c (process_bb_lives): Process clobbered hard regs. Add condition for processing used hard regs. * lra-constraints.c (update_ebb_live_info, inherit_in_ebb): Process clobbered hard regs. From-SVN: r225618
2015-07-09genmatch.c (fprintf_indent): New function.Michael Matz2-256/+407
* genmatch.c (fprintf_indent): New function. (operand::gen_transform): Add indent parameter. (expr::gen_transform, c_expr::gen_transform, capture::gen_transform): Ditto and use fprintf_indent. (dt_node::gen, dt_node::gen_kids, dt_node::gen_kids_1): Ditto. (dt_operand::gen, dt_operand::gen_predicate, dt_operand::gen_match_op, dt_operand::gen_gimple_expr, dt_operand::gen_generic_expr, dt_simplify::gen): Ditto. (decision_tree::gen_gimple): Adjust calls and indent generated code. (decision_tree::gen_generic): Ditto. (write_predicate): Ditto. From-SVN: r225617
2015-07-09re PR target/66814 (ICE: gcc.target/i386/avx512f-klogic-2.c)Uros Bizjak5-6/+32
PR target/66814 * config/i386/predicates.md (nonimmediate_gr_operand): New predicate. * config/i386/i386.md (not peephole2): Use nonimmediate_gr_operand. (varous peephole2s): Use {GENERAL,SSE,MMX}_REGNO_P instead of {GENERAL_SSE_MMX}_REG_P where appropriate. testsuite/ChangeLog: PR target/66814 * gcc.target/i386/pr66814.c: New test. From-SVN: r225616
2015-07-09typeck.c (warn_args_num): Rename to error_args_num.Paolo Carlini2-5/+10
2015-07-09 Paolo Carlini <paolo.carlini@oracle.com> * typeck.c (warn_args_num): Rename to error_args_num. (convert_arguments): Adjust calls. From-SVN: r225615
2015-07-09fnmul-1.c: Fix whitespace.Szabolcs Nagy5-18/+25
2015-07-09 Szabolcs Nagy <szabolcs.nagy@arm.com> * gcc.target/aarch64/fnmul-1.c: Fix whitespace. * gcc.target/aarch64/fnmul-2.c: Likewise. * gcc.target/aarch64/fnmul-3.c: Likewise. * gcc.target/aarch64/fnmul-4.c: Likewise. From-SVN: r225613
2015-07-09lto-streamer.h: Don't include target.h and alloc-pool.h.Andrew MacLeod25-16/+46
2015-07-09 Andrew MacLeod <amacleod@redhat.com> * lto-streamer.h: Don't include target.h and alloc-pool.h. * builtins.c: Adjust includes. * gimple.c: Likewise. * ipa-icf.c: Likewise. * lto-opts.c: Likewise. * ipa-reference.c: Likewise. * lto-section-out.c: Likewise. * lto-streamer-in.c: Likewise. * lto-streamer-out.c: Likewise. * opts-global.c: Likewise. * symtab.c: Likewise. * tree-chkp.c: Likewise. * tree-ssa-live.c: Likewise. * tree-streamer-in.c: Likewise. * tree-streamer-out.c: Likewise. * config/darwin.c: Likewise. * config/i386/winnt.c: Likewise. cp 2015-07-09 Andrew MacLeod <amacleod@redhat.com> * cp-ubsan.c: Don't include alloc-pool.h or lto-streamer.h. lto 2015-07-09 Andrew MacLeod <amacleod@redhat.com> * lto-lang.c: Adjust includes of target.h, alloc-pool.h and lto-streamer.h. * lto-object.c: Likewise. * lto-partition.c: Likewise. * lto-symtab.c: Likewise. From-SVN: r225612
2015-07-09genmatch.c (struct expr): Add force_single_use flag.Richard Biener3-72/+131
2015-07-09 Richard Biener <rguenther@suse.de> * genmatch.c (struct expr): Add force_single_use flag. (expr::expr): Add copy constructor. (capture_info::walk_match): Gather force_single_use captures. (expr::gen_transform): Use possibly NULLified sequence. (dt_simplify::gen): Apply single-use restrictions by NULLifying seq if any constrained expr is not single-use. (parser::parse_expr): Refactor to allow multiple flags. Handle 's' flag to force an expression have a single-use if the pattern simplifies to more than one statement. * match.pd: Convert most single_use conditionals to :s flags. From-SVN: r225610
2015-07-09Update config/i386/iamcu.hH.J. Lu2-0/+49
Copy ASM_OUTPUT_ALIGNED_BSS, ASM_OUTPUT_MAX_SKIP_ALIGN and ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX from config/i386/gnu-user.h. * config/i386/iamcu.h (ASM_OUTPUT_ALIGNED_BSS): New. (ASM_OUTPUT_MAX_SKIP_ALIGN): Likewise. (ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX): Likewise. From-SVN: r225609
2015-07-09flags.h: Don't include flag-types.h or options.h.Andrew MacLeod37-30/+68
2015-07-09 Andrew MacLeod <amacleod@redhat.com> * flags.h: Don't include flag-types.h or options.h. * opts-common.c: Adjust includes. * opts-global.c: Likewise. * common/config/epiphany/epiphany-common.c: Likewise. c * c-array-notation.c: Adjust includes for flags.h changes. * c-objc-common.c: Likewise. c-family * c-common.h: Adjust includes for flags.h changes. * stub-objc.c: Likewise. fortran * arith.c: Adjust includes for flags.h changes. * array.c: Likewise. * check.c: Likewise. * decl.c: Likewise. * error.c: Likewise. * expr.c: Likewise. * frontend-passes.c: Likewise. * interface.c: Likewise. * intrinsic.c: Likewise. * io.c: Likewise. * match.c: Likewise. * openmp.c: Likewise. * parse.c: Likewise. * primary.c: Likewise. * resolve.c: Likewise. * scanner.c: Likewise. * simplify.c: Likewise. * symbol.c: Likewise. * target-memory.c: Likewise. jit * dummy-frontend.c: Adjust includes for flags.h changes. * jit-common.h: Likewise. * jit-playback.c: Likewise. lto * lto-lang.c: Adjust includes for flags.h changes. From-SVN: r225608
2015-07-09re PR c++/65790 (compilation error : receive std::index_sequence)Paolo Carlini2-0/+40
2015-07-09 Paolo Carlini <paolo.carlini@oracle.com> PR c++/65790 * g++.dg/cpp0x/vt-65790.C: New. From-SVN: r225607
2015-07-09Define ATTRIBUTE_ALIGNED_VALUE to 32 for IA MCUH.J. Lu4-1/+17
attribute ((aligned)) should align to the minimum of BIGGEST_ALIGNMENT, which is 4 bytes for -miamcu. gcc/ PR target/66818 * config/i386/i386.h (ATTRIBUTE_ALIGNED_VALUE): Defined to 32 for IA MCU. gcc/testsuite/ PR target/66818 * gcc.target/i386/pr66818.c: New test. From-SVN: r225606
2015-07-09Check int_size_in_bytes in ix86_return_in_memoryH.J. Lu4-1/+39
ix86_return_in_memory should check negative return from int_size_in_bytes, similar to other ports. gcc/ PR target/66817 * config/i386/i386.c (ix86_return_in_memory): Return true if int_size_in_bytes returns negative for IA MCU. gcc/testsuite/ PR target/66817 * gcc.target/i386/pr66817.c: New test. From-SVN: r225605
2015-07-09re PR tree-optimization/66718 (Non-invariant ADDR_EXPR not vectorized)Marek Polacek8-0/+218
PR tree-optimization/66718 * Makefile.in (OBJS): Add gimple-laddress.o. * passes.def: Schedule pass_laddress. * timevar.def (DEFTIMEVAR): Add TV_GIMPLE_LADDRESS. * tree-pass.h (make_pass_laddress): Declare. * gimple-laddress.c: New file. * gcc.dg/vect/vect-126.c: New test. From-SVN: r225604
2015-07-09toplev.c (compile_file): Reset maximum_field_alignment after parsing.Richard Biener2-0/+9
2015-07-08 Richard Biener <rguenther@suse.de> * toplev.c (compile_file): Reset maximum_field_alignment after parsing. From-SVN: r225603
2015-07-09re PR middle-end/66807 (--enable-libmpx failed)Richard Biener2-0/+7
2015-07-09 Richard Biener <rguenther@suse.de> PR tree-optimization/66807 * tree-chkp-opt.c (chkp_opt_fini): Free post dominator info. From-SVN: r225600
2015-07-08function.c (stack_protect_epilogue): Use if rather than switch for check ↵Kito Cheng2-14/+11
targetm.have_stack_protect_test. 2015-07-08 Kito Cheng <kito.cheng@gmail.com> * function.c (stack_protect_epilogue): Use if rather than switch for check targetm.have_stack_protect_test. From-SVN: r225599
2015-07-08*.C: generate dwarf-2 debug information even when dwarf-2 is not the default.Carlos Sánchez de La Lama56-55/+60
* g++.dg/debug/dwarf2/*.C: generate dwarf-2 debug information even when dwarf-2 is not the default. From-SVN: r225598
2015-07-09always define WORD_REGISTER_OPERATIONSTrevor Saunders38-77/+113
gcc/ChangeLog: 2015-07-08 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * defaults.h: Provide default for WORD_REGISTER_OPERATIONS. * config/alpha/alpha.h: Define WORD_REGISTER_OPERATIONS to 1. * config/arc/arc.h: Likewise. * config/arm/arm.h: Likewise. * config/bfin/bfin.h: Likewise. * config/epiphany/epiphany.h: Likewise. * config/frv/frv.h: Likewise. * config/ia64/ia64.h: Likewise. * config/iq2000/iq2000.h: Likewise. * config/lm32/lm32.h: Likewise. * config/m32r/m32r.h: Likewise. * config/mcore/mcore.h: Likewise. * config/mep/mep.h: Likewise. * config/microblaze/microblaze.h: Likewise. * config/mips/mips.h: Likewise. * config/mmix/mmix.h: Likewise. * config/mn10300/mn10300.h: Likewise. * config/nds32/nds32.h: Likewise. * config/nios2/nios2.h: Likewise. * config/pa/pa.h: Likewise. * config/rl78/rl78.h: Likewise. * config/sh/sh.h: Likewise. * config/sparc/sparc.h: Likewise. * config/stormy16/stormy16.h: Likewise. * config/tilegx/tilegx.h: Likewise. * config/tilepro/tilepro.h: Likewise. * config/v850/v850.h: Likewise. * config/xtensa/xtensa.h: Likewise. * doc/tm.texi: Regenerate. * doc/tm.texi.in: Adjust. * combine.c (simplify_set): Likewise. (simplify_comparison): Likewise. * expr.c (store_constructor): Likewise. * internal-fn.c (expand_arith_overflow): Likewise. * reload.c (push_reload): Likewise. (find_reloads): Likewise. (find_reloads_subreg_address): Likewise. * reload1.c (eliminate_regs_1): Likewise. * rtlanal.c (nonzero_bits1): Likewise. (num_sign_bit_copies1): Likewise. * simplify-rtx.c (simplify_truncation): Likewise. From-SVN: r225597
2015-07-09reduce conditional compilation based on AUTO_INC_DECTrevor Saunders13-125/+111
gcc/ChangeLog: 2015-07-08 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * auto-inc-dec.c (pass_inc_dec::execute): Don't check the value of AUTO_INC_DEC with the preprocessor. * combine.c (combine_instructions): Likewise. (can_combine_p): Likewise. (try_combine): Likewise. * emit-rtl.c (try_split): Likewise. * loop-invariant.c (calculate_loop_reg_pressure): Likewise. * lower-subreg.c (resolve_simple_move): Likewise. * lra.c (update_inc_notes): Likewise. * recog.c (asm_operand_ok): Likewise. (constrain_operands): Likewise. * regrename.c (scan_rtx_address): Likewise. * reload.c (update_auto_inc_notes): Likewise. (reg_inc_found_and_valid_p): Likewise. * reload1.c (reload): Likewise. (emit_input_reload_insns): Likewise. (delete_output_reload): Likewise. * sched-deps.c (init_insn_reg_pressure_info): Likewise. * valtrack.c (cleanup_auto_inc_dec): Likewise. From-SVN: r225596
2015-07-09always define AUTO_INC_DECTrevor Saunders14-36/+62
gcc/ChangeLog: 2015-07-08 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * rtl.h: Always define AUTO_INC_DEC. * auto-inc-dec.c (pass_inc_dec::execute): Adjust. * combine.c (combine_instructions): Likewise. (can_combine_p): Likewise. (try_combine): Likewise. * emit-rtl.c (try_split): Likewise. * loop-invariant.c (calculate_loop_reg_pressure): Likewise. * lower-subreg.c (resolve_simple_move): Likewise. * lra.c (update_inc_notes): Likewise. * recog.c (asm_operand_ok): Likewise. (constrain_operands): Likewise. * regrename.c (scan_rtx_address): Likewise. * reload.c (update_auto_inc_notes): Likewise. (find_equiv_reg): Likewise. * reload1.c (reload): Likewise. (reload_as_needed): Likewise. (choose_reload_regs): Likewise. (emit_input_reload_insns): Likewise. (delete_output_reload): Likewise. * sched-deps.c (init_insn_reg_pressure_info): Likewise. * valtrack.c (cleanup_auto_inc_dec): Likewise. From-SVN: r225595
2015-07-09use #if for HARD_FRAME_POINTER_IS_FRAME_POINTER lessTrevor Saunders5-23/+26
gcc/ChangeLog: 2015-07-08 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * combine.c (can_combine_def_p): Don't check the value of HARD_FRAME_POINTER_IS_FRAME_POINTER with the preprocessor. (combinable_i3pat): Likewise. (mark_used_regs_combine): Likewise. * regrename.c (rename_chains): Likewise. * reload.c (find_reloads_address): Likewise. * sel-sched.c (mark_unavailable_hard_regs): Likewise. From-SVN: r225594
2015-07-09always define SHORT_IMMEDIATES_SIGN_EXTENDTrevor Saunders15-25/+46
gcc/ChangeLog: 2015-07-08 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * combine.c (update_rsp_from_reg_equal): Don't check if SHORT_IMMEDIATES_SIGN_EXTEND is defined. (reg_nonzero_bits_for_combine): Likewise. * config/alpha/alpha.h: Define SHORT_IMMEDIATES_SIGN_EXTEND to 1. * config/frv/frv.h: Likewise. * config/lm32/lm32.h: Likewise. * config/mep/mep.h: Likewise. * config/mips/mips.h: Likewise. * config/rs6000/rs6000.h: Likewise. * config/sh/sh.h: Likewise. * config/tilegx/tilegx.h (enum reg_class): Likewise. * config/tilepro/tilepro.h: Likewise. * defaults.h: Add default for SHORT_IMMEDIATES_SIGN_EXTEND. * doc/tm.texi: Regenerate. * doc/tm.texi.in: Adjust. * rtlanal.c (nonzero_bits1): Likewise. From-SVN: r225593
2015-07-09remove #if for HAVE_cc0 in combine.cTrevor Saunders2-35/+36
gcc/ChangeLog: 2015-07-08 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * combine.c (do_SUBST_MODE): Don't check the value of HAVE_cc0 with the preprocessor. (combine_instructions): Likewise. (try_combine): Likewise. (subst): Likewise. (distribute_notes): Likewise. From-SVN: r225592
2015-07-09reduce conditional compilation for LOAD_EXTEND_OPTrevor Saunders5-24/+29
Provide a default in files where that is possible, so that everything else there can be unconditionally compiled. However rtlanal.c and reload.c do tricky things that break providing a global default, so we can't do that yet. gcc/ChangeLog: 2015-07-08 Trevor Saunders <tbsaunde+gcc@tbsaunde.org> * combine.c (try_combine): Don't check if LOAD_EXTEND_OP is defined. (simplify_set): Likewise. * cse.c (cse_insn): Likewise. * fold-const.c (fold_single_bit_test): Likewise. (fold_unary_loc): Likewise. * postreload.c (reload_cse_simplify_set): Likewise. (reload_cse_simplify_operands): Likewise. From-SVN: r225591
2015-07-09Daily bump.GCC Administrator1-1/+1
From-SVN: r225590
2015-07-08re PR testsuite/66796 (FAIL: gcc.target/hppa/shadd-1.c scan-assembler-times ↵Jeff Law2-1/+7
sh.add 1) PR testsuite/66796 * gcc.target/hppa/shadd-1.c: Avoid the read-modify-write so as to have a single memory reference. From-SVN: r225586
2015-07-08c-ada-spec.h (cpp_operation): Add IS_CONSTEXPR.Eric Botcazou7-0/+41
c-family/ * c-ada-spec.h (cpp_operation): Add IS_CONSTEXPR. * c-ada-spec.c (print_ada_declaration): Skip constexpr constructors. cp/ * decl2.c (cpp_check): Deal with IS_CONSTEXPR. From-SVN: r225585
2015-07-08c-omp.c (c_omp_declare_simd_clauses_to_numbers): If all clauses are to be ↵Jakub Jelinek9-4/+84
removed, return NULL rather than original clauses list. * c-omp.c (c_omp_declare_simd_clauses_to_numbers): If all clauses are to be removed, return NULL rather than original clauses list. * decl.c (grokfndecl): Handle flag_openmp_simd like flag_openmp. * pt.c (apply_late_template_attributes): Likewise. * g++.dg/vect/vect.exp: Run also simd* tests. * gcc.dg/vect/tree-vect.h (abort, exit): For C++ use extern "C". (check_vect): Fix up get_cpuid call for C++. * g++.dg/vect/simd-clone-1.cc: New test. From-SVN: r225583
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