| Age | Commit message (Collapse) | Author | Files | Lines |
|---|
|
Under -O0, with the "newly" introduced intrins, the variable will be
transformed as mem instead of the origin symbol_ref. The compiler will
then treat the operand as invalid and turn the operation into nop, which
is not expected. Use macro for non-optimize to keep the variable as
symbol_ref just as how prefetch intrin does.
gcc/ChangeLog:
* config/i386/prfchiintrin.h
(_m_prefetchit0): Add macro for non-optimized option.
(_m_prefetchit1): Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/i386/prefetchi-1b.c: New test.
|
|
|
|
[U]FLOAT.S machine instruction in Xtensa ISA, which converts an integer to
a hardware single-precision FP register, has the ability to divide the
result by power of two (0 to 15th).
Similarly, [U]TRUNC.S instruction, which truncates single-precision FP to
integer, can multiply the source value by power of two in advance, but
neither of these currently uses this function (always specified with 0th
power of two, i.e. a scaling factor of 1).
This patch unleashes the scaling ability of the above instructions.
/* example */
float test0(int a) {
return a / 2.f;
}
float test1(unsigned int a) {
return a / 32768.f;
}
int test2(float a) {
return a * 2;
}
unsigned int test3(float a) {
return a * 32768;
}
;; before
test0:
movi.n a9, 0x3f
float.s f0, a2, 0
slli a9, a9, 24
wfr f1, a9
mul.s f0, f0, f1
rfr a2, f0
ret.n
test1:
movi.n a9, 7
ufloat.s f0, a2, 0
slli a9, a9, 27
wfr f1, a9
mul.s f0, f0, f1
rfr a2, f0
ret.n
test2:
wfr f1, a2
add.s f0, f1, f1
trunc.s a2, f0, 0
ret.n
test3:
movi.n a9, 0x47
slli a9, a9, 24
wfr f1, a2
wfr f2, a9
mul.s f0, f1, f2
utrunc.s a2, f0, 0
ret.n
;; after
test0:
float.s f0, a2, 1
rfr a2, f0
ret.n
test1:
ufloat.s f0, a2, 15
rfr a2, f0
ret.n
test2:
wfr f0, a2
trunc.s a2, f0, 1
ret.n
test3:
wfr f0, a2
utrunc.s a2, f0, 15
ret.n
gcc/ChangeLog:
* config/xtensa/predicates.md
(fix_scaling_operand, float_scaling_operand): New predicates.
* config/xtensa/xtensa.md
(any_fix/m_fix/s_fix, any_float/m_float/s_float):
New code iterators and their attributes.
(fix<s_fix>_truncsfsi2): Change from "fix_truncsfsi2".
(*fix<s_fix>_truncsfsi2_2x, *fix<s_fix>_truncsfsi2_scaled):
New insn definitions.
(float<s_float>sisf2): Change from "floatsisf2".
(*float<s_float>sisf2_scaled): New insn definition.
|
|
No functional changes.
gcc/ChangeLog:
* config/xtensa/xtensa.cc
(gen_int_relational, gen_float_relational): Replace tempvar-based
value-swapping codes with std::swap.
* config/xtensa/xtensa.md (movdi_internal, movdf_internal):
Ditto.
|
|
Minor oversight in the ext-dce bits. If the shift count is a constant vector,
then we shouldn't be extracting values with [U]INTVAL. We guarded that test
with CONSTANT_P, when it should have been CONSTANT_INT_P.
Shows up on gcn, but I wouldn't be terribly surprised if it could be triggered
elsewhere.
Verified the testcase compiles on gcn. Haven't done a libgcc build for gcn
though. Also verified x86 bootstraps and regression tests cleanly.
Pushing to the trunk.
PR target/116104
gcc/
* ext-dce.cc (carry_backpropagate): Fix test guarding UINTVAL
extraction of shift count.
|
|
PR ipa/111613
* gcc.c-torture/pr111613.c: Rename to..
* gcc.c-torture/execute/pr111613.c: ...this.
|
|
Here we're rejecting the generic lambda inside the default template
argument ultimately because auto_is_implicit_function_template_parm_p
doesn't get set during parsing of the lambda's parameter list, due
to the !processing_template_parmlist restriction. But when parsing a
lambda parameter list we should always set that flag regardless of where
the lambda appears. This patch makes sure of this via a local lambda_p
flag.
PR c++/88313
gcc/cp/ChangeLog:
* parser.cc (cp_parser_lambda_declarator_opt): Pass
lambda_p=true to cp_parser_parameter_declaration_clause.
(cp_parser_direct_declarator): Pass lambda_p=false to
to cp_parser_parameter_declaration_clause.
(cp_parser_parameter_declaration_clause): Add bool lambda_p
parameter. Consider lambda_p instead of current_class_type
when setting parser->auto_is_implicit_function_template_parm_p.
Don't consider processing_template_parmlist.
(cp_parser_requirement_parameter_list): Pass lambda_p=false
to cp_parser_parameter_declaration_clause.
gcc/testsuite/ChangeLog:
* g++.dg/cpp2a/lambda-targ6.C: New test.
Reviewed-by: Jason Merrill <jason@redhat.com>
|
|
The hyphen can be misunderstood to mean "emitted to -" i.e. stdout.
Refer to both forms by name, rather than using "the former" for one and
referring to the other by name.
gcc/ChangeLog:
* doc/invoke.texi (Diagnostic Message Formatting Options):
Replace hyphen with a new sentence. Replace "the former" with
the actual value.
|
|
gcc/
* config/xtensa/xtensa.cc (xtensa_option_override_after_change):
New function.
(TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE): Define as
xtensa_option_override_after_change.
(xtensa_option_override): Call
xtensa_option_override_after_change.
|
|
This reverts commit ee41cd863b7c38ee3bc415ea7154954aa6facca3.
|
|
PR middle-end/115277
* gcc.c-torture/compile/pr115277.c: Rename to...
* gcc.c-torture/execute/pr115277.c: ...this.
|
|
gcc/
* config/avr/avr.cc (avr_set_current_function): Fix typo in
error message.
|
|
This patch adds a comment to the VEC_IC definition to clarify
the V1TI "TARGET_POWER10" mode that was added.
gcc/ChangeLog:
* config/rs6000/vector.md: Add comment for the VEC_IC
define_mode_iterator.
|
|
After add the matching for .SAT_SUB when one op is IMM, there
will be a new root PLUS_EXPR for the .SAT_SUB pattern. For example,
Form 3:
#define DEF_SAT_U_SUB_IMM_FMT_3(T, IMM) \
T __attribute__((noinline)) \
sat_u_sub_imm##IMM##_##T##_fmt_3 (T x) \
{ \
return x >= IMM ? x - IMM : 0; \
}
DEF_SAT_U_SUB_IMM_FMT_3(uint64_t, 11)
And then we will have gimple before widening-mul as below. Thus, try
the .SAT_SUB for the PLUS_EXPR.
4 │ __attribute__((noinline))
5 │ uint64_t sat_u_sub_imm11_uint64_t_fmt_3 (uint64_t x)
6 │ {
7 │ long unsigned int _1;
8 │ uint64_t _3;
9 │
10 │ <bb 2> [local count: 1073741824]:
11 │ _1 = MAX_EXPR <x_2(D), 11>;
12 │ _3 = _1 + 18446744073709551605;
13 │ return _3;
14 │
15 │ }
The below test suites are passed for this patch.
1. The rv64gcv fully regression tests.
2. The x86 bootstrap tests.
3. The x86 fully regression tests.
gcc/ChangeLog:
* tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children):
Try .SAT_SUB for PLUS_EXPR case.
Signed-off-by: Pan Li <pan2.li@intel.com>
|
|
Contrary to a normal 'declare target', the 'declare target link' attribute
also needs to set node->offloadable and push the offload_vars in the front end.
Linked variables require that the data is mapped. For module variables, this
can happen anywhere. For variables in an external subprograms or the main
programm, this can only happen in the either that program itself or in an
internal subprogram. - Whether a variable is just normally mapped or linked then
becomes relevant if a device routine exists that can access that variable,
i.e. an internal procedure has then to be marked as declare target.
PR fortran/115559
gcc/fortran/ChangeLog:
* trans-common.cc (build_common_decl): Add 'omp declare target' and
'omp declare target link' variables to offload_vars.
* trans-decl.cc (add_attributes_to_decl): Likewise; update args and
call decl_attributes.
(get_proc_pointer_decl, gfc_get_extern_function_decl,
build_function_decl): Update calls.
(gfc_get_symbol_decl): Likewise; move after 'DECL_STATIC (t)=1'
to avoid errors with symtab_node::get_create.
libgomp/ChangeLog:
* testsuite/libgomp.fortran/declare-target-link.f90: New test.
|
|
gcc/ChangeLog:
PR ipa/116055
* ipa-modref.cc (analyze_function): Do not ICE when flags regress.
|
|
The test fails on 32-bit targets (which don't support __int128 type).
Using unsigned long long instead still ICEs before the fix and passes
after it on those targets.
2024-07-29 Jakub Jelinek <jakub@redhat.com>
PR c++/115986
* g++.dg/cpp2a/consteval-prop21.C (operator "" _c): Use
unsigned long long rather than __uint128_t for return type if int128
is unsupported.
|
|
Since pattern statement coexists with normal statements in a way that it is
not linked into function body, we should not invoke utility procedures that
depends on def/use graph on pattern statement, such as counting uses of a
pseudo value defined by a pattern statement. This patch is to fix a bug of
this type in vect pattern formation.
2024-06-14 Feng Xue <fxue@os.amperecomputing.com>
gcc/
* tree-vect-patterns.cc (vect_recog_bitfield_ref_pattern): Only call
single_imm_use if statement is not generated from pattern recognition.
|
|
There are several typo in AVX512 intrins macro define. Correct them to solve
errors when compiled with -O0.
gcc/ChangeLog:
* config/i386/avx512dqintrin.h
(_mm_mask_fpclass_ss_mask): Correct operand order.
(_mm_mask_fpclass_sd_mask): Ditto.
(_mm256_maskz_reduce_round_ss): Use __builtin_ia32_reducess_mask_round
instead of __builtin_ia32_reducesd_mask_round.
(_mm_reduce_round_sd): Use -1 as mask since it is non-mask.
(_mm_reduce_round_ss): Ditto.
* config/i386/avx512vlbwintrin.h
(_mm256_mask_alignr_epi8): Correct operand usage.
(_mm_mask_alignr_epi8): Ditto.
* config/i386/avx512vlintrin.h (_mm_mask_alignr_epi64): Ditto.
gcc/testsuite/ChangeLog:
* gcc.target/i386/avx512bw-vpalignr-1b.c: New test.
* gcc.target/i386/avx512dq-vfpclasssd-1b.c: Ditto.
* gcc.target/i386/avx512dq-vfpclassss-1b.c: Ditto.
* gcc.target/i386/avx512dq-vreducesd-1b.c: Ditto.
* gcc.target/i386/avx512dq-vreducess-1b.c: Ditto.
* gcc.target/i386/avx512vl-valignq-1b.c: Ditto.
|
|
|
|
Per gccint, dg-add-options must be placed after all dg-options directives.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/cmpmem-2.c: Fix dg-add-options order.
|
|
Per gccint, dg-do must precede dg-require-effective-target or
dg-require-support. Fix a handful of deviant cases.
gcc/testsuite/ChangeLog:
PR middle-end/25521
PR debug/93122
* gcc.dg/pr25521.c: Fix dg-do directive order.
* gcc.dg/vect/vect-simd-clone-19.c: Likewise.
* gcc.target/arm/stack-protector-7.c: Likewise.
* gcc.target/arm/stack-protector-8.c: Likewise.
* gcc.target/powerpc/pr93122.c: Likewise.
libstdc++-v3/ChangeLog:
PR libstdc++/110572
* testsuite/18_support/type_info/110572.cc: Fix dg-do directive order.
|
|
During speculative constant folding of an if consteval, we take the false
branch, but the true branch is an immediate function context, so we don't
want to to cp_fold_immediate it. So we could check IF_STMT_CONSTEVAL_P
here. But beyond that, we don't want to do this inside a call, only when
first parsing a function.
PR c++/115583
gcc/cp/ChangeLog:
* constexpr.cc (cxx_eval_conditional_expression): Don't
cp_fold_immediate for if consteval.
gcc/testsuite/ChangeLog:
* g++.dg/cpp23/consteval-if13.C: New test.
|
|
When users try to build a cross-compiler without first installing
binutils they get confusing errors like:
/tmp/gcc-obj/./gcc/as: line 114: exec: -m: invalid option
This is an incredibly common source of questions on gcc-help and IRC,
and bogus bug reports e.g. see PR 116119 for the latest example.
This change adds an explicit check for an empty $original variable and
exits with a user-friendly error.
gcc/ChangeLog:
* exec-tool.in: Exit with an error if $original is empty.
|
|
This patch adds support for arguments to the signal and interrupt
function attributes. It allows to specify the ISR by means of the
associated IRQ number, in extension to the current attributes that
require to specify the ISR name like "__vector_1" as (assembly) name
for the function. The new feature is more convenient, e.g. when the
ISR is implemented by a class method or in a namespace. There is no
requirement that the ISR is externally visible. The syntax is like:
__attribute__((signal(1, 2, ...), signal(3, 4, ...)))
[static] void isr_function (void)
{
// Code
}
Moreover, this patch adds support for the "noblock" function attribute
to let an ISR start with a SEI instruction. Attribute "signal" together
with "noblock" behaves like "interrupt" but without imposing a specific
function name or visibility like "interrupt" does.
PR target/116056
gcc/
* config/avr/avr.h (machine_function) <is_noblock>: New field.
* config/avr/avr-c.cc (avr_cpu_cpp_builtins) <__HAVE_SIGNAL_N__>: New
built-in macro.
* config/avr/avr.cc (avr_declare_function_name): New function.
(avr_attribute_table) <noblock>: New function attribute>.
<signal, interrupt>: Allow any number of args.
(avr_insert_attributes): Check validity of "signal" and "interrupt"
arguments.
(avr_foreach_function_attribute, avr_interrupt_signal_function)
(avr_isr_number, avr_asm_isr_alias, avr_handle_isr_attribute)
(avr_noblock_function_p): New static functions.
(avr_interrupt_function): New from avr_interrupt_function_p.
Adjust callers.
(avr_signal_function): New from avr_signal_function_p.
Adjust callers.
(avr_set_current_function): Only diagnose non-__vector ISR names
when "signal" or "interrupt" attribute has no args. Set
cfun->machine->is_noblock. Warn about "noblock" in non-ISR functions.
(struct avr_fun_cookie): New.
(avr_expand_prologue, avr_asm_function_end_prologue): Handle "noblock".
* config/avr/elf.h (ASM_DECLARE_FUNCTION_NAME): New define.
* config/avr/avr-protos.h (avr_declare_function_name): New proto.
* doc/extend.texi (AVR Function Attributes): Document
signal(num) and interrupt(num).
* doc/invoke.texi (AVR Built-in Macros) <__HAVE_SIGNAL_N__>: Document.
gcc/testsuite/
* gcc.target/avr/torture/signal_n-1.c: New test.
* gcc.target/avr/torture/signal_n-2.c: New test.
* gcc.target/avr/torture/signal_n-3.c: New test.
* gcc.target/avr/torture/signal_n-4.cpp: New test.
|
|
This patch corrects the function declaration of a builtin
(using the libname rather than the source name).
gcc/m2/ChangeLog:
PR modula2/115823
* gm2-gcc/m2builtins.cc (define_builtin): Build
the function decl using the libname.
gcc/testsuite/ChangeLog:
PR modula2/115823
* gm2/builtins/run/pass/testisnormal.mod: Change to an
implementation module.
* gm2/builtins/run/pass/testisnormal.def: New test.
* gm2/builtins/run/pass/testsinl.def: New test.
* gm2/builtins/run/pass/testsinl.mod: New test.
Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
|
|
2024-07-28 John David Anglin <danglin@gcc.gnu.org>
gcc/testsuite/ChangeLog:
PR testsuite/92550
* gcc.dg/ipa/ipa-sra-8.c: Change get_a argument type to SSS.
* gcc.dg/ipa/ipa-sra-9.c: Likewise.
|
|
|
|
Here the call to e() makes us decide to check d() for escalation at EOF, but
while checking it we try to fold_immediate 0_c, and get confused by the
template trees. Let's not mess with escalation for function templates.
PR c++/115986
gcc/cp/ChangeLog:
* cp-gimplify.cc (remember_escalating_expr): Skip function
templates.
gcc/testsuite/ChangeLog:
* g++.dg/cpp2a/consteval-prop21.C: New test.
|
|
Here when we want to synthesize methods for foo()::B maybe_push_to_top_level
calls push_function_context, which sets cfun to a dummy value; later
finish_call_expr tries to set something in
cp_function_chain (i.e. cfun->language), which isn't set. Many places in
the compiler check cfun && cp_function_chain to avoid this problem; here we
also want to check !cp_unevaluated_operand, like set_flags_from_callee does.
PR c++/115561
gcc/cp/ChangeLog:
* semantics.cc (finish_call_expr): Check cp_unevaluated_operand.
gcc/testsuite/ChangeLog:
* g++.dg/cpp2a/concepts-lambda21.C: New test.
|
|
I wanted to add more cases to the setting of std_list in g++-dg.exp, but
didn't want to do a full scan through the file for each case. So this patch
improves that in two ways: first, by extracting all interesting lines on a
single pass; second, by generating the list more flexibly: now we test every
version mentioned explicitly in the testcase, plus a few more if fewer than
three are mentioned.
This also lowers changes from testing four to three versions for most
testcases: the current default and the earliest and latest versions. This
will reduce testing of C++14 and C++20 modes, and increase testing of C++26
mode. C++ front-end developers are encouraged to set the
GXX_TESTSUITE_STDS environment variable to test more modes.
gcc/testsuite/ChangeLog:
* lib/gcc-dg.exp (get_matching_lines): New.
* lib/g++-dg.exp: Improve std_list selection.
|
|
The subject line pretty much says it all; the count-trailing-zeros function
of -X and abs(X) produce the same result as count-trailing-zeros of X.
This transformation eliminates a negation which may potentially overflow
with an equivalent expression that doesn't [much like the analogous
abs(-X) simplification in match.pd].
I'd noticed this -X equivalence, which isn't mentioned in Hacker's Delight,
investigating whether ranger's non_zero_bits can help determine whether
an integer variable may be converted to a floating point type exactly
(without raising FE_INEXACT), but it turns out this observation isn't
novel, as (disappointingly) LLVM already performs this same folding.
2024-07-27 Roger Sayle <roger@nextmovesoftware.com>
Andrew Pinski <quic_apinski@quicinc.com>
gcc/ChangeLog
* match.pd (ctz (-X) => ctz (X)): New simplification.
(ctz (abs (X)) => ctz (X)): Likewise.
gcc/testsuite/ChangeLog
* gcc.dg/fold-ctz-1.c: New test case.
* gcc.dg/fold-ctz-2.c: Likewise.
|
|
This patch would like to support .SAT_SUB when one of the op
is IMM. Aka below 1-4 forms.
Form 1:
#define DEF_SAT_U_SUB_IMM_FMT_1(T, IMM) \
T __attribute__((noinline)) \
sat_u_sub_imm##IMM##_##T##_fmt_1 (T y) \
{ \
return IMM >= y ? IMM - y : 0; \
}
Form 2:
#define DEF_SAT_U_SUB_IMM_FMT_2(T, IMM) \
T __attribute__((noinline)) \
sat_u_sub_imm##IMM##_##T##_fmt_2 (T y) \
{ \
return IMM > y ? IMM - y : 0; \
}
Form 3:
#define DEF_SAT_U_SUB_IMM_FMT_3(T, IMM) \
T __attribute__((noinline)) \
sat_u_sub_imm##IMM##_##T##_fmt_3 (T x) \
{ \
return x >= IMM ? x - IMM : 0; \
}
Form 4:
#define DEF_SAT_U_SUB_IMM_FMT_4(T, IMM) \
T __attribute__((noinline)) \
sat_u_sub_imm##IMM##_##T##_fmt_4 (T x) \
{ \
return x > IMM ? x - IMM : 0; \
}
Take below form 1 as example:
DEF_SAT_U_SUB_OP0_IMM_FMT_1(uint32_t, 11)
Before this patch:
4 │ __attribute__((noinline))
5 │ uint64_t sat_u_sub_imm11_uint64_t_fmt_1 (uint64_t y)
6 │ {
7 │ uint64_t _1;
8 │ uint64_t _3;
9 │
10 │ ;; basic block 2, loop depth 0
11 │ ;; pred: ENTRY
12 │ if (y_2(D) <= 11)
13 │ goto <bb 3>; [50.00%]
14 │ else
15 │ goto <bb 4>; [50.00%]
16 │ ;; succ: 3
17 │ ;; 4
18 │
19 │ ;; basic block 3, loop depth 0
20 │ ;; pred: 2
21 │ _3 = 11 - y_2(D);
22 │ ;; succ: 4
23 │
24 │ ;; basic block 4, loop depth 0
25 │ ;; pred: 2
26 │ ;; 3
27 │ # _1 = PHI <0(2), _3(3)>
28 │ return _1;
29 │ ;; succ: EXIT
30 │
31 │ }
After this patch:
4 │ __attribute__((noinline))
5 │ uint64_t sat_u_sub_imm11_uint64_t_fmt_1 (uint64_t y)
6 │ {
7 │ uint64_t _1;
8 │
9 │ ;; basic block 2, loop depth 0
10 │ ;; pred: ENTRY
11 │ _1 = .SAT_SUB (11, y_2(D)); [tail call]
12 │ return _1;
13 │ ;; succ: EXIT
14 │
15 │ }
The below test suites are passed for this patch:
1. The rv64gcv fully regression tests.
2. The x86 bootstrap tests.
3. The x86 fully regression tests.
gcc/ChangeLog:
* match.pd: Add case 9 and case 10 for .SAT_SUB when one
of the op is IMM.
Signed-off-by: Pan Li <pan2.li@intel.com>
|
|
This patch extends our SARIF output to capture relationships between
locations within a result (§3.34). In particular, this captures
chains of #includes relating to diagnostics and to events within
diagnostic paths.
For example, consider:
include-chain-1.c:
#include "include-chain-1.h"
include-chain-1.h:
/* First set of decls, which will be referenced in notes. */
#include "include-chain-1-1.h"
/* Second set of decls, which will trigger the errors. */
#include "include-chain-1-2.h"
include-chain-1-1.h:
int p;
int q;
include-chain-1-1.h:
char p;
char q;
GCC's textual output emits:
In file included from PATH/include-chain-1.h:5,
from PATH/include-chain-1.c:30:
PATH/include-chain-1-2.h:1:6: error: conflicting types for 'p'; have 'char'
1 | char p;
| ^
In file included from PATH/include-chain-1.h:2:
PATH/include-chain-1-1.h:1:5: note: previous declaration of 'p' with type 'int'
1 | int p;
| ^
PATH/include-chain-1-2.h:2:6: error: conflicting types for 'q'; have 'char'
2 | char q;
| ^
PATH/include-chain-1-1.h:2:5: note: previous declaration of 'q' with type 'int'
2 | int q;
| ^
With this patch, the SARIF output captures the include information for
the two results, so that e.g. result[0]'s location[0] has:
"relationships": [{"target": 0,
"kinds": ["isIncludedBy"]}],
"id": 0
and the "note" in relatedLocations[0] has:
"message": {"text": "previous declaration of 'q' with type 'int'"},
"relationships": [{"target": 2,
"kinds": ["isIncludedBy"]}],
"id": 2},
where these reference new locations within relatedLocations, such as this for
the "#include "include-chain-1-1.h" line in include-chain-1.h:
{"physicalLocation": {"artifactLocation": {"uri": include-chain-1.h",
"uriBaseId": "PWD"},
"region": {"startLine": 5},
"contextRegion": {"startLine": 5,
"snippet": {"text": "#include \"include-chain-1-2.h\"\n"}}},
"id": 1,
"relationships": [{"target": 0,
"kinds": ["includes"]},
{"target": 4,
"kinds": ["isIncludedBy"]}]},
effectively capturing the inclusion digraph in SARIF form:
+-----------------------------------+ +----------------------------------+
|"id": 0 | |"id": 2 |
| error: "conflicting types for 'p';| | note: previous declaration of 'p'|
| have 'char'"| | | with type 'int'") |
| in include-chain-1-2.h | | in include-chain-1-1.h |
+-----------------------------------+ +----------------------------------+
| |
| included-by | included-by
V V
+--------------------------------+ +--------------------------------+
|"id": 1 | |"id": 3 |
| #include "include-chain-1-2.h" | | #include "include-chain-1-1.h" |
| in include-chain-1.h | | in include-chain-1.h |
+--------------------------------+ +--------------------------------+
| |
| included-by | included-by
V V
+------------------------------------+
|"id": 4 |
| The #include "include-chain-1.h" |
| in include-chain-1.c |
+------------------------------------+
Locations only gain "id" fields if they need one, and the precise
numbering of the IDs within a result is an implementation detail (the
order in which references to the locations are made).
To test all this non-trivial JSON from DejaGnu I needed to adapt the
python testing code used by gcov, adding a new run-sarif-pytest based
on run-gcov-pytest.
gcc/ChangeLog:
PR middle-end/107941
* diagnostic-format-sarif.cc: Define INCLUDE_LIST and INCLUDE_MAP.
(enum class location_relationship_kind): New.
(diagnostic_artifact_role::scanned_file): New value.
(class sarif_location_manager): New.
(class sarif_result): Derive from sarif_location_manager rather
than directly from sarif_object.
(sarif_result::add_related_location): Convert to vfunc
implementation.
(sarif_location::m_relationships_map): New field.
(class sarif_location_relationship): New.
(class sarif_ice_notification): Derive from sarif_location_manager
rather than directly from sarif_object.
(sarif_builder::take_current_result): New.
(sarif_builder::m_line_maps): New field.
(sarif_builder::m_cur_group_result): Convert to std::unique_ptr.
(sarif_artifact::add_role): Skip scanned_file.
(get_artifact_role_string): Handle scanned_file.
(sarif_location_manager::add_relationship_to_worklist): New.
(sarif_location_manager::process_worklist): New.
(sarif_location_manager::process_worklist_item): New.
(sarif_result::on_nested_diagnostic): Pass *this to
make_location_object.
(sarif_location::lazily_add_id): New.
(sarif_location::get_id): New.
(get_string_for_location_relationship_kind): New.
(sarif_location::lazily_add_relationship): New.
(sarif_location::lazily_add_relationship_object): New.
(sarif_location::lazily_add_relationships_array): New.
(sarif_ice_notification::sarif_ice_notification): Fix overlong line.
Pass *this to make_locations_arr.
(sarif_ice_notification::add_related_location): New.
(sarif_location_relationship::sarif_location_relationship): New.
(sarif_location_relationship::get_target_id): New.
(sarif_location_relationship::lazily_add_kind): New.
(sarif_builder::sarif_builder): Add "line_maps" param and use it
to initialize m_line_maps.
(sarif_builder::end_diagnostic): Update for m_cur_group_result
becoming a std::unique_ptr. Don't append to m_results_array yet.
(sarif_builder::end_group): Append m_cur_group_result to
m_results_array here, rather than in end_diagnostic.
(sarif_builder::make_result_object): Pass result_obj to
make_locations_arr and to make_code_flow_object.
(sarif_builder::make_locations_arr): Add "loc_mgr" param and pass
it to make_location_object.
(sarif_builder::make_location_object): For two overloads, add
"loc_mgr" param and call add_any_include_chain on the location.
(sarif_builder::add_any_include_chain): New.
(sarif_builder::make_location_object): New overload.
(sarif_builder::make_code_flow_object): Add "result" param and
pass it to make_thread_flow_location_object.
(sarif_builder::make_thread_flow_location_object): Add "result"
param and pass it to make_location_object.
(sarif_builder::get_or_create_artifact): Handle scanned_file.
(sarif_output_format::~sarif_output_format): Assert that there
isn't a pending result.
(sarif_output_format::sarif_output_format): Add "line_maps" param
and pass it to m_builder's ctor.
(sarif_stream_output_format::sarif_stream_output_format): Add
"line_maps" param and pass it to base class ctor.
(sarif_file_output_format::sarif_file_output_format): Likewise.
(diagnostic_output_format_init_sarif_stderr): Pass "line_table"
global to format.
(diagnostic_output_format_init_sarif_file): Likewise.
(diagnostic_output_format_init_sarif_stream): Likewise.
(test_sarif_diagnostic_context::test_sarif_diagnostic_context):
Likewise.
(buffered_output_format::buffered_output_format): Likewise.
(selftest::test_make_location_object): Likewise.
(selftest::test_make_location_object): Create a sarif_result for
use when calling make_location_object.
* diagnostic.cc (diagnostic_context::finish): End any active
diagnostic groups.
(diagnostic_context::report_diagnostic): Assert that we're within
a diagnostic group.
* diagnostic.h (diagnostic_report_diagnostic): Add
begin_group/end_group pair around call to
diagnostic_context::report_diagnostic.
* selftest-diagnostic.cc (test_diagnostic_context::report): Add
begin_group/end_group pair around diagnostic_impl call.
gcc/testsuite/ChangeLog:
PR middle-end/107941
* gcc.dg/sarif-output/include-chain-1-1.h: New test.
* gcc.dg/sarif-output/include-chain-1-2.h: New test.
* gcc.dg/sarif-output/include-chain-1.c: New test.
* gcc.dg/sarif-output/include-chain-1.h: New test.
* gcc.dg/sarif-output/include-chain-2.c: New test.
* gcc.dg/sarif-output/include-chain-2.h: New test.
* gcc.dg/sarif-output/sarif-output.exp: New file.
* gcc.dg/sarif-output/sarif.py: New test, adapted from
g++.dg/gcov/gcov.py.
* gcc.dg/sarif-output/test-include-chain-1.py: New test.
* gcc.dg/sarif-output/test-include-chain-2.py: New test.
* lib/scansarif.exp (sarif-pytest-format-line): New, taken
from lib/gcov.exp.
(run-sarif-pytest): New, adapted from run-gcov-pytest in
lib/gcov.exp.
Signed-off-by: David Malcolm <dmalcolm@redhat.com>
|
|
|
|
A patch introduced a pattern to avoid unnecessary extensions when doing a
min/max operation where one of the values is a 32 bit positive constant.
> (define_insn_and_split "*minmax"
> [(set (match_operand:DI 0 "register_operand" "=r")
> (sign_extend:DI
> (subreg:SI
> (bitmanip_minmax:DI (zero_extend:DI (match_operand:SI 1 "register_operand" "r"))
> (match_operand:DI 2 "immediate_operand" "i"))
> 0)))
> (clobber (match_scratch:DI 3 "=&r"))
> (clobber (match_scratch:DI 4 "=&r"))]
> "TARGET_64BIT && TARGET_ZBB && sext_hwi (INTVAL (operands[2]), 32) >= 0"
> "#"
> "&& reload_completed"
> [(set (match_dup 3) (sign_extend:DI (match_dup 1)))
> (set (match_dup 4) (match_dup 2))
> (set (match_dup 0) (<minmax_optab>:DI (match_dup 3) (match_dup 4)))]
Lots going on in here. The key is the nonconstant value is zero extended from
SI to DI in the original RTL and we know the constant value is unchanged if we
were to sign extend it from 32 to 64 bits.
We change the extension of the nonconstant operand from zero to sign extension.
I'm pretty confident the goal there is take advantage of the fact that SI
values are kept sign extended and will often be optimized away.
The problem occurs when the nonconstant operand has the SI sign bit set. As an
example:
smax (0x8000000, 0x7) resulting in 0x80000000
The split RTL will generate
smax (sign_extend (0x80000000), 0x7))
smax (0xffffffff80000000, 0x7) resulting in 0x7
Opps.
We really needed to change the opcode to umax for this transformation to work.
That's easy enough. But there's further improvements we can make.
First the pattern is a define_and_split with a post-reload split condition. It
would be better implemented as a 4->3 define_split so that the costing model
just works. Second, if operands[1] is a suitably promoted subreg, then we can
elide the sign extension when we generate the split code, so often it'll be a
4->2 split, again with the cost model working with no adjustments needed.
Tested on rv32 and rv64 in my tester. I'll wait for the pre-commit tester to
spin it as well.
PR target/116085
gcc/
* config/riscv/bitmanip.md (minmax extension avoidance splitter):
Rewrite as a simpler define_split. Adjust the opcode appropriately.
Avoid emitting sign extension if it's clearly not needed.
* config/riscv/iterators.md (minmax_optab): Rename to uminmax_optab
and map everything to unsigned variants.
gcc/testsuite/
* gcc.target/riscv/pr116085.c: New test.
|
|
The stdexec library currently wrongly ends up using __decay as the scope of
a typename, which leads to a crash. Let's give an error instead.
PR c++/116052
gcc/cp/ChangeLog:
* mangle.cc (write_prefix): Handle TRAIT_EXPR.
gcc/testsuite/ChangeLog:
* g++.dg/ext/decay1.C: New test.
|
|
On Fri, Jul 26, 2024 at 11:43:13AM -0400, Jason Merrill wrote:
> I'm now seeing a -std=c++26 failure on g++.dg/cpp/ucn-1.C.
I don't remember seeing it when I wrote the patch, but today I see it as
well.
2024-07-26 Jakub Jelinek <jakub@redhat.com>
* g++.dg/cpp/ucn-1.C (main): Expect error on c\u0024c identifier also
for C++26.
|
|
All of these are for wrong-code bugs. Confirmed to be used before but
with no execution.
Tested on x86_64-pc-linux-gnu and checked test logs before/after.
2024-07-26 Sam James <sam@gentoo.org>
PR target/7559
PR c++/9704
PR c++/16115
PR c++/19317
PR rtl-optimization/11536
PR target/20322
PR tree-optimization/31966
PR rtl-optimization/41033
PR tree-optimization/67947
* g++.dg/cpp1z/byte1.C: Add dg-do run directive.
* g++.dg/init/call1.C: Ditto.
* g++.dg/init/copy5.C: Ditto.
* g++.dg/opt/nrv9.C: Ditto.
* gcc.dg/20021006-1.c: Ditto.
* gcc.dg/20030721-1.c: Ditto.
* gcc.dg/20050307-1.c: Ditto.
* gcc.dg/pr41033.c: Ditto.
* gcc.dg/torture/pr67947.c: Ditto.
* gcc.dg/tree-ssa/pr31966.c: Ditto.
* gcc.dg/tree-ssa/tailcall-3.c: Ditto.
* gcc.dg/tree-ssa/vrp74.c: Ditto.
* gcc.target/nvptx/abort.c: Fix whitespace in dg directive.
|
|
The code to scale ranges for wide chars in format_string incorrectly
checks range.likely to scale range.unlikely, which is a copy-paste typo
from the immediate previous condition.
gcc/ChangeLog:
* gimple-ssa-sprintf.cc (format_string): Fix type in range check
for UNLIKELY for wide chars.
Signed-off-by: Siddhesh Poyarekar <siddhesh@gotplt.org>
|
|
Now there is an optab for bic, andn since r15-1890-gf379596e0ba99d.
This moves aarch64_bic for sve over to use it instead.
Note unlike the simd bic patterns, the operands were already
in the order that was expected for the optab so no swapping
was needed.
Built and tested on aarch64-linux-gnu with no regressions.
gcc/ChangeLog:
* config/aarch64/aarch64-sve-builtins-base.cc (svbic_impl::expand): Update
to use andn optab instead of using code_for_aarch64_bic.
* config/aarch64/aarch64-sve.md (@aarch64_bic<mode>): Rename to ...
(andn<mode>3): This.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
|
|
Since r15-1890-gf379596e0ba99d, these are the new optabs.
So let's use these names for them. These will be used to
generate during expand from gimple in the next few patches.
Built and tested for aarch64-linux-gnu with no regressions.
gcc/ChangeLog:
* config/aarch64/aarch64.md (*<NLOGICAL:optab>_one_cmpl<mode>3): Rename to ...
(<NLOGICAL:optab>n<mode>3): This.
(*<NLOGICAL:optab>_one_cmplsidi3_ze): Rename to ...
(*<NLOGICAL:optab>nsidi3_ze): This.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
|
|
This renames the patterns orn<mode>3 to iorn<mode>3 so it
matches the new optab that was added with r15-1890-gf379596e0ba99d.
Likewise for bic<mode>3 to andn<mode>3.
Note the operand 1 and operand 2 are swapped from the original
patterns to match the optab now.
Built and tested for aarch64-linux-gnu with no regression.
gcc/ChangeLog:
* config/aarch64/aarch64-simd.md
(bic<mode>3<vczle><vczbe>): Rename to ...
(andn<mode>3<vczle><vczbe>): This. Also swap operands.
(orn<mode>3<vczle><vczbe>): Rename to ...
(iorn<mode>3<vczle><vczbe>): This. Also swap operands.
(vec_cmp<mode><v_int_equiv>): Update orn call to iorn
and swap the last two arguments.
gcc/testsuite/ChangeLog:
* g++.target/aarch64/vect_cmp-1.C: New test.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
|
|
The problem here is the aarch64 backend enables -mearly-ra at -O2 and above but
it is not marked as an Optimization in the .opt file so enabling it sometimes
reset the target options when going from -O1 to -O2 for the first time.
Build and tested for aarch64-linux-gnu with no regressions.
PR target/116065
gcc/ChangeLog:
* config/aarch64/aarch64.opt (mearly-ra=): Mark as Optimization rather
than Save.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/sve/target_optimization-1.c: New test.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
|
|
While doing cleanups on this code I noticed that we do the duplicate
of comparisons at -O0. For C and C++ code this makes no difference as
the gimplifier never produces COND_EXPR. But it could make a difference
for other front-ends.
Oh and for -fno-tree-ter, duplicating the comparison is just a waste
as it is never used for expand.
I also decided to add a few testcases so this is checked in the future.
Even added one for the duplication itself.
Bootstrapped and tested on x86_64-linux-gnu with no regressions.
PR tree-optimization/116101
gcc/ChangeLog:
* gimple-isel.cc (maybe_duplicate_comparison): Don't
do anything for -O0 or -fno-tree-ter.
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/dup_compare_cond-1.c: New test.
* gcc.dg/tree-ssa/dup_compare_cond-2.c: New test.
* gcc.dg/tree-ssa/dup_compare_cond-3.c: New test.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
|
|
This is a small cleanup of the duplicating comparison code.
There is code generation difference but only for -O0 and -fno-tree-ter
(both of which will be fixed in a later patch).
The difference is instead of skipping the first use if the
comparison uses are only in cond_expr we skip the last use.
Also we go through the uses list in the opposite order now too.
The cleanups are the following:
* Don't call has_single_use as we will do the loop anyways
* Change the order of the checks slightly, it is better
to check for cond_expr earlier
* Use cond_exprs as a stack and pop from it.
Skipping the top if the use is only from cond_expr.
Bootstrapped and tested on x86_64-linux-gnu with no regressions.
gcc/ChangeLog:
* gimple-isel.cc (duplicate_comparison): Rename to ...
(maybe_duplicate_comparison): This. Add check for use here
rather than in its caller.
(pass_gimple_isel::execute): Don't check how many uses the
comparison had and call maybe_duplicate_comparison instead of
duplicate_comparison.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
|
|
This is just a small cleanup to isel and no functional changes just.
The loop inside pass_gimple_isel::execute looked was getting too
deap so let's fix that by moving it to its own function.
Bootstrapped and tested on x86_64-linux-gnu with no regressions.
gcc/ChangeLog:
* gimple-isel.cc (pass_gimple_isel::execute): Factor out
duplicate comparisons out to ...
(duplicate_comparison): New function.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
|
|
The "tail call must be the same type" message is common on some
targets with C++, or without optimization. It is generated
when gcc believes there is an access of the return value
after the call. However usually it does not actually corespond
to a type mismatch, but can be caused for other reasons.
Make it slightly more vague to be less misleading.
gcc/ChangeLog:
PR c++/116019
* tree-tailcall.cc (find_tail_calls): Change tail call
error message.
|
|
- Run the target_effective tail_call checks without optimization to
match the actual test cases.
- Add an extra check for external tail calls to handle targets like
powerpc that cannot tail call between different object files.
This one will also cover templates.
gcc/testsuite/ChangeLog:
PR testsuite/116080
* g++.dg/musttail10.C: Use external tail call target check.
* g++.dg/musttail6.C: Dito.
* lib/target-supports.exp: Add external_tail_call. Disable
optimization for tail call checks.
|
|
An unquoted apostrophe slipped through when testing the recent
V/M extension patch. This, again, re-words the message to
"Currently the 'V' implementation requires the 'M' extension".
Going to commit as obvious after testing.
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_override_options_internal):
Reword error string without apostrophe.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/pr116036.c: Adjust expected error
string.
|
