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(function_instance::get_function_instance_by_decl): Avoid infinite
recursion by using DECL_FROM_INLINE.
From-SVN: r266942
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From-SVN: r266939
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2018-12-09 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/88205
* io.c (gfc_match_open): Move NEWUNIT checks to after STATUS checks.
2018-12-09 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/88205
* gfortran.dg/pr88205.f90: New unit.
From-SVN: r266936
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The tests in gdc.test/compilable/ddoc*.d don't require the module to be
compiled all the way down to object code. Instead, only compile the
test sources with -fdoc, and scan the generated html content.
gcc/testsuite/ChangeLog:
PR d/88039
* gdc.test/gdc-test.exp (gdc-convert-args): Handle -D.
(dmd2dg): Check generated html in ddoc tests.
(gdc-do-test): Set dg-do-what-default to compile for ddoc tests.
From-SVN: r266933
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* config.gcc (hppa*-*-linux*): Add pa/t-pa to tmake_file. Define
d_target_objs.
* config/pa/pa-protos.h (pa_d_target_versions): New prototype.
* config/pa/pa.h (TARGET_D_CPU_VERSIONS): Define.
* config/pa/pa-d.c: New file.
* config/pa/t-pa: New file.
From-SVN: r266931
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2018-12-09 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/88206
* match.c (gfc_match_type_spec): REAL can be an intrinsic function.
2018-12-09 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/88206
* gfortran.dg/pr88206.f90: New test.
From-SVN: r266930
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2018-12-09 Fritz Reese <fritzoreese@gmail.com>
PR fortran/88228
* resolve.c (resolve_operator): Do not call resolve_function.
Break like other cases.
2018-12-09 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/88228
* gfortran.dg/pr88228.f90: New test.
From-SVN: r266926
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Backports VRP fixes from the D front-end implementation to the C++ port,
and fixes errors reported by ubsan build where the conversion from D
didn't include adjusting integer suffixes from 'UL' to 'ULL'.
Fixes https://gcc.gnu.org/PR88366
Reviewed-on: https://github.com/dlang/dmd/pull/9046
From-SVN: r266925
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gcc/fortran/
* trans-openmp.c (gfc_trans_oacc_combined_directive): Set the
location of combined acc loops.
gcc/testsuite/
* gfortran.dg/goacc/combined-directives-3.f90: New file.
Reviewed-by: Thomas Schwinge <thomas@codesourcery.com>
From-SVN: r266924
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The C++ FE doesn't set the expr_location of the split acc loop in combined acc
parallel/kernels loop directives. This only happens for with combined
directives, otherwise cp_parser_omp_construct would be responsible for setting
the location. After fixing this bug, I was able to resolve a couple of long
standing diagnostics discrepancies between the C/C++ FEs in the test suite.
gcc/cp/
* parser.c (cp_parser_oacc_kernels_parallel): Adjust EXPR_LOCATION
on the combined acc loop.
gcc/testsuite/
* c-c++-common/goacc/combined-directives-3.c: New test.
* c-c++-common/goacc/loop-2-kernels.c (void K): Adjust test.
* c-c++-common/goacc/loop-2-parallel.c (void P): Adjust test.
* c-c++-common/goacc/loop-3.c (void p2): Adjust test.
Reviewed-by: Thomas Schwinge <thomas@codesourcery.com>
From-SVN: r266923
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Don't duplicate in the Fortran front end what's generically being checked in
the middle end.
gcc/fortran/
* openmp.c (resolve_oacc_loop_blocks): Remove checking of OpenACC
loop clauses.
gcc/testsuite/
* gfortran.dg/goacc/loop-2-kernels.f95: Update.
* gfortran.dg/goacc/loop-2-parallel.f95: Likewise.
* gfortran.dg/goacc/nested-parallelism.f90: Likewise.
From-SVN: r266922
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gcc/testsuite/
* gfortran.dg/goacc/loop-2.f95: Split into...
* gfortran.dg/goacc/loop-2-kernels-nested.f95: ... this new
file...
* gfortran.dg/goacc/loop-2-kernels-tile.f95: ..., and this new
file...
* gfortran.dg/goacc/loop-2-kernels.f95: ..., and this new file...
* gfortran.dg/goacc/loop-2-parallel-3.f95: ..., and this new
file...
* gfortran.dg/goacc/loop-2-parallel-nested.f95: ..., and this new
file...
* gfortran.dg/goacc/loop-2-parallel-tile.f95: ..., and this new
file...
* gfortran.dg/goacc/loop-2-parallel.f95: ..., and this new file.
From-SVN: r266921
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The Fortran front end declares that the OpenACC "Clause SEQ conflicts with
INDEPENDENT". While that combination doesn't make too much sense indeed, it's
still valid; these are orthogonal concepts.
gcc/fortran/
PR fortran/88420
* openmp.c (resolve_oacc_loop_blocks): Remove "Clause SEQ
conflicts with INDEPENDENT" diagnostic.
gcc/testsuite/
PR fortran/88420
* gfortran.dg/goacc/loop-1-2.f95: Update.
* gfortran.dg/goacc/loop-1.f95: Likewise.
From-SVN: r266920
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profile count.
* ipa-cp.c (update_profiling_info): Call adjust_for_ipa_scaling for
zero profile count.
From-SVN: r266918
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2018-12-08 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/88048
* resolve.c (check_data_variable): Named constant cannot be a
data object.
2018-12-08 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/88048
* gfortran.dg/pr88048.f90: New test.
From-SVN: r266916
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PR fortran/87945
* decl.c (var_element): Inquiry parameters cannit be data objects.
20180-12-08 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/87945
* gfortran.dg/pr87945_1.f90: New test.
* gfortran.dg/pr87945_2.f90: New test.
From-SVN: r266915
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2018-12-08 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/88025
* expr.c (gfc_apply_init): Remove asserts that cannot trigger.
Check for a NULL pointer.
2018-12-08 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/88025
* gfortran.dg/pr88025.f90: New test.
From-SVN: r266913
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From-SVN: r266912
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I noticed I accidentally copied a line too many from the "volatile"
handling to the "inline" handling. This fixes it.
gcc/c/
* c-parser (c_parser_asm_statement) [RID_INLINE]: Delete stray line
setting "quals".
From-SVN: r266909
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2018-12-08 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/88357
* class.c (insert_component_ref): Check for NULL pointer and
previous error message issued.
* parse.c (parse_associate): Check for NULL pointer.
* resolve.c (resolve_assoc_var): Check for NULL pointer.
2018-12-08 Steven G. Kargl <kargl@gcc.gnu.org>
* gfortran.dg/pr88357_1.f90: New test.
* gfortran.dg/pr88357_2.f90: New test.
From-SVN: r266908
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PR fortran/88304
* tree-nested.c (convert_local_reference_stmt): Handle clobbers where
lhs is not a decl normally, don't call use_pointer_in_frame on that
lhs.
* gfortran.fortran-torture/compile/pr88304-2.f90: New test.
From-SVN: r266907
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PR rtl-optimization/88390
* dwarf2cfi.c (struct dw_cfi_row): Add window_save field.
(cfi_row_equal_p): Compare it.
(dwarf2out_frame_debug_cfa_window_save): Add FAKE parameter.
If FAKE is false, set window_save of the current row.
(dwarf2out_frame_debug) <REG_CFA_TOGGLE_RA_MANGLE>: Call above
function with FAKE parameter set to true.
<REG_CFA_WINDOW_SAVE>: Likewise but with FAKE parameter set to false.
(change_cfi_row): Emit a DW_CFA_GNU_window_save if necessary.
From-SVN: r266906
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From-SVN: r266903
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bit-fields with function type...
/cp
2018-12-07 Paolo Carlini <paolo.carlini@oracle.com>
* decl2.c (grokbitfield): Use DECL_SOURCE_LOCATION in error messages
about bit-fields with function type, warn_if_not_aligned type, and
static bit-fields; avoid DECL_NAME for unnamed declarations.
/testsuite
2018-12-07 Paolo Carlini <paolo.carlini@oracle.com>
* g++.dg/other/bitfield7.C: New.
* g++.dg/parse/bitfield8.C: Likewise.
* g++.dg/parse/bitfield9.C: Likewise.
* g++.dg/pr53037-4.C: Test the locations too.
From-SVN: r266900
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gcc/
PR target/87496
* config/rs6000/rs6000.c (rs6000_option_override_internal): Disallow
-mabi=ieeelongdouble and -mabi=ibmlongdouble without -mlong-double-128.
Do not error for -mabi=ibmlongdouble and no ISA 2.06 support.
* doc/invoke.texi: Document -mabi=ibmlongdouble and -mabi=ieeelongdouble
require -mlong-double-128.
gcc/testsuite/
PR target/87496
* gcc.target/powerpc/pr87496.c: Rename from this...
* gcc.target/powerpc/pr87496-1.c: ...to this. Update comment.
* gcc.target/powerpc/pr87496-2.c: New test.
* gcc.target/powerpc/pr87496-3.c: New test.
From-SVN: r266899
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On top of the previous patch that implements TARGET_ESTIMATED_POLY_VALUE
and adds an sve_width tuning field to the CPU structs, this patch implements
an -moverride knob to adjust this sve_width field to allow for experimentation.
Again, reminder that this only has an effect when compiling for VLA-SVE that is,
without msve-vector-bits=<foo>. This just adjusts tuning heuristics in the compiler,,
like profitability thresholds for vectorised versioned loops, and others.
It can be used, for example like -moverride=sve_width=256 to set the sve_width
tuning field to 256. Widths outside of the accepted SVE widths [128 - 2048] are rejected
as you'd expect.
* config/aarch64/aarch64.c (aarch64_tuning_override_functions): Add
sve_width entry.
(aarch64_parse_sve_width_string): Define.
* gcc.target/aarch64/sve/override_sve_width_1.c: New test.
From-SVN: r266898
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m_update_global_ranges member.
* gimple-ssa-evrp-analyze.h (class evrp_range_analyzer): Add
m_update_global_ranges member. Add corresponding argument to ctor.
* gimple-ssa-evrp-analyze.c
(evrp_range_analyzer::evrp_range_analyzer): Add new argument and
initialize m_update_global_ranges.
(evrp_range_analyzer::set_ssa_range_info): Assert that we are
updating global ranges.
(evrp_range_analyzer::record_ranges_from_incoming_edge): Only
update global ranges if explicitly requested.
(evrp_range_analyzer::record_ranges_from_phis): Similarly.
(evrp_range_analyzer::record_ranges_from_stmt): Similarly.
* gimple-ssa-evrp.c (evrp_dom_walker): Pass new argument to
evrp_range_analyzer ctor.
* gimple-ssa-sprintf.c (sprintf_dom_walker): Similarly.
* tree-ssa-dom.c (dom_opt_dom_walker): Similarly.
* gcc.c-torture/builtins/strnlen.x: New file to filter -Og from
options to test.
From-SVN: r266897
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The hook TARGET_ESTIMATED_POLY_VALUE allows a target to give an estimate for a poly_int run-time value.
It is used exclusively in tuning decisions, things like estimated loop iterations, probabilities etc.
It is not relied on for correctness.
If we know the SVE width implemented in hardware we can make more more
informed decisions in the implementation of TARGET_ESTIMATED_POLY_VALUE,
even when compiling for VLA vectorisation.
This patch adds an sve_width field to our tuning structs and sets it for
the current CPU tunings.
A new value is introduced to the aarch64_sve_vector_bits_enum enum that indicates
that SVE is not available: SVE_NOT_IMPLEMENTED. I set it to the same value as SVE_SCALABLE
so that parts of the aarch64 backend that follow the pattern:
if (vector_width == SVE_SCALABLE)
do_vla_friendly_action ()
else
assume_specific_width_for_correctness ()
continue to work without change, but the CPU tuning structs can use a more
appropriate moniker for indicating the absence of SVE.
This sets sve_width to SVE_NOT_IMPLEMENTED for all cores.
I aim to add an -moverride switch in the next patch that allows a power user to experiment
with different values of it for investigations.
* config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum):
Add SVE_NOT_IMPLEMENTED value.
* config/aarch64/aarch64-protos.h (struct tune_params): Add sve_width
field.
* config/aarch64/aarch64.c (generic_tunings,cortexa35_tunings,
cortexa53_tunings, cortexa57_tunings, cortexa72_tunings,
cortexa73_tunings, exynosm1_tunings, thunderx_tunings,
thunderx_tunings, tsv110_tunings, xgene1_tunings, qdf24xx_tunings,
saphira_tunings, thunderx2t99_tunings, emag_tunings):
Specify sve_width.
(aarch64_estimated_poly_value): Define.
(TARGET_ESTIMATED_POLY_VALUE): Define.
From-SVN: r266896
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A recent patch inadvertently added the use of "vector" to mmintrin.h
when all such uses should be "__vector".
[gcc]
2018-12-07 Paul A. Clarke <pc@us.ibm.com>
PR target/88408
* config/rs6000/mmintrin.h (_mm_packs_pu16): Correctly use "__vector".
From-SVN: r266895
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start with r266385)
2018-12-07 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/88349
* ira-costs.c (record_operand_costs): Check bigger reg class on
NO_REGS.
2018-12-07 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/88349
* gcc.target/mips/pr88349.c: New.
From-SVN: r266894
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braced initialiser)
PR c++/86669
* call.c (make_temporary_var_for_ref_to_temp): Call pushdecl even for
automatic vars.
* g++.dg/cpp0x/initlist105.C: New test.
* g++.dg/cpp0x/initlist106.C: New test.
* g++.dg/other/pr86669.C: New test.
From-SVN: r266893
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When using the unpredicated immediate forms of MUL, LSL, LSR and ASR,
the rtl patterns would still have the predicate operand we created for
the other forms. This patch splits the patterns after reload in order
to get rid of the predicate, like we already do for WHILE.
2018-12-07 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/aarch64/aarch64-sve.md (*mul<mode>3, *v<optab><mode>3):
Split the patterns after reload if we don't need the predicate
operand.
(*post_ra_mul<mode>3, *post_ra_v<optab><mode>3): New patterns.
gcc/testsuite/
* gcc.target/aarch64/sve/pred_elim_2.c: New test.
From-SVN: r266892
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When using the unpredicated all-register forms of FADD, FSUB and FMUL,
the rtl patterns would still have the predicate operand we created for
the other forms. This patch splits the patterns after reload in order
to get rid of the predicate, like we already do for WHILE.
2018-12-07 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* config/aarch64/iterators.md (SVE_UNPRED_FP_BINARY): New code
iterator.
(sve_fp_op): Handle minus and mult.
* config/aarch64/aarch64-sve.md (*add<mode>3, *sub<mode>3)
(*mul<mode>3): Split the patterns after reload if we don't
need the predicate operand.
(*post_ra_<sve_fp_op><mode>3): New pattern.
gcc/testsuite/
* gcc.target/aarch64/sve/pred_elim_1.c: New test.
From-SVN: r266891
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Path from Rainer Orth.
Reviewed-on: https://go-review.googlesource.com/c/153118
From-SVN: r266890
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From-SVN: r266889
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* gcc.target/i386/ipa-stack-alignment-2.c: Add
-fomit-frame-pointer to dg-options.
From-SVN: r266888
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condition when *this is precise zero.
* profile-count.h (profile_count::oeprator>=): Fix typo by inverting
return condition when *this is precise zero.
From-SVN: r266885
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From-SVN: r266884
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naked function with O2 optimizations enabled)
PR target/85593
* final.c (rest_of_handle_final): Don't call collect_fn_hard_reg_usage
for functions with naked attribute.
* gcc.target/i386/pr85593.c: New test.
From-SVN: r266881
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lra-eliminations.c:1439 with -march=nano-1000)
PR rtl-optimization/85770
* gcc.target/i386/pr85770.c: Require int128 effective target.
From-SVN: r266880
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fortran/trans-openmp.c:614)
PR fortran/88377
* trans-openmp.c (gfc_omp_clause_default_ctor,
gfc_omp_clause_copy_ctor, gfc_omp_clause_assign_op,
gfc_omp_clause_linear_ctor, gfc_omp_clause_dtor): Only consider
GFC_DECL_GET_SCALAR_ALLOCATABLE vars as scalar allocatables if they
have pointer type.
* gfortran.dg/gomp/pr88377.f90: New test.
From-SVN: r266879
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properly)
PR c/88367
* tree-vrp.c (extract_range_from_binary_expr): For POINTER_PLUS_EXPR
with -fno-delete-null-pointer-checks, set_nonnull only if the pointer
is non-NULL and offset is known to have most significant bit clear.
* vr-values.c (vr_values::vrp_stmt_computes_nonzero): For ADDR_EXPR
of MEM_EXPR, return true if the MEM_EXPR has non-zero offset with
most significant bit clear. If offset does have most significant bit
set and -fno-delete-null-pointer-checks, don't return true even if
the base pointer is non-NULL.
* gcc.dg/tree-ssa/pr88367.c: New test.
From-SVN: r266878
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PR c++/87506
* constexpr.c (adjust_temp_type): Handle EMPTY_CLASS_EXPR.
* g++.dg/cpp0x/constexpr-87506.C: New test.
From-SVN: r266877
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print the type itself too.
/cp
2018-12-06 Paolo Carlini <paolo.carlini@oracle.com>
* class.c (check_bitfield_decl): In error message about non-integral
type print the type itself too.
* decl.c (grokdeclarator): Do not ICE on unnamed bit-fields declared
friends; when calling build_decl for a FIELD_DECL possibly pass the
declarator->id_loc.
/testsuite
2018-12-06 Paolo Carlini <paolo.carlini@oracle.com>
* g++.dg/parse/bitfield7.C: New.
* g++.dg/other/bitfield2.C: Check location and type.
* g++.dg/parse/bitfield1.C: Likewise.
* g++.dg/parse/bitfield2.C: Likewise.
From-SVN: r266876
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When a member template is redeclared as a friend, we enter the context
of the member before looking it up, and then we check that the decls
are compatible. However, when the member template references template
types of the enclosing context, say an enclosing template class, the
compare fails because the friend decl is already tsubsted, whereas the
looked up name isn't.
The problem is that the enclosing context is taken from the friend
declaration before tsubsting it, so we look up in the context of the
generic template instead of that of the tsubsted one we're
specializing. The solution is to tsubst the enclosing context when
it's a non-namespace scope.
for gcc/cp/ChangeLog
PR c++/86747
* pt.c (tsubst_friend_class): Enter tsubsted class context.
for gcc/testsuite/ChangeLog
PR c++/86747
* g++.dg/pr86747.C: New.
From-SVN: r266875
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build_noexcept_spec refrained from resolving nondependent noexcept
expressions when they were not part of the function types (C++ 11 and
14). This caused problems during mangling: canonical_eh_spec, when
called on the template function type, would find an unresolved but not
explicitly deferred expression, and nothrow_spec_p would reject it.
We could relax the mangling logic to skip canonical_eh_spec, but since
-Wnoexcept-type warns when mangling function names that change as
noexcept specs become part of types and of mangling in C++17, and the
test at mangling time may give incorrect results if the spec is not
resolved, we might as well keep things simple and resolve nondependent
noexcept specs sooner rather than later. This is what this patch does.
for gcc/cp/ChangeLog
PR c++/86397
* except.c (build_noexcept_spec): Resolve nondependent
expressions.
for gcc/testsuite/ChangeLog
PR c++/86397
* g++.dg/cpp0x/pr86397-1.C: New.
* g++.dg/cpp0x/pr86397-2.C: New.
From-SVN: r266874
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Jeff Law tells me h8300-elf fails gcc.c-torture/compile/pr49029.c
with -O2 -g -mint32 -mh. This patch fixes it.
The problem is that strict low part handling in cselib_record_sets
assumes src_elt is not NULL. That src_elt is taken from a strict low
part set, but it won't always have a src_elt to begin with. In this
case, it's because src is a volatile MEM; we don't record values for
those.
Although we could fix the problem by testing for a NULL src_elt before
creating the zero extends corresponding to strict low part sets of
formerly const0_rtx REGs, there's no point in recording the additional
set that we won't be able to use anyway.
We could still record that the whole register has a zero-extend of
the value stored in the narrower-mode strict low part of the register,
but is that of any use? I guess not, but if we find otherwise, we can
change that later.
for gcc/ChangeLog
* cselib.c (cselib_record_sets): Skip strict low part sets
with NULL src_elt.
From-SVN: r266873
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The testsuite tests for the compatibility implementations of x86 vector
intrinsics for "powerpc" had been inadvertently made to PASS
without actually running the test code.
This patch removes the code which kept the tests from running the actual
test code.
2018-12-06 Paul A. Clarke <pc@us.ibm.com>
[gcc/testsuite]
PR target/88316
* gcc.target/powerpc/bmi-check.h: Remove test for
__BUILTIN_CPU_SUPPORTS__, thereby enabling test code to run.
* gcc.target/powerpc/bmi2-check.h: Likewise.
* gcc.target/powerpc/mmx-check.h: Likewise.
* gcc.target/powerpc/sse-check.h: Likewise.
* gcc.target/powerpc/sse2-check.h: Likewise.
* gcc.target/powerpc/sse3-check.h: Likewise.
From-SVN: r266870
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Fix general endian issues found in the test cases for thecompatibility
implementations of the x86 vector intrinsics. (The tests had been
inadvertently made to PASS without actually running the test code.
A later patch fixes this issue.)
Additionally, a new <smmintrin.h> is added, as some of the APIs therein are
now used by the test cases. It is _not_ a complete implementation of the
SSE4 interfaces, only the few "extract" interfaces uses by the tests.
2018-12-06 Paul A. Clarke <pc@us.ibm.com>
[gcc]
PR target/88316
* config/rs6000/smmintrin.h: New file.
* config.gcc: Add smmintrin.h to extra_headers for powerpc*-*-*.
[gcc/testsuite]
PR target/88316
* gcc.target/powerpc/mmx-packssdw-1.c: Fixes for big-endian.
* gcc.target/powerpc/mmx-packsswb-1.c: Likewise.
* gcc.target/powerpc/mmx-packuswb-1.c: Likewise.
* gcc.target/powerpc/mmx-pmulhw-1.c: Likewise.
* gcc.target/powerpc/sse-cvtpi32x2ps-1.c: Likewise.
* gcc.target/powerpc/sse-cvtpu16ps-1.c: Likewise.
* gcc.target/powerpc/sse-cvtss2si-1.c: Likewise.
* gcc.target/powerpc/sse-cvtss2si-2.c: Likewise.
* gcc.target/powerpc/sse2-pshufhw-1.c: Likewise.
* gcc.target/powerpc/sse2-pshuflw-1.c: Likewise.
From-SVN: r266869
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Fix general endian and 32-bit mode issues found in the
compatibility implementations of the x86 vector intrinsics when running the
associated test suite tests. (The tests had been inadvertently made to PASS
without actually running the test code. A later patch fixes this issue.)
2018-12-03 Paul A. Clarke <pc@us.ibm.com>
PR target/88316
* config/rs6000/mmintrin.h (_mm_unpackhi_pi8): Fix for big-endian.
(_mm_unpacklo_pi8): Likewise.
(_mm_mulhi_pi16): Likewise.
(_mm_packs_pi16): Fix for big-endian. Use preferred API.
(_mm_packs_pi32): Likewise.
(_mm_packs_pu16): Likewise.
* config/rs6000/xmmintrin.h (_mm_cvtss_si32): Fix for big-endian.
(_mm_cvtss_si64): Likewise.
(_mm_cvtpi32x2_ps): Likewise.
(_mm_shuffle_ps): Likewise.
(_mm_movemask_pi8): Likewise.
(_mm_mulhi_pu16): Likewise.
(_mm_sad_pu8): Likewise.
(_mm_sad_pu8): Likewise.
(_mm_cvtpu16_ps): Fix for big-endian. Use preferred API.
(_mm_cvtpu8_ps): Likewise.
(_mm_movemask_ps): Better #else case for big-endian (no functional
change).
(_mm_shuffle_pi16): Likewise.
* config/rs6000/emmintrin.h (_mm_movemask_pd): Fix for big-endian.
Better #else case for big-endian (no functional change).
(_mm_movemask_epi8): Likewise.
(_mm_shufflehi_epi16): Likewise.
(_mm_shufflelo_epi16): Likewise.
(_mm_shuffle_epi32): Likewise.
(_mm_mul_epu32): Fix for big-endian.
(_mm_bsrli_si128): Likewise.
(_mm_cvtps_pd): Better #else case for big endian.
(_mm_mulhi_epi16): Likewise.
(_mm_mul_epu32): Likewise.
(_mm_slli_si128): Likewise.
(_mm_sll_epi16): Likewise.
(_mm_sll_epi32): Likewise.
(_mm_sra_epi16): Likewise.
(_mm_sra_epi32): Likewise.
(_mm_srl_epi16): Likewise.
(_mm_srl_epi32): Likewise.
(_mm_mulhi_epu16): Likewise.
(_mm_sad_epu8): Likewise.
* config/rs6000/pmmintrin.h (_mm_hadd_ps): Fix for big-endian.
(_mm_sub_ps): Likewise.
* config/rs6000/mmintrin.h (_mm_cmpeq_pi8): Fix for 32-bit mode.
* gcc/config/rs6000/tmmintrin.h (_mm_alignr_epi8): Use ENDIAN
macros consistently (no functional changes).
(_mm_alignr_pi8): Likewise.
From-SVN: r266868
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