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gcc/ChangeLog:
PR rtl-optimization/87096
* gimple-ssa-sprintf.c (sprintf_dom_walker::handle_gimple_call): Avoid
folding calls whose bound may exceed INT_MAX. Diagnose bound ranges
that exceed the limit.
gcc/testsuite/ChangeLog:
PR tree-optimization/87096
* gcc.dg/tree-ssa/builtin-snprintf-4.c: New test.
From-SVN: r267157
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gcc/ChangeLog:
* doc/extend.texi (attribute const, pure): Clarify.
From-SVN: r267156
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tsubst_expr and tsubst_copy_and_build are not expected to handle
DEFERRED_NOEXCEPT exprs, but if tsubst_exception_specification takes a
DEFERRED_NOEXCEPT expr with !defer_ok, it just passes the expr on for
tsubst_copy_and_build to barf.
This patch arranges for tsubst_exception_specification to combine the
incoming args with those already stored in a DEFERRED_NOEXCEPT, and
then substitute them into the pattern, when retaining a deferred
noexcept is unacceptable.
for gcc/cp/ChangeLog
PR c++/87814
* pt.c (tsubst_exception_specification): Handle
DEFERRED_NOEXCEPT with !defer_ok.
for gcc/testsuite/ChangeLog
PR c++/87814
* g++.dg/cpp1z/pr87814.C: New.
From-SVN: r267155
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Currently GCC inserts ENDBR instruction at entries of all non-static
functions, unless LTO compilation is used. Marking all functions,
which are not called indirectly with nocf_check attribute, is not
ideal since 99% of functions in a program may be of this kind.
This patch adds -mmanual-endbr and cf_check function attribute. They
can be used together with -fcf-protection such that ENDBR instruction
is inserted only at entries of functions with cf_check attribute. It
can limit number of ENDBR instructions to reduce program size.
gcc/
* config/i386/i386.c (rest_of_insert_endbranch): Insert ENDBR
at the function entry only when -mmanual-endbr isn't used or
there is cf_check function attribute.
(ix86_attribute_table): Add cf_check.
* config/i386/i386.opt: Add -mmanual-endbr.
* doc/extend.texi: Document cf_check attribute.
* doc/invoke.texi: Document -mmanual-endbr.
gcc/testsuite/
* gcc.target/i386/cf_check-1.c: New test.
* gcc.target/i386/cf_check-2.c: Likewise.
* gcc.target/i386/cf_check-3.c: Likewise.
* gcc.target/i386/cf_check-4.c: Likewise.
* gcc.target/i386/cf_check-5.c: Likewise.
From-SVN: r267154
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gcc/
* omp-offload.c (inform_oacc_loop): New function.
(execute_oacc_device_lower): Use it to display loop parallelism.
gcc/testsuite/
* c-c++-common/goacc/note-parallelism.c: New test.
* gfortran.dg/goacc/note-parallelism.f90: New test.
* c-c++-common/goacc/classify-kernels-unparallelized.c: Update.
* c-c++-common/goacc/classify-kernels.c: Likewise.
* c-c++-common/goacc/classify-parallel.c: Likewise.
* c-c++-common/goacc/classify-routine.c: Likewise.
* c-c++-common/goacc/kernels-1.c: Likewise.
* c-c++-common/goacc/kernels-double-reduction-n.c: Likewise.
* c-c++-common/goacc/kernels-double-reduction.c: Likewise.
* gfortran.dg/goacc/classify-kernels-unparallelized.f95: Likewise.
* gfortran.dg/goacc/classify-kernels.f95: Likewise.
* gfortran.dg/goacc/classify-parallel.f95: Likewise.
* gfortran.dg/goacc/classify-routine.f95: Likewise.
* gfortran.dg/goacc/kernels-loop-inner.f95: Likewise.
Co-Authored-By: Cesar Philippidis <cesar@codesourcery.com>
From-SVN: r267146
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We used to preserve deferred access check along with resolved template
ids, but a tentative parsing firewall introduced additional layers of
deferred access checks, so that we don't preserve the checks we
want to any more.
This patch moves the deferred access checks from outside the firewall
into it.
From: Jason Merrill <jason@redhat.com>
for gcc/cp/ChangeLog
PR c++/86823
* parser.c (cp_parser_template_id): Rearrange deferred access
checks into the firewall.
From: Alexandre Oliva <aoliva@redhat.com>
for gcc/testsuite/ChangeLog
PR c++/86823
* g++.dg/pr86823.C: New.
From-SVN: r267144
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from space-inefficient memory image)
PR c++/82294
PR c++/87436
* expr.h (categorize_ctor_elements): Add p_unique_nz_elts argument.
* expr.c (categorize_ctor_elements_1): Likewise. Compute it like
p_nz_elts, except don't multiply it by mult. Adjust recursive call.
Fix up COMPLEX_CST handling.
(categorize_ctor_elements): Add p_unique_nz_elts argument, initialize
it and pass it through to categorize_ctor_elements_1.
(mostly_zeros_p, all_zeros_p): Adjust categorize_ctor_elements callers.
* gimplify.c (gimplify_init_constructor): Likewise. Don't force
ctor into readonly data section if num_unique_nonzero_elements is
smaller or equal to 1/8 of num_nonzero_elements and size is >= 64
bytes.
* g++.dg/tree-ssa/pr82294.C: New test.
* g++.dg/tree-ssa/pr87436.C: New test.
From-SVN: r267143
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from space-inefficient memory image)
PR c++/82294
PR c++/87436
* init.c (build_vec_init): Change num_initialized_elts type from int
to HOST_WIDE_INT. Build a RANGE_EXPR if e needs to be repeated more
than once.
From-SVN: r267142
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Current code to handle -mslow-flash-data in machine description files
suffers from a number of issues which this patch fixes:
1) The insn_and_split in vfp.md to load a generic floating-point
constant via GPR first and move it to VFP register are guarded by
!reload_completed which is forbidden explicitely in the GCC internals
documentation section 17.2 point 3;
2) A number of testcase in the testsuite ICEs under -mslow-flash-data
when targeting the hardfloat ABI [1];
3) Instructions performing load from literal pool are not disabled.
These problems are addressed by 2 separate actions:
1) Making the splitters take a clobber and changing the expanders
accordingly to generate a mov with clobber in cases where a literal
pool would be used. The splitter can thus be enabled after reload since
it does not call gen_reg_rtx anymore;
2) Adding new predicates and constraints to disable literal pool loads
in existing instructions when -mslow-flash-data is in effect.
The patch also rework the splitter for DFmode slightly to generate an
intermediate DI load instead of 2 intermediate SI loads, thus relying on
the existing DI splitters instead of redoing their job. At last, the
patch adds some missing arm_fp_ok effective target to some of the
slow-flash-data testcases.
[1]
c-c++-common/Wunused-var-3.c
gcc.c-torture/compile/pr72771.c
gcc.c-torture/compile/vector-5.c
gcc.c-torture/compile/vector-6.c
gcc.c-torture/execute/20030914-1.c
gcc.c-torture/execute/20050316-1.c
gcc.c-torture/execute/pr59643.c
gcc.dg/builtin-tgmath-1.c
gcc.dg/debug/pr55730.c
gcc.dg/graphite/interchange-7.c
gcc.dg/pr56890-2.c
gcc.dg/pr68474.c
gcc.dg/pr80286.c
gcc.dg/torture/pr35227.c
gcc.dg/torture/pr65077.c
gcc.dg/torture/pr86363.c
g++.dg/torture/pr81112.C
g++.dg/torture/pr82985.C
g++.dg/warn/Wunused-var-7.C
and a lot more in libstdc++ in special_functions/*_comp_ellint_* and
special_functions/*_ellint_* directories.
2018-12-14 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
* config/arm/arm.md (arm_movdi): Split if -mslow-flash-data and
source is a constant that would be loaded by literal pool.
(movsf expander): Generate a no_literal_pool_sf_immediate insn if
-mslow-flash-data is present, targeting hardfloat ABI and source is a
float constant that cannot be loaded via vmov.
(movdf expander): Likewise but generate a no_literal_pool_df_immediate
insn.
(arm_movsf_soft_insn): Split if -mslow-flash-data and source is a
float constant that would be loaded by literal pool.
(softfloat constant movsf splitter): Splitter for the above case.
(movdf_soft_insn): Split if -mslow-flash-data and source is a float
constant that would be loaded by literal pool.
(softfloat constant movdf splitter): Splitter for the above case.
* config/arm/constraints.md (Pz): Document existing constraint.
(Ha): Define constraint.
(Tu): Likewise.
* config/arm/predicates.md (hard_sf_operand): New predicate.
(hard_df_operand): Likewise.
* config/arm/thumb2.md (thumb2_movsi_insn): Split if
-mslow-flash-data and constant would be loaded by literal pool.
* constant/arm/vfp.md (thumb2_movsi_vfp): Likewise and disable constant
load in VFP register.
(movdi_vfp): Likewise.
(thumb2_movsf_vfp): Use hard_sf_operand as predicate for source to
prevent match for a constant load if -mslow-flash-data and constant
cannot be loaded via vmov. Adapt constraint accordingly by
using Ha instead of E for generic floating-point constant load.
(thumb2_movdf_vfp): Likewise using hard_df_operand predicate instead.
(no_literal_pool_df_immediate): Add a clobber to use as the
intermediate general purpose register and also enable it after reload
but disable it constant is a valid FP constant. Add constraints and
generate a DI intermediate load rather than 2 SI loads.
(no_literal_pool_sf_immediate): Add a clobber to use as the
intermediate general purpose register and also enable it after
reload.
2018-11-14 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/testsuite/
* gcc.target/arm/thumb2-slow-flash-data-2.c: Require arm_fp_ok
effective target.
* gcc.target/arm/thumb2-slow-flash-data-3.c: Likewise.
* gcc.target/arm/thumb2-slow-flash-data-4.c: Likewise.
* gcc.target/arm/thumb2-slow-flash-data-5.c: Likewise.
From-SVN: r267141
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PR target/88474
* internal-fn.def (HYPOT): New.
* optabs.def (hypot_optab): New.
* config/i386/i386.md (hypot<mode>3): New expander.
From-SVN: r267137
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From-SVN: r267136
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2018-12-14 Sam Tebbs <sam.tebbs@arm.com>
* doc/tm.texi (TARGET_ASM_POST_CFI_STARTPROC): Define.
* doc/tm.texi.in (TARGET_ASM_POST_CFI_STARTPROC): Define.
* dwarf2out.c (dwarf2out_do_cfi_startproc): Trigger the hook.
* hooks.c (hook_void_FILEptr_tree): Define.
* hooks.h (hook_void_FILEptr_tree): Define.
* target.def (post_cfi_startproc): Define.
From-SVN: r267135
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When compiling an OpenMP or OpenACC program containing a reference in the
offloaded code to a symbol that has not been included in the offloaded code,
the offloading compiler may ICE in lto1.
Fix this by erroring out instead, mentioning the problematic symbol:
...
error: variable 'var' has been referenced in offloaded code but hasn't
been marked to be included in the offloaded code
lto1: fatal error: errors during merging of translation units
compilation terminated.
...
Build x86_64 with nvptx accelerator and reg-tested libgomp.
Build x86_64 and reg-tested libgomp.
2018-12-14 Tom de Vries <tdevries@suse.de>
* lto-cgraph.c (verify_node_partition): New function.
(input_overwrite_node, input_varpool_node): Use verify_node_partition.
* testsuite/libgomp.c-c++-common/function-not-offloaded-aux.c: New test.
* testsuite/libgomp.c-c++-common/function-not-offloaded.c: New test.
* testsuite/libgomp.c-c++-common/variable-not-offloaded.c: New test.
* testsuite/libgomp.oacc-c-c++-common/function-not-offloaded.c: New test.
* testsuite/libgomp.oacc-c-c++-common/variable-not-offloaded.c: New test.
From-SVN: r267134
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get_frame_size () returns used stack slots during compilation, which
may be optimized out later. Since ix86_find_max_used_stack_alignment
is called by ix86_finalize_stack_frame_flags to check if stack frame
is required, there is no need to call get_frame_size () which may give
inaccurate final stack frame size.
Tested on AVX512 machine configured with
--with-arch=native --with-cpu=native
gcc/
PR target/88483
* config/i386/i386.c (ix86_finalize_stack_frame_flags): Don't
use get_frame_size ().
gcc/testsuite/
PR target/88483
* gcc.target/i386/stackalign/pr88483.c: New test.
From-SVN: r267133
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This patch fixes an ICE building libgfortran/random.c.
The problem was an adddi3 instruction that had an eliminable frame pointer.
GCN adddi3 includes a match_scratch, which LRA substitutes with a REG, and
checks if it can be converted back to a scratch afterwards. In the meantime,
the add was converted to a move, meaning that the instruction pattern
completely changed, thus causing a segfault when the instruction is revisited
in restore_scratches.
2018-12-14 Andrew Stubbs <ams@codesourcery.com>
gcc/
* gcc/lra-int.h (lra_register_new_scratch_op): Add third parameter.
* gcc/lra-remat.c (update_scratch_ops): Pass icode to
lra_register_new_scratch_op.
* gcc/lra.c (struct sloc): Add icode field.
(lra_register_new_scratch_op): Add icode parameter.
Use icode to skip insns that have changed beyond recognition.
From-SVN: r267132
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containing a template.
* gcc-interface/decl.c (rm_size): Take into account the padding in
the case of a record type containing a template.
* gcc-interface/trans.c (Attribute_to_gnu) <Attr_Size>: Likewise.
Do not subtract the padded size for Max_Size_In_Storage_Elements.
<Attr_Descriptor_Size>: Tweak comment.
From-SVN: r267131
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* dwarf2out.c (analyze_discr_in_predicate): Simplify.
(analyze_variants_discr): Deal with naked boolean discriminants.
ada/
* gcc-interface/decl.c (choices_to_gnu): Directly use a naked boolean
discriminant if the value is the boolean true.
From-SVN: r267130
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The blink is restored wrongly when using millicode and regular load
instructions.
gcc/
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (arc_restore_callee_milli) Don't clobber off
variable.
testsuite/
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* gcc.target/arc/milli-1.c: New test.
From-SVN: r267129
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From-SVN: r267128
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2018-12-14 Richard Biener <rguenther@suse.de>
* gimple-ssa-split-paths.c (is_feasible_trace): Remove
duplicated code block.
From-SVN: r267126
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Masking CALL_LONG from the cookie was done in order to simplify and
correct length attribute calculations for indirect calls at one point
in my call series tidy when the indirect patterns used alternatives
"0,n" on the cookie operand. (Leaving the CALL_LONG in place
calculated the wrong length for long calls without fp args.)
This is no longer necessary now that the indirect sysv call patterns
explicitly test for the fp arg bits in their length attribute
expressions. And without the CALL_LONG to disable insns like
call_value_local_svsv, combine merrily replaces the indirect long call
sequence with a direct call. As it should. This patch reinstates
the CALL_LONG bit.
PR rtl-optimization/88311
* config/rs6000/rs6000.c (rs6000_call_sysv): Do not mask cookie.
(rs6000_sibcall_sysv): Likewise.
From-SVN: r267123
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The new insn here (temporarily) illegally shares RTL. This fixes it.
PR rtl-optimization/88001
* function.c (match_asm_constraints_1): Don't invalidly share RTL.
From-SVN: r267122
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counts are all zeros.
* auto-profile.c (afdo_annotate_cfg): Call update_max_bb_count even
if autofdo counts are all zeros.
From-SVN: r267121
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internal call.
* auto-profile.c (afdo_indirect_call): Skip generating histogram
value for internal call.
From-SVN: r267120
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* auto-profile.c (AFDO_EINFO): New macro.
(class edge_info): New class.
(is_edge_annotated, set_edge_annotated): Delete.
(afdo_propagate_edge, afdo_propagate_circuit, afdo_propagate): Remove
parameter. Adjust edge count computation and annotation using class
edge_info.
(afdo_calculate_branch_prob, afdo_annotate_cfg): Likewise.
From-SVN: r267119
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* ipa-cp.c (print_all_lattices): Skip cp clones.
* gcc.dg/lto/pr88297_0.c: New test.
* gcc.dg/lto/pr88297_1.c: New test.
From-SVN: r267118
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From-SVN: r267117
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From-SVN: r267114
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integer_cst in live_on_edge, at tree-vrp.c:468; or ICE: tree check: expected ssa_name, have integer_cst in get_value_range, at vr-values.c:84)
PR tree-optimization/88444
* tree-inline.c (fold_marked_statements): Iterate up to
last_basic_block_for_fn rather than n_basic_blocks_for_fn.
* gcc.dg/tree-ssa/pr88444.c: New test.
From-SVN: r267113
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dwarf2cfi.c:2354)
PR rtl-optimization/88470
* cfgcleanup.c (outgoing_edges_match): If the function is
shrink-wrapped and bb1 ends with a JUMP_INSN with a single fake
edge to EXIT, return false.
* gcc.target/i386/pr88470.c: New test.
From-SVN: r267112
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gcc/ChangeLog:
* doc/extend.texi: Consistently use @code for const and volatile
qualifiers, the true and false constants, and asm statements.
From-SVN: r267111
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2018-12-13 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/88414
* lra-int.h (lra_asm_error_p): New.
* lra-assigns.c (lra_assign): Check lra_asm_error_p for checking
call crossed pseudo assignment correctness.
(lra_split_hard_reg_for): Set up lra_asm_error_p.
* lra-constraints.c (curr_insn_transform): Ditto.
* lra.c (lra_asm_error_p): New.
(lra): Reset lra_asm_error_p.
2018-12-13 Vladimir Makarov <vmakarov@redhat.com>
PR rtl-optimization/88414
* gcc.target/i386/pr88414.c: New.
From-SVN: r267109
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* mangle.c (write_expression): Handle TARGET_EXPR and
VIEW_CONVERT_EXPR.
* pt.c (convert_nontype_argument): Don't call
get_template_parm_object for value-dependent expressions.
* g++.dg/cpp2a/nontype-class9.C: New test.
From-SVN: r267108
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PR rtl-optimization/88416
* valtrack.c (cleanup_auto_inc_dec): Handle pre/post-inc/dec/modify
even if !AUTO_INC_DEC.
* gcc.target/i386/pr88416.c: New test.
From-SVN: r267105
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* config/rs6000/rs6000.c (rs6000_function_arg): Ensure type is non-NULL.
(rs6000_arg_partial_bytes): Same.
From-SVN: r267104
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* gdbinit.in (pp): New macro.
(pbb): Remove.
From-SVN: r267098
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failing with "not suitable for scatter store")
PR tree-optimization/88464
* tree-vect-stmts.c (vect_build_gather_load_calls): Handle INTEGER_TYPE
masktype if mask is non-NULL.
(vectorizable_load): Don't reject masked gather loads if masktype
in the decl is INTEGER_TYPE.
* gcc.target/i386/avx512f-pr88462-1.c: New test.
* gcc.target/i386/avx512f-pr88462-2.c: New test.
From-SVN: r267097
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https://gcc.gnu.org/ml/gcc-patches/2018-12/msg00929.html
PR c++/87531
* class.c (finish_struct): Set DECL_CONTEXT of template assign op.
* name-lookup.c (get_class_binding_direct): Don't strip using-decl
of overload here.
* parser.c (cp_parser_postfix_expression): Cope with using decl in
overload set.
* semantics.c (finish_id_expr): Likewise.
* g++.dg/lookup/pr87531-2.C: New.
From-SVN: r267096
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PR testsuite/88041
* lib/gdc-dg.exp (gdc-dg-test): Strip gdc.test prefix.
* gdc.test/gdc-test.exp (gdc-do-test): Create $subdir link.
Include $subdir in filename.
Cleanup generated source.
* gdc.test/compilable/ddoc9676a.d (EXTRA_SOURCES): Don't use
absolute path.
* gdc.test/compilable/depsOutput9948.d: Likewise.
From-SVN: r267094
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r266971)
PR testsuite/88454
* gcc.dg/tree-ssa/split-path-5.c (__ctype_ptr__): Change type from
const char * to const signed char *.
(bmhi_init): Change pattern parameter's type the same. Use
__builtin_strlen instead of undeclared strlen.
From-SVN: r267092
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The (unsigned) long int to double vector conversion instructions
expect 2 immediate parameters. One for the inexact suppression
control and another one for the rounding mode. However, the
vec_double builtin has just the vector source operand. The 2
addtional operands need to be added with an intermediate expander.
The expanders were already there but unfortunately not wired up
correctly to the builtin.
gcc/ChangeLog:
2018-12-13 Andreas Krebbel <krebbel@linux.ibm.com>
* config/s390/s390-builtins.def (s390_vec_double_s64): Map to
s390_vec_double_s64 instead of s390_vcdgb.
(s390_vec_double_u64): Map to s390_vec_double_u64 instead of
s390_vcdlgb.
gcc/testsuite/ChangeLog:
2018-12-13 Andreas Krebbel <krebbel@linux.ibm.com>
* gcc.target/s390/zvector/vec-double-1.c: New test.
* gcc.target/s390/zvector/vec-double-2.c: New test.
From-SVN: r267084
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2018-12-13 Andreas Krebbel <krebbel@linux.ibm.com>
* config/s390/vx-builtins.md ("vec_ctd_s64", "vec_ctd_u64")
("vec_ctsl", "vec_ctul"): Replace 0 with VEC_NOINEXACT.
("vec_double_s64", "vec_double_u64"): Replace 4 with VEC_INEXACT.
From-SVN: r267083
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We've received reports about the -msve-vector-bits=128 bits being somewhat ambiguous.
It isn't clear whether -msve-vector-bits=128 forces vector-length-agnostic code or whether
-msve-vector-bits=scalable forces 128-bit vector-lengh-specific code.
The latter is a, perhaps unintuitive, reading that we want to exclude.
This patch makes it more explicit that -msve-vector-bits=128 is special and produces
vector-length *agnostic* code. In the end, I've rewritten the whole option documentation.
Checked make pdf that the output looks reasonable.
* doc/invoke.texi (-msve-vector-bits): Clarify -msve-vector-bits=128
behavior.
From-SVN: r267081
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gcc/
* common/config/i386/i386-common.c (processor_names): Add cascadelake.
(processor_alias_table): Add cascadelake.
* config.gcc: Add -march=cascadelake.
* config/i386/i386-c.c (ix86_target_macros_internal): Handle cascadelake.
* config/i386/i386.c (Add m_CASCADELAKE): New.
(processor_cost_table): Add cascadelake.
(get_builtin_code_for_version): Handle cascadelake.
* config/i386/i386.h (TARGET_CASCADELAKE, PROCESSOR_CASCADELAKE): New.
(PTA_CASCADELAKE): Ditto.
* doc/invoke.texi: Add -march=cascadelake.
gcc/testsuite/
* gcc.target/i386/funcspec-56.inc: Handle new march.
From-SVN: r267080
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Part of RC12-001
From-SVN: r267079
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PR target/88465
* config/i386/i386.md (*movdi_internal, *movsi_internal,
*movhi_internal, *movqi_internal): Add alternative(s) to load
0 or -1 into k registers using kxor or kxnoq instructions.
* gcc.target/i386/avx512f-pr88465.c: New test.
* gcc.target/i386/avx512dq-pr88465.c: New test.
From-SVN: r267078
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PR target/88461
* config/i386/sse.md (VI1248_AVX512VLBW, AVX512ZEXTMASK): New
mode iterators.
(<avx512>_testm<mode>3<mask_scalar_merge_name>,
<avx512>_testnm<mode>3<mask_scalar_merge_name>): Merge patterns
with VI12_AVX512VL and VI48_AVX512VL iterators into ones with
VI1248_AVX512VLBW iterator.
(*<avx512>_testm<VI1248_AVX512VLBW:mode>3_zext,
*<avx512>_testm<VI1248_AVX512VLBW:mode>3_zext_mask,
*<avx512>_testnm<VI1248_AVX512VLBW:mode>3_zext,
*<avx512>_testnm<VI1248_AVX512VLBW:mode>3_zext_mask): New
define_insns.
* gcc.target/i386/pr88461.c: New test.
From-SVN: r267077
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PR target/88461
* config/i386/i386.md (*zero_extendsidi2, zero_extend<mode>di2,
*zero_extend<mode>si2, *zero_extendqihi2): Add =*k, *km alternatives.
From-SVN: r267076
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From-SVN: r267074
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The type table encoding can be DW_EH_PE_absptr, but this case
was missing, which was causing abort on ARM32 EABI. Add the
missing case.
Reviewed-on: https://go-review.googlesource.com/c/153857
From-SVN: r267070
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