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The "wg" constraint is used for the floating point side on mfpgpr
instructions. Those instructions do not exist on any relevant
hardware. This patch deletes the constraint and the insns using it.
* config/rs6000/constraints.md (define_register_constraint "wg"):
Delete.
* config/rs6000/rs6000.h (enum r6000_reg_class_enum): Delete
RS6000_CONSTRAINT_wg.
* config/rs6000/rs6000.c (rs6000_debug_reg_global): Adjust.
(rs6000_init_hard_regno_mode_ok): Adjust.
* config/rs6000/rs6000.md (*mov<mode>_softfloat32, *movdi_internal64):
Delete "wg" alternatives.
* doc/md.texi (Machine Constraints): Adjust.
From-SVN: r271888
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From-SVN: r271885
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Some assembler doesn't accept ULL suffix. In fact the suffix
is not really necessary. Drop it.
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/180217
From-SVN: r271883
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* bb-reorder.c (copy_bb_p): Don't overflow size calculation.
(get_uncond_jump_length): Assert length less than INT_MAX and
non-negative.
From-SVN: r271877
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* gcc.dg/debug/enum-1.c: Add -fno-eliminate-unused-debug-symbols
on AIX.
* g++.dg/debug/enum-1.C: Same.
From-SVN: r271873
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Improve the fix for PR64242. Various optimizations can change a memory
reference into a frame access. Given there are multiple virtual frame pointers
which may be replaced by multiple hard frame pointers, there are no checks for
writes to the various frame pointers. So updates to a frame pointer tends to
generate incorrect code. Improve the previous fix to also add clobbers of
several frame pointers and add a scheduling barrier. This should work in most
cases until GCC supports a generic "don't optimize across this instruction"
feature.
Bootstrap OK. Testcase passes on AArch64 and x86-64. Inspected x86, Arm,
Thumb-1 and Thumb-2 assembler which looks correct.
gcc/
PR middle-end/64242
* builtins.c (expand_builtin_longjmp): Add frame clobbers and schedule
block.
(expand_builtin_nonlocal_goto): Likewise.
testsuite/
PR middle-end/64242
* gcc.c-torture/execute/pr64242.c: Update test.
From-SVN: r271870
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A dynamic linker with lazy binding support may need to handle vector PCS
function symbols specially, so an ELF symbol table marking was
introduced for such symbols.
Function symbol references and definitions that follow the vector PCS
are marked in the generated assembly with .variant_pcs and then the
STO_AARCH64_VARIANT_PCS st_other flag is set on the symbol in the object
file. The marking is propagated to the dynamic symbol table by the
static linker so a dynamic linker can handle such symbols specially.
For this to work, the assembler, the static linker and the dynamic
linker has to be updated on a system. Old assembler does not support
the new .variant_pcs directive, so a toolchain with old binutils won't
be able to compile code that references vector PCS symbols.
gcc/ChangeLog:
* config/aarch64/aarch64-protos.h (aarch64_asm_output_alias): Declare.
(aarch64_asm_output_external): Declare.
* config/aarch64/aarch64.c (aarch64_asm_output_variant_pcs): New.
(aarch64_declare_function_name): Call aarch64_asm_output_variant_pcs.
(aarch64_asm_output_alias): New.
(aarch64_asm_output_external): New.
* config/aarch64/aarch64.h (ASM_OUTPUT_DEF_FROM_DECLS): Define.
(ASM_OUTPUT_EXTERNAL): Define.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/pcs_attribute-2.c: New test.
* gcc.target/aarch64/torture/simd-abi-4.c: Check .variant_pcs support.
* lib/target-supports.exp (check_effective_target_aarch64_variant_pcs):
New.
From-SVN: r271869
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* tree-vrp.h (value_range_base::nonzero_p): New.
(value_range_base::set_nonnull): Rename to...
(value_range_base::set_nonzero): ...this.
(value_range_base::set_null): Rename to...
(value_range_base::set_zero): ...this.
(value_range::set_nonnull): Remove.
(value_range::set_null): Remove.
* tree-vrp.c (range_is_null): Remove.
(range_is_nonnull): Remove.
(extract_range_from_binary_expr): Use value_range_base::*zero_p
instead of range_is_*null.
(extract_range_from_unary_expr): Same.
(value_range_base::set_nonnull): Rename to...
(value_range_base::set_nonzero): ...this.
(value_range::set_nonnull): Remove.
(value_range_base::set_null): Rename to...
(value_range_base::set_zero): ...this.
(value_range::set_null): Remove.
(extract_range_from_binary_expr): Rename set_*null uses to
set_*zero.
(extract_range_from_unary_expr): Same.
(union_helper): Same.
* vr-values.c (get_value_range): Use set_*zero instead of
set_*null.
(vr_values::extract_range_from_binary_expr): Same.
(vr_values::extract_range_basic): Same.
From-SVN: r271865
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Fix the alignment option parser to always allow up to 4 alignments.
Now -falign-functions=16:8:8:8 no longer reports an error.
gcc/
PR driver/90684
* opts.c (parse_and_check_align_values): Allow 4 alignment values.
M gcc/ChangeLog
M gcc/opts.c
From-SVN: r271864
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Wilco pointed out that when the Dot Product instructions are available we can use them
to generate an even more efficient expansion for the [us]sadv16qi optab.
Instead of the current:
uabdl2 v0.8h, v1.16b, v2.16b
uabal v0.8h, v1.8b, v2.8b
uadalp v3.4s, v0.8h
we can generate:
(1) mov v4.16b, 1
(2) uabd v0.16b, v1.16b, v2.16b
(3) udot v3.4s, v0.16b, v4.16b
Instruction (1) can be CSEd across multiple such expansions and even hoisted outside of loops,
so when this sequence appears frequently back-to-back (like in x264_r) we essentially only have 2 instructions
per sum. Also, the UDOT instruction does the byte-to-word accumulation in one step, which allows us to use
the much simpler UABD instruction before it.
This makes it a shorter and lower-latency sequence overall for targets that support it.
* config/aarch64/iterators.md (MAX_OPP): New code attr.
* config/aarch64/aarch64-simd.md (*aarch64_<su>abd<mode>_3): Rename to...
(aarch64_<su>abd<mode>_3): ... This.
(<sur>sadv16qi): Add TARGET_DOTPROD expansion.
* gcc.target/aarch64/ssadv16qi.c: Add +nodotprod to pragma.
* gcc.target/aarch64/usadv16qi.c: Likewise.
* gcc.target/aarch64/ssadv16qi-dotprod.c: New test.
* gcc.target/aarch64/usadv16qi-dotprod.c: Likewise.
From-SVN: r271863
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2019-06-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
* lib/target-supports.exp (add_options_for_aarch64_sve): New procedure.
(aarch64_sve_hw_bits): Call add_options_for_aarch64_sve.
(check_effective_target_aarch64_sve_hw): Likewise.
From-SVN: r271862
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2019-06-03 Martin Liska <mliska@suse.cz>
* doc/generic.texi: Remove Java Trees.
From-SVN: r271861
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reference tree and record in ref->ref.
2019-06-03 Richard Biener <rguenther@suse.de>
* tree-ssa-sccvn.c (ao_ref_init_from_vn_reference): Get original
full reference tree and record in ref->ref.
(vn_reference_lookup_3): Pass in original ref to
ao_ref_init_from_vn_reference.
(vn_reference_lookup): Likewise.
* tree-ssa-sccvn.h (ao_ref_init_from_vn_reference): Adjust prototype.
* tree-ssa-alias.c (nonoverlapping_component_refs_of_decl_p):
Handle non-decl bases in the original reference.
* gcc.dg/tree-ssa/alias-access-path-1.c: Scan fre1.
From-SVN: r271860
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2019-06-03 Martin Liska <mliska@suse.cz>
* fold-const.c (operand_equal_p): Fix typo as compare_tree_int
returns 0 when operands are equal.
From-SVN: r271859
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2019-06-03 Richard Biener <rguenther@suse.de>
PR tree-optimization/90716
* tree-loop-distribution.c (destroy_loop): Process blocks in
correct order.
* gcc.dg/guality/pr90716.c: New testcase.
From-SVN: r271858
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2019-06-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
PR target/88837
* vector-builder.h (vector_builder::count_dups): New method.
* config/aarch64/aarch64-protos.h (aarch64_expand_sve_vector_init):
Declare prototype.
* config/aarch64/aarch64/sve.md (aarch64_sve_rev64<mode>): Use @.
(vec_init<mode><Vel>): New pattern.
* config/aarch64/aarch64.c (emit_insr): New function.
(aarch64_sve_expand_vector_init_handle_trailing_constants): Likewise.
(aarch64_sve_expand_vector_init_insert_elems): Likewise.
(aarch64_sve_expand_vector_init_handle_trailing_same_elem): Likewise.
(aarch64_sve_expand_vector_init): Define two overloaded functions.
testsuite/
* gcc.target/aarch64/sve/init_1.c: New test.
* gcc.target/aarch64/sve/init_1_run.c: Likewise.
* gcc.target/aarch64/sve/init_2.c: Likewise.
* gcc.target/aarch64/sve/init_2_run.c: Likewise.
* gcc.target/aarch64/sve/init_3.c: Likewise.
* gcc.target/aarch64/sve/init_3_run.c: Likewise.
* gcc.target/aarch64/sve/init_4.c: Likewise.
* gcc.target/aarch64/sve/init_4_run.c: Likewise.
* gcc.target/aarch64/sve/init_5.c: Likewise.
* gcc.target/aarch64/sve/init_5_run.c: Likewise.
* gcc.target/aarch64/sve/init_6.c: Likewise.
* gcc.target/aarch64/sve/init_6_run.c: Likewise.
* gcc.target/aarch64/sve/init_7.c: Likewise.
* gcc.target/aarch64/sve/init_7_run.c: Likewise.
* gcc.target/aarch64/sve/init_8.c: Likewise.
* gcc.target/aarch64/sve/init_8_run.c: Likewise.
* gcc.target/aarch64/sve/init_9.c: Likewise.
* gcc.target/aarch64/sve/init_9_run.c: Likewise.
* gcc.target/aarch64/sve/init_10.c: Likewise.
* gcc.target/aarch64/sve/init_10_run.c: Likewise.
* gcc.target/aarch64/sve/init_11.c: Likewise.
* gcc.target/aarch64/sve/init_11_run.c: Likewise.
* gcc.target/aarch64/sve/init_12.c: Likewise.
* gcc.target/aarch64/sve/init_12_run.c: Likewise.
From-SVN: r271857
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This patch fixes bug 90681. It was caused by trying to SLP vectorize a non
groupped load. We've fixed it by tweaking a bit the implementation: mark
masked loads as not vectorizable, but support them as an special case. Then
the detect them in the test for normal non-groupped loads that was already
there.
From-SVN: r271856
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2019-06-03 Richard Biener <rguenther@suse.de>
PR testsuite/90713
* gcc.dg/gimplefe-40.c: Add -maltivec for powerpc.
From-SVN: r271855
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2019-06-03 Martin Liska <mliska@suse.cz>
* cfg.c (debug): Use TDF_DETAILS for debug and
print edge info only once.
From-SVN: r271854
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2019-05-06 H.J. Lu <hongjiu.lu@intel.com>
Hongtao Liu <hongtao.liu@intel.com>
PR target/89750
PR target/86444
* config/i386/i386-expand.c (ix86_expand_sse_comi_round):
Modified, original implementation isn't correct.
2019-05-06 H.J. Lu <hongjiu.lu@intel.com>
Hongtao Liu <hongtao.liu@intel.com>
PR target/89750
PR target/86444
* gcc.target/i386/avx512f-vcomisd-2.c: New.
* gcc.target/i386/avx512f-vcomisd-2.c: Likewise.
Co-Authored-By: Hongtao Liu <hongtao.liu@intel.com>
From-SVN: r271853
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From-SVN: r271852
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-march=native starting with r271377)
2019-06-02 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/90539
* trans-expr.c (gfc_conv_subref_array_arg): If the size of the
expression can be determined to be one, treat it as contiguous.
Set likelyhood of presence of an actual argument according to
PRED_FORTRAN_ABSENT_DUMMY and likelyhood of being contiguous
according to PRED_FORTRAN_CONTIGUOUS.
2019-06-02 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/90539
* predict.def (PRED_FORTRAN_CONTIGUOUS): New predictor.
2019-06-02 Thomas Koenig <tkoenig@gcc.gnu.org>
PR fortran/90539
* gfortran.dg/internal_pack_24.f90: New test.
From-SVN: r271844
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From-SVN: r271843
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We don't have support for -mcmodel={medium, large, kernel} so don't
expect tests for those things to work.
For now mark them as xfail where possible and skip where that isn't.
These changes will be logged onto the PR and therefore can be backed
out when the facility is implemented.
gcc/testsuite/ChangeLog:
2019-06-01 Iain Sandoe <iain@sandoe.co.uk>
PR target/90698
* gcc.target/i386/pr49866.c: XFAIL for Darwin.
* gcc.target/i386/pr63538.c: Likewise.
* gcc.target/i386/pr61599-1.c: Skip for Darwin.
From-SVN: r271839
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pointer to array
gcc/ChangeLog:
PR middle-end/90694
* tree-pretty-print.c (dump_generic_node): Add parentheses.
gcc/testsuite/ChangeLog:
PR middle-end/90694
* gcc.dg/tree-ssa/dump-5.c: New test.
From-SVN: r271838
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* alias.c: Include ipa-utils.h.
(get_alias_set): Try to complete ODR type via ODR type hash lookup.
* ipa-devirt.c (prevailing_odr_type): New.
* ipa-utils.h (previaling_odr_type): Declare.
* g++.dg/lto/alias-1_0.C: New testcase.
* g++.dg/lto/alias-1_1.C: New testcase.
From-SVN: r271837
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From-SVN: r271836
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PR c++/85254
gcc/cp
PR c++/85254
* class.c (fixup_type_variants): Handle CLASSTYPE_FINAL.
testsuite/
PR c++/85254
* g++.dg/ext/is_final.C: Amend.
From-SVN: r271835
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From-SVN: r271832
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NOTE_INSN_DELETED_LABEL is used to mark what used to be a 'code_label',
but was not used for other purposes than taking its address which cannot
be used as target for indirect jumps.
Tested on Linux/x86-64 with -fcf-protection.
For x86-64 libc.so on glibc master branch (commit f43b8dd55588c3),
Before: 2961 endbr64
After: 2943 endbr64
gcc/
PR target/89355
* config/i386/i386-features.c (rest_of_insert_endbranch): Remove
NOTE_INSN_DELETED_LABEL check.
gcc/testsuite/
PR target/89355
* gcc.target/i386/cet-label-3.c: New test.
* gcc.target/i386/cet-label-4.c: Likewise.
* gcc.target/i386/cet-label-5.c: Likewise.
Co-Authored-By: Hongtao Liu <hongtao.liu@intel.com>
From-SVN: r271828
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fmadd/fmsub/maddv builtin.
* config/mips/mips.c (mips_expand_builtin_insn): Swap the 1st
and 3rd operands of the fmadd/fmsub/maddv builtin.
* gcc.target/mips/msa-fmadd.c: New.
From-SVN: r271826
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* tree.h (OMP_CLAUSE__CONDTEMP__ITER): Define.
* gimplify.c (gimplify_scan_omp_clauses): Allow lastprivate conditional
on OMP_SIMD if not nested inside of worksharing loop that also has
lastprivate conditional clause for the same decl.
(gimplify_omp_for): Add _condtemp_ clauses to OMP_SIMD if needed.
* omp-low.c (scan_sharing_clauses): Handle OMP_CLAUSE__CONDTEMP_ also
on simd.
(lower_rec_input_clauses): Likewise. Handle lastprivate conditional
on simd construct.
(lower_lastprivate_conditional_clauses): Handle lastprivate conditional
on simd construct.
(lower_lastprivate_clauses): Likewise.
(lower_omp_sections): Call lower_lastprivate_conditional_clauses before
calling lower_rec_input_clauses.
(lower_omp_for): Likewise.
(lower_omp_1): Use first rather than second OMP_CLAUSE__CONDTEMP_
clause on simd construct.
* omp-expand.c (expand_omp_simd): Initialize cond_var if
OMP_CLAUSE__CONDTEMP_ clause is present.
* c-c++-common/gomp/lastprivate-conditional-2.c (foo): Don't expect
a sorry on lastprivate conditional on simd construct.
* gcc.dg/vect/vect-simd-6.c: New test.
* gcc.dg/vect/vect-simd-7.c: New test.
From-SVN: r271825
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* omp-low.c (lower_rec_simd_input_clauses): Set TREE_THIS_NOTRAP on
ivar and lvar.
* gcc.dg/vect/vect-simd-5.c: New test.
From-SVN: r271824
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In particular, drop __go_type_descriptors_equal, which is no longer
used, and will be made obsolete by CL 179598.
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/179858
From-SVN: r271823
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The gc compiler recognizes append(s, make([]T, n)...), and
generates code to directly zero the tail instead of allocating a
new slice and copying. This CL lets the Go frontend do basically
the same.
The difficulty is that at the point we handle append, there may
already be temporaries introduced (e.g. in order_evaluations),
which makes it hard to find the append-of-make pattern. The
compiler could "see through" the value of a temporary, but it is
only safe to do if the temporary is not assigned multiple times.
For this, we add tracking of assignments and uses for temporaries.
This also helps in optimizing non-escape slice make. We already
optimize non-escape slice make with constant len/cap to stack
allocation. But it failed to handle things like f(make([]T, n))
(where the slice doesn't escape and n is constant), because of
the temporary. With tracking of temporary assignments and uses,
it can handle this now as well.
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/179597
From-SVN: r271822
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Currently, Type_conversion_expression::do_is_constant thinks the
int-to-string conversion is constant if the integer operand is
constant, but Type_conversion_expression::do_get_backend actually
generates a call to runtime.intstring if the integer does not fit
in a "ushort", which makes it not suitable in constant context,
such as static initializer.
This CL makes it handle all constant integer input as constant,
generating constant string.
Fixes golang/go#32347.
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/179777
From-SVN: r271821
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character)
PR c/43673
* c-format.c (print_char_table, scanf_char_table): Replace BADLEN with
TEX_D32, TEX_D64 or TEX_D128.
PR c/43673
* gcc.dg/format-dfp-printf-1.c: New test.
* gcc.dg/format-dfp-scanf-1.c: Likewise.
From-SVN: r271820
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Currently, goroutine switches are implemented with libc
getcontext/setcontext functions, which saves/restores the machine
register states and also the signal context. This does more than
what we need, and performs an expensive syscall.
This CL implements a simplified version of getcontext/setcontext,
in assembly, that only saves/restores the necessary part, i.e.
the callee-save registers, and the PC, SP. A simplified version
of makecontext, written in C, is also added. Currently this is
only implemented on Linux/AMD64.
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/178298
From-SVN: r271818
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2019-05-31 Marc Glisse <marc.glisse@inria.fr>
gcc/
* match.pd (~(vec?cst1:cst2)): New transformation.
gcc/testsuite/
* g++.dg/tree-ssa/cprop-vcond.C: New file.
From-SVN: r271817
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2019-05-31 Marc Glisse <marc.glisse@inria.fr>
gcc/
* match.pd (X/[ex]D<Y/[ex]D): Handle negative denominator.
((size_t)(A /[ex] B) CMP C): New transformation.
gcc/testsuite/
* gcc.dg/tree-ssa/cmpexactdiv-3.c: New file.
* gcc.dg/tree-ssa/cmpexactdiv-4.c: New file.
* gcc.dg/Walloca-13.c: Xfail.
From-SVN: r271816
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Several SVE patterns need define_insn_and_splits that generate the
same insn_code, but with different operands. That's probably a
niche requirement, but it's cropping up often enough on the ACLE
branch that I think it would be good to have a syntactic sugar for it.
This patch therefore adds a new construct called define_insn_and_rewrite.
It's basically a define_insn_and_split with an implicit split pattern,
obtained by copying the insn pattern and replacing match_operands with
match_dups and match_operators with match_op_dups.
2019-05-31 Richard Sandiford <richard.sandiford@arm.com>
gcc/
* doc/md.texi: Document define_insn_and_rewrite.
* rtl.def (DEFINE_INSN_AND_REWRITE): New rtx code.
* gensupport.c (queue_elem): Update comment.
(replace_operands_with_dups): New function.
(gen_rewrite_sequence): Likewise.
(process_rtx): Handle DEFINE_INSN_AND_REWRITE.
* read-rtl.c (apply_subst_iterator): Likewise.
(add_condition_to_rtx, named_rtx_p): Likewise.
(rtx_reader::read_rtx_operand): Likewise.
* config/aarch64/aarch64-sve.md
(while_ult<GPI:mode><PRED_ALL:mode>_cc): Rename to...
(*while_ult<GPI:mode><PRED_ALL:mode>_cc): ...this and use
define_insn_and_rewrite.
(*cond_<optab><mode>_any): Turn into define_insn_and_rewrites.
Remove separate define_split.
From-SVN: r271815
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* tree-ssa-alias.c (type_has_components_p): New function.
(aliasing_component_refs_p): Use it.
From-SVN: r271813
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https://gcc.gnu.org/ml/gcc-patches/2019-05/msg02126.html
* cp-tree.h (IDENTIFIER_LAMBDA_P): New.
(TYPE_ANON_P): New.
(LAMBDA_TYPE_P, TYPE_UNNAMED_P): Likewise.
(LAMBDANAME_PREFIX, LAMBDANAME_FORMAT): Delete.
(make_lambda_name): Don't declare.
* error.c (dump_aggr_type): Check for lambdas before other
anonymous names.
* lambda.c (begin_lambda_type): Use make_anon_name.
* cp-lang.c (cxx_dwarf_name): Lambda names smell anonymous.
* mangle.c (write_local_name): Likewise.
* name-lookup.c (lambda_cnt, make_lambda_name): Delete.
From-SVN: r271811
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2019-05-31 Bill Schmidt <wschmidt@linux.ibm.com>
Michael Meissner <meissner@linux.ibm.com>
* gcc.target/powerpc/cpu-future.c: Require powerpc_future_ok.
* gcc.target/powerpc/localentry-1.c: Likewise.
* gcc.target/powerpc/localentry-direct-1.c: Likewise.
* gcc.target/powerpc/notoc-direct-1.c: Likewise.
* gcc.target/powerpc/pcrel-sibcall-1.c: Likewise.
* lib/target-supports.exp (check_powerpc_future_hw_available): New.
(check_effective_target_powerpc_future_ok): New.
Co-Authored-By: Michael Meissner <meissner@linux.ibm.com>
From-SVN: r271810
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2019-05-31 Martin Liska <mliska@suse.cz>
* gdbhooks.py: Add const_tree to TreePrinter.
From-SVN: r271804
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globals)
2019-05-31 Thomas De Schampheleire <thomas.de_schampheleire@nokia.com>
PR debug/86964
* common.opt (feliminate-unused-debug-symbols): Enable by default.
* doc/invoke.texi (Debugging Options): Document new default of
-feliminate-unused-debug-symbols and remove restriction to 'stabs'.
* g++.dg/debug/dwarf2/fesd-any.C: Use
-fno-eliminate-unused-debug-symbols.
* g++.dg/debug/dwarf2/fesd-baseonly.C: Likewise.
* g++.dg/debug/dwarf2/fesd-none.C: Likewise.
* g++.dg/debug/dwarf2/fesd-reduced.C: Likewise.
* g++.dg/debug/dwarf2/fesd-sys.C: Likewise.
* g++.dg/debug/dwarf2/inline-var-1.C: Likewise.
* g++.dg/debug/enum-2.C: Likewise.
* gcc.dg/debug/dwarf2/fesd-any.c: Likewise.
* gcc.dg/debug/dwarf2/fesd-baseonly.c: Likewise.
* gcc.dg/debug/dwarf2/fesd-none.c: Likewise.
* gcc.dg/debug/dwarf2/fesd-reduced.c: Likewise.
* gcc.dg/debug/dwarf2/fesd-sys.c: Likewise.
From-SVN: r271803
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enabled in gsi_split_seq_after, at gimple-iterator.c:345)
PR tree-optimization/90671
* tree-ssa-threadupdate.c (ssa_create_duplicates): If
template_block used to be empty on the first call, don't use
gsi_split_seq_after and gsi_insert_seq_after, but remember whole
seq with bb_seq and set it with set_bb_seq.
* gcc.dg/torture/pr90671.c: New test.
From-SVN: r271802
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The test for pr84497 uses a facility that requires alias support from
the target, and therefore fails on targets without. Add a suitable
dg-require statement.
2019-05-31 Iain Sandoe <iain@sandoe.co.uk>
* g++.dg/cpp0x/pr84497.C: Require alias support.
From-SVN: r271801
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Darwin has a .align taking a power of 2 by default, so that some
tests expecting a byte count are failing, fixed thus.
gcc/testsuite/
2019-05-31 Iain Sandoe <iain@sandoe.co.uk>
* gcc.target/i386/falign-functions-3.c: Adjust align syntax
and label for Darwin.
* gcc.target/i386/attr-aligned-2.c: Adjust align syntax for
Darwin.
From-SVN: r271800
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.p2align support is present in all x86 assemblers on released
Darwin systems.
gcc/
2019-05-29 Iain Sandoe <iain@sandoe.co.uk>
* config/i386/darwin.h (ASM_OUTPUT_MAX_SKIP_ALIGN): New.
From-SVN: r271799
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