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2014-09-25re PR c++/61945 (tree check fail with -Woverloaded-virtual)Marek Polacek4-1/+23
PR c++/61945 * class.c (warn_hidden): Check for FUNCTION_DECL. * g++.dg/warn/pr61945.C: New test. From-SVN: r215597
2014-09-25AVX-512. Extend `perm' insn patterns.Alexander Ivchenko2-8/+26
gcc/ * config/i386/sse.md (define_expand "<avx2_avx512f>_perm<mode>"): Rename to ... (define_expand "<avx2_avx512>_perm<mode>"): ... this. (define_expand "avx512f_perm<mode>_mask"): Rename to ... (define_expand "<avx512>_perm<mode>_mask"): ... this. Use VI8F_256_512 mode iterator. (define_insn "<avx2_avx512f>_perm<mode>_1<mask_name>"): Rename to ... (define_insn "<avx2_avx512>_perm<mode>_1<mask_name>"): ... this. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> From-SVN: r215590
2014-09-25AVX-512. Add mov[dlh]dup insns support.Alexander Ivchenko2-28/+45
gcc/ * config/i386/sse.md (define_insn "avx_movshdup256<mask_name>"): Add masking. (define_insn "sse3_movshdup<mask_name>"): Ditto. (define_insn "avx_movsldup256<mask_name>"): Ditto. (define_insn "sse3_movsldup<mask_name>"): Ditto. (define_insn "vec_dupv2df<mask_name>"): Ditto. (define_insn "*vec_concatv2df"): Add EVEX version. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> From-SVN: r215589
2014-09-25AVX-512. Update vec_set<mode>_0 pattern.Alexander Ivchenko2-3/+15
gcc/ * config/i386/sse.md (define_insn "vec_set<mode>_0"): Add EVEX version. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> From-SVN: r215588
2014-09-25AVX-512. Add convert ps2pd and ps2dq.Alexander Ivchenko2-17/+83
gcc/ * config/i386/sse.md (define_insn "<fixsuffix>fix_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>"): New. (define_insn "<fixsuffix>fix_truncv2sfv2di2<mask_name>"): Ditto. (define_insn "ufix_trunc<mode><sseintvecmodelower>2<mask_name>"): Ditto. (define_insn "sse2_cvtss2sd<round_saeonly_name>"): Change "nonimmediate_operand" to "<round_saeonly_nimm_predicate>". (define_insn "avx_cvtpd2ps256<mask_name>"): Add masking. (define_expand "sse2_cvtpd2ps_mask): New. (define_insn "*sse2_cvtpd2ps<mask_name>"): Add masking. (define_insn "sse2_cvtps2pd<mask_name>"): Add masking. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> From-SVN: r215586
2014-09-25AVX-512. Add pd2dq and dq2pd converts.Alexander Ivchenko3-63/+82
gcc/ * config/i386/i386.c (avx512f_ufix_notruncv8dfv8si_mask_round): Rename to ... (ufix_notruncv8dfv8si2_mask_round): ... this. * config/i386/sse.md (define_insn "avx512f_cvtdq2pd512_2): Update TARGET check. (define_insn "avx_cvtdq2pd256_2"): Add EVEX version. (define_insn "sse2_cvtdq2pd<mask_name>"): Add masking. (define_insn "avx_cvtpd2dq256<mask_name>"): Ditto. (define_expand "sse2_cvtpd2dq"): Delete. (define_insn "sse2_cvtpd2dq<mask_name>"): Add masking and make 2nd operand const0 vector. (define_insn "avx512f_ufix_notruncv8dfv8si<mask_name><round_name>"): Delete. (define_mode_attr pd2udqsuff): New. (define_insn "ufix_notrunc<mode><si2dfmodelower>2<mask_name><round_name>"): Ditto. (define_insn "ufix_notruncv2dfv2si2<mask_name>"): Ditto. (define_insn "*avx_cvttpd2dq256_2"): Delete. (define_expand "sse2_cvttpd2dq"): Ditto. (define_insn "sse2_cvttpd2dq<mask_name>"): Add masking and make 2nd operand const0 vector. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> From-SVN: r215584
2014-09-25re PR tree-optimization/63341 (Vectorization miscompilation with -mcpu=power7)Jakub Jelinek7-8/+115
PR tree-optimization/63341 * tree-vectorizer.h (vect_create_data_ref_ptr, vect_create_addr_base_for_vector_ref): Add another tree argument defaulting to NULL_TREE. * tree-vect-data-refs.c (vect_create_data_ref_ptr): Add byte_offset argument, pass it down to vect_create_addr_base_for_vector_ref. (vect_create_addr_base_for_vector_ref): Add byte_offset argument, add that to base_offset too if non-NULL. * tree-vect-stmts.c (vectorizable_load): Add byte_offset variable, for dr_explicit_realign_optimized set it to vector byte size - 1 instead of setting offset, pass byte_offset down to vect_create_data_ref_ptr. * gcc.dg/vect/pr63341-1.c: New test. * gcc.dg/vect/pr63341-2.c: New test. From-SVN: r215583
2014-09-25[multiple changes]Andreas Krebbel6-34/+131
2014-09-25 Andreas Arnez <arnez@linux.vnet.ibm.com> PR 63300/debug * tree.c (check_base_type): New. (check_qualified_type): Exploit new helper function above. * tree.h (check_base_type): New prototype. * dwarf2out.c (get_nearest_type_subqualifiers): New. (modified_type_die): Fix handling for qualifiers. Qualifiers to "peel off" are now determined using get_nearest_type_subqualifiers. 2014-09-25 Mark Wielaard <mjw@redhat.com> PR 63300/debug * gcc.dg/debug/dwarf2/stacked-qualified-types-1.c: New testcase. * gcc.dg/debug/dwarf2/stacked-qualified-types-2.c: Likewise. * gcc.dg/guality/pr63300-const-volatile.c: New testcase. From-SVN: r215582
2014-09-25re PR c++/63249 ([OpenMP] Spurious »set but not used« warnings when ↵Jakub Jelinek7-2/+81
actually used in OpenMP target's array section's lower-bound and length) PR c++/63249 * semantics.c (handle_omp_array_sections_1): Call mark_rvalue_use on low_bound and length. * g++.dg/gomp/pr63249.C: New test. * c-c++-common/gomp/pr63249.c: New test. 2014-09-25 Thomas Schwinge <thomas@codesourcery.com> PR c++/63249 * c-parser.c (c_parser_omp_variable_list): Call mark_exp_read on low_bound and length. From-SVN: r215580
2014-09-25check.c (check_co_collective): Renamed fromTobias Burnus15-28/+458
2014-09-25 Tobias Burnus <burnus@net-b.de> gcc/fortran * check.c (check_co_collective): Renamed from * check_co_minmaxsum, handle co_reduce. (gfc_check_co_minmax, gfc_check_co_sum): Update call. (gfc_check_co_broadcast, gfc_check_co_reduce): New. * gfortran.h (gfc_isym_id): Add GFC_ISYM_CO_BROADCAST and GFC_ISYM_CO_REDUCE. * intrinsic.c (add_subroutines): Add co_reduce and co_broadcast. * intrinsic.h (gfc_check_co_broadcast, gfc_check_co_reduce): Add proto types. * intrinsic.texi (CO_BROADCAST): Add. * trans.h (gfor_fndecl_co_broadcast): New. * trans-decl.c (gfor_fndecl_co_broadcast): Ditto. (gfc_build_builtin_function_decls): Add decl for it, * trans-intrinsic.c (conv_co_collective): Renamed from conv_co_minmaxsum. Handle co_reduce. (gfc_conv_intrinsic_subroutine): Handle co_reduce. gcc/testsuite/ * gfortran.dg/coarray/collectives_3.f90: New. * gfortran.dg/coarray_collectives_9.f90: New. * gfortran.dg/coarray_collectives_10.f90: New. * gfortran.dg/coarray_collectives_11.f90: New. * gfortran.dg/coarray_collectives_12.f90: New. libgfortran/ * caf/libcaf.h (_gfortran_caf_co_broadcast): New prototype. * caf/single.c (_gfortran_caf_co_broadcast): New. From-SVN: r215579
2014-09-25ipa-devirt.c (possible_polymorphic_call_targets): Remove forgotten debug ↵Jan Hubicka2-1/+15
output; canonicalize querries more wtih LTO. * ipa-devirt.c (possible_polymorphic_call_targets): Remove forgotten debug output; canonicalize querries more wtih LTO. From-SVN: r215577
2014-09-25Fix previous commit.Jan Hubicka1-8/+8
From-SVN: r215576
2014-09-25cgraph.h (class ipa_polymorphic_call_context): Move here from ipa-utils.h; ↵Jan Hubicka6-206/+278
add stream_int and stream_out methods. * cgraph.h (class ipa_polymorphic_call_context): Move here from ipa-utils.h; add stream_int and stream_out methods. (cgraph_indirect_call_info): Remove SPECILATIVE_OFFSET, OUTER_TYPE, SPECULATIVE_OUTER_TYPE, MAYBE_IN_CONSTRUCTION MAYBE_DERIVED_TYPE and SPECULATIEVE_MAYBE_DERIVED_TYPE; add CONTEXT. (ipa_polymorphic_call_context::ipa_polymorphic_call_context, ipa_polymorphic_call_context::ipa_polymorphic_call_context, ipa_polymorphic_call_context::clear_speculation, ipa_polymorphic_call_context::clear_outer_type): Move here from ipa-utils.h * ipa-utils.h (class ipa_polymorphic_call_context): Move to cgraph.h (ipa_polymorphic_call_context::ipa_polymorphic_call_context, ipa_polymorphic_call_context::ipa_polymorphic_call_context, ipa_polymorphic_call_context::clear_speculation, ipa_polymorphic_call_context::clear_outer_type): Likewise. * ipa-devirt.c: Include data-streamer.h, lto-streamer.h and streamer-hooks.h (ipa_polymorphic_call_context::stream_out): New method. (ipa_polymorphic_call_context::stream_in): New method. (noncall_stmt_may_be_vtbl_ptr_store): Add forgotten static. * ipa-prop.c (ipa_analyze_indirect_call_uses): Do not care about OUTER_TYPE. (ipa_analyze_call_uses): Simplify. (update_indirect_edges_after_inlining): Do not care about outer_type. (ipa_write_indirect_edge_info): Update. (ipa_write_indirect_edge_info): Likewise. * cgraph.c (cgraph_node::create_indirect_edge): Simplify. (dump_edge_flags): Break out from ... (cgraph_node::dump): ... here; dump indirect edges. From-SVN: r215575
2014-09-25Daily bump.GCC Administrator1-1/+1
From-SVN: r215574
2014-09-24ipa-utils.h (polymorphic_call_context): Add metdhos dump, debug and ↵Jan Hubicka4-124/+314
clear_outer_type. * ipa-utils.h (polymorphic_call_context): Add metdhos dump, debug and clear_outer_type. (ipa_polymorphic_call_context::ipa_polymorphic_call_context): Simplify. (ipa_polymorphic_call_context::clear_outer_type): New method. * ipa-prop.c (ipa_analyze_call_uses): Do not overwrite offset. * ipa-devirt.c (types_odr_comparable): New function. (types_must_be_same_for_odr): New function. (odr_subtypes_equivalent_p): Simplify. (possible_placement_new): Break out from ... (ipa_polymorphic_call_context::restrict_to_inner_type): ... here; be more cuatious about returning false in cases the context may be valid in derived type or via placement new. (contains_type_p): Clear maybe_derived_type (ipa_polymorphic_call_context::dump): New method. (ipa_polymorphic_call_context::debug): New method. (ipa_polymorphic_call_context::set_by_decl): Cleanup comment. (ipa_polymorphic_call_context::set_by_invariant): Simplify. (ipa_polymorphic_call_context::ipa_polymorphic_call_context): Simplify. (possible_polymorphic_call_targets): Trust context.restrict_to_inner_class to suceed on all valid cases; remove confused sanity check. (dump_possible_polymorphic_call_targets): Simplify. From-SVN: r215569
2014-09-24cgraph.h, [...]: Rename all instances of DECL_ABSTRACT to DECL_ABSTRACT_P.Aldy Hernandez21-41/+59
* cgraph.h, dbxout.c, dwarfout2.c, gimple-fold.c, lto-streamer-out.c, print-tree.c, symtab.c, tree-inline.c, tree-streamer-in.c, tree-streamer-out.c, tree.c, tree.h, varpool.c: Rename all instances of DECL_ABSTRACT to DECL_ABSTRACT_P. cp/ * class.c, decl.c, optimize.c: Rename all instances of DECL_ABSTRACT to DECL_ABSTRACT_P. lto/ * lto-symtab.c, lto.c: Rename all instances of DECL_ABSTRACT to DECL_ABSTRACT_P. From-SVN: r215567
2014-09-24rs6000.c (insn_is_swappable_p): Don't provide special handling for stores ↵Bill Schmidt4-4/+29
whose SET_SRC is an UNSPEC (such as... [gcc] 2014-09-24 Bill Schmidt <wschmidt@linux.vnet.ibm.com> * config/rs6000/rs6000.c (insn_is_swappable_p): Don't provide special handling for stores whose SET_SRC is an UNSPEC (such as UNSPEC_STVE). [gcc/testsuite] 2014-09-24 Bill Schmidt <wschmidt@linux.vnet.ibm.com> * gcc.target/powerpc/swaps-p8-17.c: New test. From-SVN: r215564
2014-09-24Improve prepare_shrink_wrap to sink more instructionsJiong Wang4-6/+76
gcc/ * shrink-wrap.c (move_insn_for_shrink_wrap): Add further check when !REG_P (src) to release more instruction sink opportunities. gcc/testsuite/ * gcc.target/aarch64/shrink_wrap_symbol_ref_1.c: New testcase. From-SVN: r215563
2014-09-24[AArch64] Improve regmove_costs for 128-bit types.Wilco Dijkstra2-8/+26
2014-09-24 Wilco Dijkstra <wdijkstr@arm.com> gcc/ * config/aarch64/aarch64.c (aarch64_register_move_cost): Add register move costs for 128-bit types. From-SVN: r215562
2014-09-24ipa-prop.c (ipa_edge_duplication_hook): Update controlled_use_count when ↵Martin Jambor2-0/+21
duplicating a PASS_THROUGH jump function when... 2014-09-24 Martin Jambor <mjambor@suse.cz> * ipa-prop.c (ipa_edge_duplication_hook): Update controlled_use_count when duplicating a PASS_THROUGH jump function when creating a speculative edge. From-SVN: r215560
2014-09-24re PR c/61405 (Not emitting "enumeration value not handled in switch" ↵Marek Polacek18-17/+127
warning for bit-field enums) PR c/61405 PR c/53874 gcc/ * asan.c (maybe_instrument_call): Add default case. * ipa-pure-const.c (special_builtin_state): Likewise. * predict.c (expr_expected_value_1): Likewise. * lto-streamer-out.c (write_symbol): Initialize variable. gcc/c-family/ * c-common.h (struct c_common_resword): Don't define CPP_KEYWORD. gcc/c/ * c-parser.c: Don't define CPP_KEYWORD. (c_parser_switch_statement): Pass original type to c_finish_case. * c-tree.h (c_finish_case): Update declaration. * c-typeck.c (c_finish_case): Add TYPE parameter. Pass it conditionally to c_do_switch_warnings. gcc/cp/ * semantics.c (finish_switch_cond): Call unlowered_expr_type. * tree.c (bot_manip): Add default case. * parser.c (cp_parser_primary_expression): Cast the controlling expression of a switch to an int. (cp_parser_unqualified_id): Likewise. gcc/testsuite/ * c-c++-common/pr53874.c: New test. * c-c++-common/pr61405.c: New test. libcpp/ * include/cpplib.h (enum cpp_ttype): Define CPP_KEYWORD. From-SVN: r215559
2014-09-24[AArch64] Use __aarch64_vget_lane* macros for getting the lane in some lane ↵Kyrylo Tkachov4-4/+44
multiply intrinsics. * config/aarch64/arm_neon.h (vmuld_lane_f64): Use macro for getting the lane. (vmuld_laneq_f64): Likewise. (vmuls_lane_f32): Likewise. (vmuls_laneq_f32): Likewise. * gcc.target/aarch64/simd/vmul_lane_const_lane_1.c: New test. From-SVN: r215553
2014-09-24re PR bootstrap/63235 (building fails with --disable-bootstrap)Kirill Yukhin2-1/+7
PR bootstrap/63235 gcc/ * varpool.c (varpool_node::add): Pass decl attributes to lookup_attribute. From-SVN: r215552
2014-09-24re PR sanitizer/63316 (False asan positive)Jakub Jelinek4-11/+50
PR sanitizer/63316 * asan.c (asan_expand_check_ifn): Fix up align >= 8 optimization. * c-c++-common/asan/pr63316.c: New test. From-SVN: r215547
2014-09-24re PR tree-optimization/63266 (Test regression: gcc.target/sh/pr53568-1.c)Thomas Preud'homme4-19/+61
2014-09-24 Thomas Preud'homme <thomas.preudhomme@arm.com> gcc/ PR tree-optimization/63266 * tree-ssa-math-opts.c (struct symbolic_number): Add comment about marker for unknown byte value. (MARKER_MASK): New macro. (MARKER_BYTE_UNKNOWN): New macro. (HEAD_MARKER): New macro. (do_shift_rotate): Mark bytes with unknown values due to sign extension when doing an arithmetic right shift. Replace hardcoded mask for marker by new MARKER_MASK macro. (find_bswap_or_nop_1): Likewise and adjust ORing of two symbolic numbers accordingly. gcc/testsuite/ PR tree-optimization/63266 * gcc.dg/optimize-bswapsi-1.c (swap32_d): New bswap pass test. From-SVN: r215546
2014-09-24AVX-512. Add cvtps2 insn patterns.Alexander Ivchenko2-15/+31
gcc/ * config/i386/sse.md (define_insn "<sse2_avx_avx512f>_fix_notrunc<sf2simodelower><mode><mask_name>"): Add masking. (define_insn "fix_truncv8sfv8si2<mask_name>"): Ditto. (define_insn "fix_truncv4sfv4si2<mask_name>"): Ditto. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> From-SVN: r215545
2014-09-24AVX-512. Add vpshuf[lh]w insn patterns.Alexander Ivchenko2-20/+152
gcc/ * config/i386/sse.md (define_c_enum "unspec"): Add UNSPEC_PSHUFHW, UNSPEC_PSHUFLW. (define_insn "<mask_codefor>avx512bw_pshuflwv32hi<mask_name>"): New. (define_expand "avx512vl_pshuflwv3_mask"): Ditto. (define_insn "avx2_pshuflw_1<mask_name>"): Add masking. (define_expand "avx512vl_pshuflw_mask"): New. (define_insn "sse2_pshuflw_1<mask_name>"): Add masking. (define_insn "<mask_codefor>avx512bw_pshufhwv32hi<mask_name>"): New. (define_expand "avx512vl_pshufhwv3_mask"): Ditto. (define_insn "avx2_pshufhw_1<mask_name>"): Add masking. (define_expand "avx512vl_pshufhw_mask"): New. (define_insn "sse2_pshufhw_1<mask_name>"): Add masking. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> From-SVN: r215544
2014-09-24AVX-512. Add shuffles (pd, 32x4, etc.).Alexander Ivchenko3-11/+188
gcc/ * config/i386/i386.c (ix86_expand_args_builtin): Handle CODE_FOR_sse2_shufpd, CODE_FOR_sse2_sse2_shufpd_mask, CODE_FOR_sse2_avx512dq_shuf_f64x2_mask, CODE_FOR_sse2_avx512dq_shuf_i64x2_mask, CODE_FOR_sse2_avx512vl_shuf_i32x4_mask and CODE_FOR_sse2_avx512vl_shuf_f32x4_mask. * config/i386/sse.md (define_expand "avx512dq_shuf_<shuffletype>64x2_mask"): New. (define_insn "<mask_codefor>avx512dq_shuf_<shuffletype>64x2_1<mask_name>"): Ditto. (define_expand "avx512vl_shuf_<shuffletype>32x4_mask"): Ditto. (define_insn "<mask_codefor>avx512vl_shuf_<shuffletype>32x4_1<mask_name>"): Ditto. (define_expand "avx512vl_pshufdv3_mask"): Ditto. (define_insn "avx2_pshufd_1<mask_name>"): Add masking. (define_expand "avx512vl_pshufd_mask"): New. (define_insn "sse2_pshufd_1<mask_name>"): Add masking. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> From-SVN: r215543
2014-09-24AVX-512. Add insert insn patterns.Alexander Ivchenko3-151/+186
gcc/ * config/i386/i386.c (CODE_FOR_avx2_extracti128): Rename to ... (CODE_FOR_avx_vextractf128v4di): this. (CODE_FOR_avx2_inserti128): Rename to ... (CODE_FOR_avx_vinsertf128v4di): this. (ix86_expand_args_builtin): Handle CODE_FOR_avx_vinsertf128v4di, CODE_FOR_avx_vextractf128v4di. (ix86_expand_args_builtin): Handle CODE_FOR_avx512dq_vinsertf32x8_mask, CODE_FOR_avx512dq_vinserti32x8_mask, CODE_FOR_avx512vl_vinsertv4df, CODE_FOR_avx512vl_vinsertv4di, CODE_FOR_avx512vl_vinsertv8sf, CODE_FOR_avx512vl_vinsertv8si. * config/i386/sse.md (define_expand "<extract_type>_vinsert<shuffletype><extract_suf>_mask"): Use AVX512_VEC mode iterator. (define_insn "<mask_codefor><extract_type>_vinsert<shuffletype><extract_suf>_1<mask_name>"): Ditto. (define_expand "<extract_type_2>_vinsert<shuffletype><extract_suf_2>_mask"): Use AVX512_VEC_2 mode iterator. (define_insn "vec_set_lo_<mode><mask_name>"): New. (define_insn "vec_set_hi_<mode><mask_name>"): Ditto. (define_expand "avx512vl_vinsert<mode>"): Ditto. (define_insn "avx2_vec_set_lo_v4di"): Delete. (define_insn "avx2_vec_set_hi_v4di"): Ditto. (define_insn "vec_set_lo_<mode><mask_name>"): Add masking. (define_insn "vec_set_hi_<mode><mask_name>"): Ditto. (define_insn "vec_set_lo_<mode><mask_name>"): Ditto. (define_insn "vec_set_hi_<mode><mask_name>"): Ditto. (define_expand "avx2_extracti128"): Delete. (define_expand "avx2_inserti128"): Ditto. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> From-SVN: r215542
2014-09-24AVX-512. Add widening pmov.Alexander Ivchenko2-65/+101
gcc/ * config/i386/sse.md (define_insn "avx2_<code>v16qiv16hi2<mask_name>"): Add masking. (define_insn "avx512bw_<code>v32qiv32hi2<mask_name>"): New. (define_insn "sse4_1_<code>v8qiv8hi2<mask_name>"): Add masking. (define_insn "avx2_<code>v8qiv8si2<mask_name>"): Ditto. (define_insn "sse4_1_<code>v4qiv4si2<mask_name>"): Ditto. (define_insn "avx2_<code>v8hiv8si2<mask_name>"): Ditto. (define_insn "sse4_1_<code>v4hiv4si2<mask_name>"): Ditto. (define_insn "avx2_<code>v4qiv4di2<mask_name>"): Ditto. (define_insn "sse4_1_<code>v2qiv2di2<mask_name>"): Ditto. (define_insn "avx2_<code>v4hiv4di2<mask_name>"): Ditto. (define_insn "sse4_1_<code>v2hiv2di2<mask_name>"): Ditto. (define_insn "avx2_<code>v4siv4di2<mask_name>"): Ditto. (define_insn "sse4_1_<code>v2siv2di2<mask_name>"): Ditto. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> From-SVN: r215541
2014-09-24re PR rtl-optimization/63210 (ira does not select the best register compared ↵Zhenqiang Chen4-1/+29
with gcc 4.8 for ARM THUMB1) ChangeLog: 2014-09-24 Zhenqiang Chen <zhenqiang.chen@arm.com> PR rtl-optimization/63210 * ira-color.c (assign_hard_reg): Ignore conflict cost if the HARD_REGNO is not availabe for CONFLICT_A. testsuite/ChangeLog: 2014-09-24 Zhenqiang Chen <zhenqiang.chen@arm.com> * gcc.target/arm/pr63210.c: New test. From-SVN: r215540
2014-09-24Add test cases for noreorderAndi Kleen5-0/+71
Add some simple test cases for noreorder behaving like -fno-toplevel-reorder and -fno-toplevel-reorder still working. gcc/testsuite/: 2014-09-23 Andi Kleen <ak@linux.intel.com> * gcc.dg/noreorder.c: New test. * gcc.dg/noreorder2.c: New test. * gcc.dg/noreorder3.c: New test. * gcc.dg/noreorder4.c: New test. From-SVN: r215538
2014-09-24Add an no_reorder attribute for LTOAndi Kleen14-75/+201
Some projects need to prevent reordering of specific top level declarations with LTO, in particular declarations defining init calls. The only way to do that with LTO was to use -fno-toplevel-reorder, which stops reordering for all declarations and makes LTO partitioning less efficient. This patch adds a new no_reorder attribute that stops reordering only for the marked declaration. The program can then only mark e.g. the initcalls and leave all the other declarations alone. The patch does: - Adds the new no_reorder attribute for the C family. - Initializes a new no_reorder flag in the symtab_nodes in the function visibility flag. - Maintains the no_reorder flag when creating new nodes. - Changes the partition code to always keep a separate sorted queue of ordered nodes and flush them in order with the other nodes. This is used by all nodes with -fno-toplevel-reorder, and only the marked ones without it. Parts of the old -fno-toplevel-reorder code paths are reused. - Adds various checks throughout the tree to make no_reorder marked functions behave the same as with -fno-toplevel-reorder - Changes the LTO streamer to serialize the no_reorder attribute. gcc/c-family/: 2014-09-23 Andi Kleen <ak@linux.intel.com> * c-common.c (handle_no_reorder_attribute): New function. (c_common_attribute_table): Add no_reorder attribute. gcc/: 2014-09-23 Andi Kleen <ak@linux.intel.com> * cgraph.h (symtab_node): Add no_reorder attribute. (symbol_table::output_asm_statements): Remove. * cgraphclones.c (cgraph_node::create_clone): Copy no_reorder. (cgraph_node::create_version_clone): Dito. (symbol_table::output_asm_statements): Remove. * trans-mem.c (ipa_tm_create_version_alias): Dito. * cgraphunit.c (varpool_node::finalize_decl): Check no_reorder. (output_in_order): Add no_reorder flag. Only handle no_reorder nodes when set. (symbol_table::compile): Add separate pass for no_reorder nodes. (process_common_attributes): Set no_reorder flag in symtab node. Add node argument. (process_function_and_variable_attributes): Pass symtab nodes to process_common_attributes. * doc/extend.texi (no_reorder): Document no_reorder attribute. * lto-cgraph.c (lto_output_node): Serialize no_reorder. (lto_output_varpool_node): Dito. (input_overwrite_node): Dito. (input_varpool_node): Dito. * varpool.c (varpool_node::add): Set no_reorder attribute. (symbol_table::remove_unreferenced_decls): Handle no_reorder. (symbol_table::output_variables): Dito. * symtab.c (symtab_node::dump_base): Print no_reorder. gcc/lto/: 2014-09-23 Andi Kleen <ak@linux.intel.com> * lto-partition.c (node_cmp): Update comment. (varpool_node_cmp): Use symtab_node for comparison. (add_sorted_nodes): New function. (lto_balanced_map): Change to keep ordered queue of ordered node. Handle no_reorder attribute. From-SVN: r215537
2014-09-24Daily bump.GCC Administrator1-1/+1
From-SVN: r215536
2014-09-23Fix compile time warning caused by PIC_OFFSET_TABLE_REGNUM be INVALID_REGNUMJiong Wang2-1/+6
2014-09-23 Jiong Wang <jiong.wang@arm.com> gcc/ * shrink-wrap.c (try_shrink_wrapping): Check PIC_OFFSET_TABLE_REGNUM not be INVALID_REGNUM. From-SVN: r215533
2014-09-23Properly regenerate gcc/configure.Thomas Schwinge2-30/+6
gcc/ * configure: Regenerate. From-SVN: r215532
2014-09-23Relax check against commuting XOR and ASHIFTRT in combine.cAlan Lawrence7-13/+64
gcc/: * combine.c (simplify_shift_const_1): Allow commuting (ashiftrt (xor)) when result_mode == shift_mode. gcc/testsuite/: * gcc.dg/combine_ashiftrt_1.c: New test. * gcc.dg/combine_ashiftrt_2.c: Likewise. * gcc.target/aarch64/singleton_intrinsics_1.c: Remove scan-assembler workarounds for cmge. * gcc.target/aarch64/simd/int_comparisons_1.c: Likewise; also check for absence of mvn. From-SVN: r215531
2014-09-23re PR c++/61857 (An init-capturing lambda is parsed incorrectly when used in ↵Paolo Carlini4-4/+101
a braced-init-list) /cp 2014-09-23 Paolo Carlini <paolo.carlini@oracle.com> PR c++/61857 * parser.c (cp_parser_skip_to_closing_square_bracket, cp_parser_array_designator_p): New. (cp_parser_initializer_list): Use the latter. /testsuite 2014-09-23 Paolo Carlini <paolo.carlini@oracle.com> PR c++/61857 * g++.dg/cpp1y/lambda-init10.C: New. From-SVN: r215528
2014-09-23[libsanitizer merge from upstream r218156]Kostya Serebryany3-5/+20
From-SVN: r215527
2014-09-23rs6000.md (f32_vsx): New mode attributes to refine the constraints used on ↵Michael Meissner2-10/+46
32/64-bit floating point... 2014-09-23 Michael Meissner <meissner@linux.vnet.ibm.com> * config/rs6000/rs6000.md (f32_vsx): New mode attributes to refine the constraints used on 32/64-bit floating point moves. (f32_av): Likewise. (f64_vsx): Likewise. (f64_dm): Likewise. (f64_av): Likewise. (BOOL_REGS_OUTPUT): Use wt constraint for TImode instead of wa. (BOOL_REGS_OP1): Likewise. (BOOL_REGS_OP2): Likewise. (BOOL_REGS_UNARY): Likewise. (mov<mode>_hardfloat, SFmode/SDmode): Tighten down constraints for 32/64-bit floating point moves. Do not use wa, instead use ww/ws for moves involving VSX registers. Do not use constraints that target VSX registers for decimal types. (mov<mode>_hardfloat32, DFmode/DDmode): Likewise. (mov<mode>_hardfloat64, DFmode/DDmode): Likewise. From-SVN: r215521
2014-09-23tree.h (int_bit_position): Turn into inline function; implement using wide int.Jan Hubicka3-11/+16
* tree.h (int_bit_position): Turn into inline function; implement using wide int. * tree.c (int_bit_position): Remove. From-SVN: r215518
2014-09-23re PR fortran/63331 (Fortran -fcompare-debug issues)Jakub Jelinek4-2/+20
PR fortran/63331 * trans-types.c (gfc_get_array_descr_info): Build DEBUG_EXPR_DECL instead of VAR_DECL for base_decl. * gfortran.dg/pr63331.f90: New test. From-SVN: r215516
2014-09-23re PR bootstrap/63280 (Double free in GCC compiled with LTO and -O3.)Richard Sandiford2-1/+7
gcc/ PR bootstrap/63280 * target-globals.c (target_globals::~target_globals): Fix location of ira_int destruction. From-SVN: r215515
2014-09-23[AArch64] Enable shrink wrapping.Renlin Li8-3/+50
From-SVN: r215508
2014-09-23[AArch64] Default to -fsched-pressureWilco Dijkstra2-0/+8
From-SVN: r215503
2014-09-23Make all gcc.dg/guality/const-volatile.c subtests PASS under LTO.Mark Wielaard2-8/+19
Some subtests were reported as UNSUPPORTED when running under LTO. That was just because the relevant variables were optimized out. Mark those variables as used. Now const-volatile reports 192 PASS. gcc/testsuite/ChangeLog * gcc.dg/guality/const-volatile.c (i): Mark as used. (ci): Likewise. (pci): Likewise. (pvi): Likewise. (pcvi): Likewise. (cip): Likewise. (foo): Likewise. (cfoo): Likewise. From-SVN: r215502
2014-09-23gcc-gdb-test.exp: Handle old GDB "short int" and "long int" types.Mark Wielaard3-0/+23
Old GDB might show short and long as short int and long int. This made gcc.dg/guality/const-volatile.c ans restrict.c fail on older GDBs. According to the patch that changed this in newer versions of GDB this was a bug: https://sourceware.org/ml/gdb-patches/2012-09/msg00455.html The patch transforms the types "short int" and "long int" coming from GDB to plain "short" and "long". And a variant has been added to the const-volatile.c testcase to make sure short and long long are handled correctly now with older GDB. gcc/testsuite/ChangeLog * lib/gcc-gdb-test.exp (gdb-test): Transform gdb types "short int" and "long int" to plain "short" and "long". * gcc.dg/guality/const-volatile.c (struct bar): New struct containing short and long long fields. (bar): New variable to test the type. From-SVN: r215501
2014-09-23cfgcleanup.c (try_optimize_cfg): Do not remove label with LABEL_PRESERVE_P ↵Ilya Enkovich2-0/+6
flag set. gcc/ * cfgcleanup.c (try_optimize_cfg): Do not remove label with LABEL_PRESERVE_P flag set. From-SVN: r215498
2014-09-23re PR c++/62155 (ICE in tsubst_copy, at cp/pt.c:12544)Paolo Carlini2-0/+13
2014-09-23 Paolo Carlini <paolo.carlini@oracle.com> PR c++/62155 * g++.dg/cpp0x/lambda/lambda-62155.C: New. From-SVN: r215497
2014-09-23AVX-512. Add vshufpd insn patterns.Alexander Ivchenko2-16/+60
gcc/ * config/i386/sse.md (define_expand "avx_shufpd256<mask_expand4_name>"): Add masking. (define_insn "avx_shufpd256_1<mask_name>"): Ditto. (define_expand "sse2_shufpd<mask_expand4_name>"): Ditto. (define_insn "sse2_shufpd_v2df_mask"): New. Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com> Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com> Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com> Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com> Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com> Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com> Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com> From-SVN: r215496
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