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2020-09-28testsuite: Skip symver1 on AIX.David Edelsohn1-1/+1
symver1.c only is valid on ELF targets. Add AIX to the skip list. gcc/testsuite/ChangeLog 2020-09-28 David Edelsohn <dje.gcc@gmail.com> * gcc.dg/ipa/symver1.c: Skip on AIX.
2020-09-29Daily bump.GCC Administrator6-1/+177
2020-09-28analyzer: add some missing FINAL OVERRIDEsDavid Malcolm1-4/+16
Spotted by cppcheck. gcc/analyzer/ChangeLog: * region-model.h (binop_svalue::dyn_cast_binop_svalue): Remove redundant "virtual". Add FINAL OVERRIDE. (widening_svalue::dyn_cast_widening_svalue): Add FINAL OVERRIDE. (compound_svalue::dyn_cast_compound_svalue): Likewise. (conjured_svalue::dyn_cast_conjured_svalue): Likewise.
2020-09-28analyzer: remove unused fieldDavid Malcolm1-1/+0
I added this field (and the struct itself) in the rewrite of region and value-handling (808f4dfeb3a95f50f15e71148e5c1067f90a126d), but the field was never used. Found by cppcheck. gcc/analyzer/ChangeLog: * diagnostic-manager.cc (null_assignment_sm_context::m_visitor): Remove unused field.
2020-09-28analyzer: fix ICE on non-pointer longjmp [PR97233]David Malcolm3-1/+13
gcc/analyzer/ChangeLog: PR analyzer/97233 * analyzer.cc (is_longjmp_call_p): Require the initial argument to be a pointer. * engine.cc (exploded_node::on_longjmp): Likewise. gcc/testsuite/ChangeLog: PR analyzer/97233 * gcc.dg/analyzer/pr97233.c: New test.
2020-09-28analyzer: fix sm_state_map::printDavid Malcolm1-1/+1
In 10fc42a8396072912e9d9d940fba25950b3fdfc5 I converted state_t from unsigned to const state *, but missed this comparison against 0. gcc/analyzer/ChangeLog: * program-state.cc (sm_state_map::print): Update check for m_global_state being the start state.
2020-09-28net: add hurd build tagIan Lance Taylor1-1/+1
Patch from Svante Signell. Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/257857
2020-09-29irange_allocator classAldy Hernandez1-0/+65
This is the irange storage class. It is used to allocate the minimum amount of storage needed for a given irange. Storage is automatically freed at destruction of the storage class. It is meant for long term storage, as opposed to int_range_max which is meant for intermediate temporary results on the stack. The general gist is: irange_allocator alloc; // Allocate an irange of 5 sub-ranges. irange *p = alloc.allocate (5); // Allocate an irange of 3 sub-ranges. irange *q = alloc.allocate (3); // Allocate an irange with as many sub-ranges as are currently // used in "some_other_range". irange *r = alloc.allocate (some_other_range); gcc/ChangeLog: * value-range.h (class irange): Add irange_allocator friend. (class irange_allocator): New.
2020-09-28OpenMP: Handle cpp_implicit_alias in declare-target discovery (PR96390)Tobias Burnus1-6/+38
gcc/ChangeLog: PR middle-end/96390 * omp-offload.c (omp_discover_declare_target_tgt_fn_r): Handle alias nodes. libgomp/ChangeLog: PR middle-end/96390 * testsuite/libgomp.c++/pr96390.C: New test. * testsuite/libgomp.c-c++-common/pr96390.c: New test.
2020-09-28rs6000: Add tests for _mm_insert_epi{8,32,64}Paul A. Clarke3-0/+250
Copied from gcc.target/i386. 2020-09-23 Paul A. Clarke <pc@us.ibm.com> gcc/testsuite/ChangeLog: * gcc.target/powerpc/sse4_1-pinsrb.c: New test. * gcc.target/powerpc/sse4_1-pinsrd.c: New test. * gcc.target/powerpc/sse4_1-pinsrq.c: New test.
2020-09-28rs6000: Support _mm_insert_epi{8,32,64}Paul A. Clarke1-0/+30
Add compatibility implementations for SSE4.1 intrinsics _mm_insert_epi8, _mm_insert_epi32, _mm_insert_epi64. 2020-09-23 Paul A. Clarke <pc@us.ibm.com> gcc/ * config/rs6000/smmintrin.h (_mm_insert_epi8): New. (_mm_insert_epi32): New. (_mm_insert_epi64): New.
2020-09-28Enable GCC support for AMX-TILE,AMX-INT8,AMX-BF16.liuhongt39-13/+1032
AMX-TILE:ldtilecfg/sttilecfg/tileloadd/tileloaddt1/tilezero/tilerelease AMX-INT8:tdpbssd/tdpbsud/tdpbusd/tdpbuud AMX-BF16:tdpbf16ps gcc/ChangeLog * common/config/i386/i386-common.c (OPTION_MASK_ISA2_AMX_TILE_SET, OPTION_MASK_ISA2_AMX_INT8_SET, OPTION_MASK_ISA2_AMX_BF16_SET, OPTION_MASK_ISA2_AMX_TILE_UNSET, OPTION_MASK_ISA2_AMX_INT8_UNSET, OPTION_MASK_ISA2_AMX_BF16_UNSET, OPTION_MASK_ISA2_XSAVE_UNSET): New marcos. (ix86_handle_option): Hanlde -mamx-tile, -mamx-int8, -mamx-bf16. * common/config/i386/i386-cpuinfo.h (processor_types): Add FEATURE_AMX_TILE, FEATURE_AMX_INT8, FEATURE_AMX_BF16. * common/config/i386/cpuinfo.h (XSTATE_TILECFG, XSTATE_TILEDATA, XCR_AMX_ENABLED_MASK): New macro. (get_available_features): Enable AMX features only if their states are suoorited by OSXSAVE. * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for amx-tile, amx-int8, amx-bf16. * config.gcc: Add amxtileintrin.h, amxint8intrin.h, amxbf16intrin.h to extra headers. * config/i386/amxbf16intrin.h: New file. * config/i386/amxint8intrin.h: Ditto. * config/i386/amxtileintrin.h: Ditto. * config/i386/cpuid.h (bit_AMX_BF16, bit_AMX_TILE, bit_AMX_INT8): New macro. * config/i386/i386-c.c (ix86_target_macros_internal): Define __AMX_TILE__, __AMX_INT8__, AMX_BF16__. * config/i386/i386-options.c (ix86_target_string): Add -mamx-tile, -mamx-int8, -mamx-bf16. (ix86_option_override_internal): Handle AMX-TILE, AMX-INT8, AMX-BF16. * config/i386/i386.h (TARGET_AMX_TILE, TARGET_AMX_TILE_P, TARGET_AMX_INT8, TARGET_AMX_INT8_P, TARGET_AMX_BF16_P, PTA_AMX_TILE, PTA_AMX_INT8, PTA_AMX_BF16): New macros. * config/i386/i386.opt: Add -mamx-tile, -mamx-int8, -mamx-bf16. * config/i386/immintrin.h: Include amxtileintrin.h, amxint8intrin.h, amxbf16intrin.h. * doc/invoke.texi: Document -mamx-tile, -mamx-int8, -mamx-bf16. * doc/extend.texi: Document amx-tile, amx-int8, amx-bf16. * doc/sourcebuild.texi ((Effective-Target Keywords, Other hardware attributes): Document amx_int8, amx_tile, amx_bf16. gcc/testsuite/ChangeLog * lib/target-supports.exp (check_effective_target_amx_tile, check_effective_target_amx_int8, check_effective_target_amx_bf16): New proc. * g++.dg/other/i386-2.C: Add -mamx-tile, -mamx-int8, -mamx-bf16. * g++.dg/other/i386-3.C: Ditto. * gcc.target/i386/sse-12.c: Ditto. * gcc.target/i386/sse-13.c: Ditto. * gcc.target/i386/sse-14.c: Ditto. * gcc.target/i386/sse-22.c: Ditto. * gcc.target/i386/sse-23.c: Ditto. * gcc.target/i386/funcspec-56.inc: Add new target attribute. * gcc.target/i386/amx-check.h: New header file. * gcc.target/i386/amxbf16-asmatt-1.c: New test. * gcc.target/i386/amxint8-asmatt-1.c: New test. * gcc.target/i386/amxtile-asmatt-1.c: Ditto. * gcc.target/i386/amxbf16-asmintel-1.c: Ditto. * gcc.target/i386/amxint8-asmintel-1.c: Ditto. * gcc.target/i386/amxtile-asmintel-1.c: Ditto. * gcc.target/i386/amxbf16-dpbf16ps-2.c: Ditto. * gcc.target/i386/amxint8-dpbssd-2.c: Ditto. * gcc.target/i386/amxint8-dpbsud-2.c: Ditto. * gcc.target/i386/amxint8-dpbusd-2.c: Ditto. * gcc.target/i386/amxint8-dpbuud-2.c: Ditto. * gcc.target/i386/amxtile-2.c: Ditto.
2020-09-28aarch64: Do not alter force_reg returned rtx expanding pauth builtinsAndrea Corallo1-11/+2
2020-09-21 Andrea Corallo <andrea.corallo@arm.com> * config/aarch64/aarch64-builtins.c (aarch64_general_expand_builtin): Do not alter value on a force_reg returned rtx.
2020-09-28Revert "Fortran : ICE in build_field PR95614"Mark Eggleston6-26/+8
This reverts commit e5a76af3a2f3324efc60b4b2778ffb29d5c377bc.
2020-09-28Add missing end location informationEric Botcazou1-6/+5
In some cases we would fail to put the end location information on the outermost BIND_EXPR of a function, which is problematic when there is a dynamic stack allocation. gcc/ada/ChangeLog: * gcc-interface/trans.c (Subprogram_Body_to_gnu): Set the end locus of body and declaration earlier.
2020-09-28Fix bogus alignment warning on address clauseEric Botcazou3-8/+43
The compiler gives a bogus alignment warning on an address clause and a discriminated record type with variable size. gcc/ada/ChangeLog: * gcc-interface/decl.c (maybe_saturate_size): Add ALIGN parameter and round down the result to ALIGN. (gnat_to_gnu_entity): Adjust calls to maybe_saturate_size. gcc/testsuite/ChangeLog: * gnat.dg/addr16.adb: New test. * gnat.dg/addr16_pkg.ads: New helper.
2020-09-28Revert recent changes to lower_try_finally_dup_blockEric Botcazou1-10/+2
This reverts the recent changes made to lower_try_finally_dup_block and aimed at tweaking the souce location info for __builtin_stack_restore. gcc/ChangeLog: * tree-eh.c (lower_try_finally_dup_block): Revert latest change.
2020-09-28Daily bump.GCC Administrator4-1/+54
2020-09-27Fix handling of stores in modref_summary::useful_pJan Hubicka1-1/+1
* ipa-modref.c (modref_summary::useful_p): Fix testing of stores.
2020-09-27optabs: Don't reuse target for multi-word expansions if it overlaps ↵Jakub Jelinek2-1/+34
operand(s) [PR97073] The following testcase is miscompiled on i686-linux, because we try to expand a double-word bitwise logic operation with op0 being a (mem:DI u) and target (mem:DI u+4), i.e. partial overlap, and thus end up with: movl 4(%esp), %eax andl u, %eax movl %eax, u+4 ! movl u+4, %eax optimized out andl 8(%esp), %eax movl %eax, u+8 rather than with the desired: movl 4(%esp), %edx movl 8(%esp), %eax andl u, %edx andl u+4, %eax movl %eax, u+8 movl %edx, u+4 because the store of the first word to target overwrites the second word of the operand. expand_binop for this (and several similar places) already check for target == op0 or target == op1, this patch just adds reg_overlap_mentioned_p calls next to it. Pedantically, at least for some of these it might be sufficient to force a different target if there is overlap but target is not rtx_equal_p to the operand (e.g. in this bitwise logical case, but e.g. not in the shift cases where there is reordering), though that would go against the preexisting target == op? checks and the rationale that REG_EQUAL notes in that case isn't correct. 2020-09-27 Jakub Jelinek <jakub@redhat.com> PR middle-end/97073 * optabs.c (expand_binop, expand_absneg_bit, expand_unop, expand_copysign_bit): Check reg_overlap_mentioned_p between target and operand(s) and if it returns true, force a pseudo as target. * gcc.c-torture/execute/pr97073.c: New test.
2020-09-27Fortran : ICE in build_field PR95614Mark Eggleston6-8/+26
Local identifiers can not be the same as a module name. Original patch by Steve Kargl resulted in name clashes between common block names and local identifiers. A local identifier can be the same as a global identier if that identifier represents a common. The patch was modified to allow global identifiers that represent a common block. 2020-09-27 Steven G. Kargl <kargl@gcc.gnu.org> Mark Eggleston <markeggleston@gcc.gnu.org> gcc/fortran/ PR fortran/95614 * decl.c (gfc_get_common): Use gfc_match_common_name instead of match_common_name. * decl.c (gfc_bind_idents): Use gfc_match_common_name instead of match_common_name. * match.c : Rename match_common_name to gfc_match_common_name. * match.c (gfc_match_common): Use gfc_match_common_name instead of match_common_name. * match.h : Rename match_common_name to gfc_match_common_name. * resolve.c (resolve_common_vars): Check each symbol in a common block has a global symbol. If there is a global symbol issue an error if the symbol type is known as is not a common block name. 2020-09-27 Mark Eggleston <markeggleston@gcc.gnu.org> gcc/testsuite/ PR fortran/95614 * gfortran.dg/pr95614_1.f90: New test. * gfortran.dg/pr95614_2.f90: New test.
2020-09-27IFN: Implement IFN_VEC_SET for ARRAY_REF with VIEW_CONVERT_EXPRXionghu Luo5-2/+141
This patch enables transformation from ARRAY_REF(VIEW_CONVERT_EXPR) to VEC_SET internal function in gimple-isel pass if target supports vec_set with variable index by checking can_vec_set_var_idx_p. gcc/ChangeLog: 2020-09-27 Xionghu Luo <luoxhu@linux.ibm.com> * gimple-isel.cc (gimple_expand_vec_set_expr): New function. (gimple_expand_vec_cond_exprs): Rename to ... (gimple_expand_vec_exprs): ... this and call gimple_expand_vec_set_expr. * internal-fn.c (vec_set_direct): New define. (expand_vec_set_optab_fn): New function. (direct_vec_set_optab_supported_p): New define. * internal-fn.def (VEC_SET): New DEF_INTERNAL_OPTAB_FN. * optabs.c (can_vec_set_var_idx_p): New function. * optabs.h (can_vec_set_var_idx_p): New declaration.
2020-09-27Daily bump.GCC Administrator4-1/+108
2020-09-26Fix handling of clobbers in ipa-modref.cJan Hubicka2-4/+9
* ipa-modref.c (analyze_stmt): Do not skip clobbers in early pass. * ipa-pure-const.c (analyze_stmt): Update comment.
2020-09-26aix: collect2 visibilityDavid Edelsohn1-1/+25
The code that collect2 generates, compiles and links into applications and shared libraries to initialize constructors and register DWARF tables is built with the compiler options used to invoke the linker. If the compiler options change the visibility from default, the library initialization routines will not be visible and this can prevent initialization. This patch checks if the command line sets visibiliity and then adds GCC pragmas to the initialization code generated by collect2 if necessary to define the visibility on global, exported functions as default. gcc/ChangeLog: 2020-09-26 David Edelsohn <dje.gcc@gmail.com> Clement Chigot <clement.chigot@atos.com> * collect2.c (visibility_flag): New. (main): Detect -fvisibility. (write_c_file_stat): Push and pop default visibility.
2020-09-26Correct overwrite of alloc_comp_result_2.f90 in fix of PR96495.Paul Thomas2-71/+98
2020-26-09 Paul Thomas <pault@gcc.gnu.org> gcc/testsuite/ PR fortran/96495 * gfortran.dg/alloc_comp_result_2.f90 : Restore original. * gfortran.dg/alloc_comp_result_3.f90 : New test.
2020-09-26Add modref testcasesJan Hubicka3-0/+53
gcc/testsuite/ * gcc.dg/lto/modref-1_0.c: New test. * gcc.dg/lto/modref-1_1.c: New test. * gcc.dg/tree-ssa/modref-2.c: New test.
2020-09-26Implement iterative dataflow in mod-refJan Hubicka4-205/+373
cc1plus stats are now: Alias oracle query stats: refs_may_alias_p: 62971744 disambiguations, 73160711 queries ref_maybe_used_by_call_p: 141176 disambiguations, 63867883 queries call_may_clobber_ref_p: 23573 disambiguations, 29322 queries nonoverlapping_component_refs_p: 0 disambiguations, 37720 queries nonoverlapping_refs_since_match_p: 19432 disambiguations, 55659 must overlaps, 75860 queries aliasing_component_refs_p: 54724 disambiguations, 753570 queries TBAA oracle: 24124230 disambiguations 56228428 queries 16058141 are in alias set 0 10338303 queries asked about the same object 125 queries asked about the same alias set 0 access volatile 3919230 are dependent in the DAG 1788399 are aritificially in conflict with void * Modref stats: modref use: 10408 disambiguations, 46993 queries modref clobber: 1418549 disambiguations, 1951251 queries 4898707 tbaa queries (2.510547 per modref query) 396878 base compares (0.203397 per modref query) PTA query stats: pt_solution_includes: 975364 disambiguations, 13604284 queries pt_solutions_intersect: 1026606 disambiguations, 13181198 queries So compared to https://gcc.gnu.org/pipermail/gcc-patches/2020-September/554692.html we get 25% use disambiguations and 91% more clobber disambiguations. Tramp3d is Alias oracle query stats: refs_may_alias_p: 2056905 disambiguations, 2317461 queries ref_maybe_used_by_call_p: 7137 disambiguations, 2093762 queries call_may_clobber_ref_p: 234 disambiguations, 234 queries nonoverlapping_component_refs_p: 0 disambiguations, 4313 queries nonoverlapping_refs_since_match_p: 329 disambiguations, 10200 must overlaps, 10616 queries aliasing_component_refs_p: 858 disambiguations, 34600 queries TBAA oracle: 894996 disambiguations 1695991 queries 138346 are in alias set 0 470668 queries asked about the same object 0 queries asked about the same alias set 0 access volatile 191666 are dependent in the DAG 315 are aritificially in conflict with void * Modref stats: modref use: 842 disambiguations, 2265 queries modref clobber: 14833 disambiguations, 28900 queries 34884 tbaa queries (1.207059 per modref query) 5041 base compares (0.174429 per modref query) PTA query stats: pt_solution_includes: 313372 disambiguations, 525724 queries pt_solutions_intersect: 130374 disambiguations, 415138 queries So about twice many use and 40% clobber disambiguations. Bootstrapped/regtested x86_64-linux, I plan to commit it later today after more testing. 2020-09-26 Jan Hubicka <hubicka@ucw.cz> * ipa-inline-transform.c: Include ipa-modref-tree.h and ipa-modref.h. (inline_call): Call ipa_merge_modref_summary_after_inlining. * ipa-inline.c (ipa_inline): Do not free summaries. * ipa-modref.c (dump_records): Fix formating. (merge_call_side_effects): Break out from ... (analyze_call): ... here; record recursive calls. (analyze_stmt): Add new parameter RECURSIVE_CALLS. (analyze_function): Do iterative dataflow on recursive calls. (compute_parm_map): New function. (ipa_merge_modref_summary_after_inlining): New function. (collapse_loads): New function. (modref_propagate_in_scc): Break out from ... (pass_ipa_modref::execute): ... here; Do iterative dataflow. * ipa-modref.h (ipa_merge_modref_summary_after_inlining): Declare.
2020-09-26openmp: Improve #pragma omp simd vectorizationJakub Jelinek5-5/+230
As mentioned earlier, the vectorizer punts on vectorization of loops with non-constant steps. As for OpenMP loops it is by the language restriction always possible to compute the number of loop iterations before the loop, this change helps those cases by computing it and using an alternate IV that iterates from 0 to < niterations with step of 1 next to the normal IV which will be just linear in that. List of functions where we compared to current trunk vectorize some loops where we previously didn't (for c-c++-common only listing the C function names, both C and C++ are affected though): gcc/testsuite/gcc.dg/vect/vect-simd-17.c doit gcc/testsuite/gcc.dg/vect/vect-simd-18.c foo gcc/testsuite/gcc.dg/vect/vect-simd-19.c foo gcc/testsuite/gcc.dg/vect/vect-simd-20.c foo libgomp/testsuite/libgomp.c-c++-common/for-2.c f3_f_simd_auto libgomp/testsuite/libgomp.c-c++-common/for-2.c f3_f_simd_guided32 libgomp/testsuite/libgomp.c-c++-common/for-2.c f3_f_simd_runtime libgomp/testsuite/libgomp.c-c++-common/for-2.c f3_f_simd_static libgomp/testsuite/libgomp.c-c++-common/for-2.c f3_f_simd_static32 libgomp/testsuite/libgomp.c-c++-common/for-2.c f3_pf_simd_auto._omp_fn.0 libgomp/testsuite/libgomp.c-c++-common/for-2.c f3_pf_simd_guided32._omp_fn.0 libgomp/testsuite/libgomp.c-c++-common/for-2.c f3_pf_simd_runtime._omp_fn.0 libgomp/testsuite/libgomp.c-c++-common/for-2.c f3_pf_simd_static32._omp_fn.0 libgomp/testsuite/libgomp.c-c++-common/for-2.c f3_pf_simd_static._omp_fn.0 libgomp/testsuite/libgomp.c-c++-common/for-2.c f3_simd_normal libgomp/testsuite/libgomp.c-c++-common/for-2.c f5_simd_normal libgomp/testsuite/libgomp.c-c++-common/for-2.c f6_simd_normal libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_dpfs_auto._omp_fn.0 libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_dpfs_ds128_auto._omp_fn.0 libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_dpfs_ds128_guided32._omp_fn.0 libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_dpfs_ds128_runtime._omp_fn.0 libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_dpfs_ds128_static32._omp_fn.0 libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_dpfs_ds128_static._omp_fn.0 libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_dpfs_guided32._omp_fn.0 libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_dpfs_runtime._omp_fn.0 libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_dpfs_static32._omp_fn.0 libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_dpfs_static._omp_fn.0 libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_ds_ds128_normal libgomp/testsuite/libgomp.c-c++-common/for-3.c f3_ds_normal libgomp/testsuite/libgomp.c-c++-common/for-4.c f3_taskloop_simd_normal._omp_fn.0 libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_tpf_simd_auto._omp_fn.1 libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_tpf_simd_guided32._omp_fn.1 libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_tpf_simd_runtime._omp_fn.1 libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_tpf_simd_static32._omp_fn.1 libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_tpf_simd_static._omp_fn.1 libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_t_simd_normal._omp_fn.0 libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttdpfs_auto._omp_fn.1 libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttdpfs_ds128_auto._omp_fn.1 libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttdpfs_ds128_guided32._omp_fn.1 libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttdpfs_ds128_runtime._omp_fn.1 libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttdpfs_ds128_static32._omp_fn.1 libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttdpfs_ds128_static._omp_fn.1 libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttdpfs_guided32._omp_fn.1 libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttdpfs_runtime._omp_fn.1 libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttdpfs_static32._omp_fn.1 libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttdpfs_static._omp_fn.1 libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttds_ds128_normal._omp_fn.0 libgomp/testsuite/libgomp.c-c++-common/for-5.c f3_ttds_normal._omp_fn.0 libgomp/testsuite/libgomp.c-c++-common/for-5.c f5_t_simd_normal._omp_fn.0 libgomp/testsuite/libgomp.c-c++-common/for-5.c f6_t_simd_normal._omp_fn.0 libgomp/testsuite/libgomp.c-c++-common/for-6.c f3_tdpfs_auto._omp_fn.1 libgomp/testsuite/libgomp.c-c++-common/for-6.c f3_tdpfs_ds128_auto._omp_fn.1 libgomp/testsuite/libgomp.c-c++-common/for-6.c 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f3_dpfs_ds128_runtime._omp_fn.0 libgomp/testsuite/libgomp.c-c++-common/for-14.c f3_dpfs_ds128_static32._omp_fn.0 libgomp/testsuite/libgomp.c-c++-common/for-14.c f3_dpfs_ds128_static._omp_fn.0 libgomp/testsuite/libgomp.c-c++-common/for-14.c f3_dpfs_guided32._omp_fn.0 libgomp/testsuite/libgomp.c-c++-common/for-14.c f3_dpfs_runtime._omp_fn.0 libgomp/testsuite/libgomp.c-c++-common/for-14.c f3_dpfs_static32._omp_fn.0 libgomp/testsuite/libgomp.c-c++-common/for-14.c f3_dpfs_static._omp_fn.0 libgomp/testsuite/libgomp.c-c++-common/for-14.c f3_ds_ds128_normal libgomp/testsuite/libgomp.c-c++-common/for-14.c f3_ds_normal libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tdpfs_auto._omp_fn.1 libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tdpfs_ds128_auto._omp_fn.1 libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tdpfs_ds128_guided32._omp_fn.1 libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tdpfs_ds128_runtime._omp_fn.1 libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tdpfs_ds128_static32._omp_fn.1 libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tdpfs_ds128_static._omp_fn.1 libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tdpfs_guided32._omp_fn.1 libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tdpfs_runtime._omp_fn.1 libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tdpfs_static32._omp_fn.1 libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tdpfs_static._omp_fn.1 libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tds_ds128_normal._omp_fn.0 libgomp/testsuite/libgomp.c-c++-common/for-15.c f3_tds_normal._omp_fn.0 2020-09-26 Jakub Jelinek <jakub@redhat.com> * omp-expand.c (expand_omp_simd): Help vectorizer for the collapse == 1 and non-composite collapse > 1 case with non-constant innermost loop step by precomputing number of iterations before loop and using an alternate IV from 0 to number of iterations - 1 with step of 1. * gcc.dg/vect/vect-simd-17.c: Expect 11 or more vectorized loops. * gcc.dg/vect/vect-simd-18.c: New test. * gcc.dg/vect/vect-simd-19.c: New test. * gcc.dg/vect/vect-simd-20.c: New test.
2020-09-26Disable modref for ipa-pta-13.cJan Hubicka1-1/+1
* gcc.dg/ipa/ipa-pta-13.c: Disable modref.
2020-09-26Track arguments pointing to local or readonly memory in ipa-fnsummaryJan Hubicka2-11/+42
this patch implement tracking wehther argument points to readonly memory. This is is useful for ipa-modref as well as for inline heuristics. It is desirable to inline functions that dereference pointers to local variables in order to support SRA. We always did the oposite heuristics (guessing that the dereferences will be optimized out with 50% probability) but here we could increase the probability for cases where we can track that argument is indeed a local memory (or readonly which is also good) * ipa-fnsummary.c (dump_ipa_call_summary): Dump points_to_local_or_readonly_memory flag. (analyze_function_body): Compute points_to_local_or_readonly_memory flag. (remap_edge_change_prob): Rename to ... (remap_edge_params): ... this one; update points_to_local_or_readonly_memory. (remap_edge_summaries): Update. (read_ipa_call_summary): Stream the new flag. (write_ipa_call_summary): Likewise. * ipa-predicate.h (struct inline_param_summary): Add points_to_local_or_readonly_memory. (inline_param_summary::equal_to): Update. (inline_param_summary::useless_p): Update.
2020-09-26Add support for iterative dataflow to ipa-modref-tree.hJan Hubicka1-68/+124
Track if insert and merge operations changed anything in the summary. gcc/ChangeLog: 2020-09-26 Jan Hubicka <hubicka@ucw.cz> * ipa-modref-tree.h (modref_ref_node::insert_access): Track if something changed. (modref_base_node::insert_ref): Likewise (and add a new optional argument) (modref_tree::insert): Likewise. (modref_tree::merge): Rewrite
2020-09-25analyzer: add test for placement newDavid Malcolm1-0/+26
gcc/testsuite/ChangeLog: PR analyzer/94355 * g++.dg/analyzer/placement-new.C: New test.
2020-09-25analyzer: fix ICEs treeifying offset_region [PR96646, PR96841]David Malcolm3-2/+52
gcc/analyzer/ChangeLog: PR analyzer/96646 PR analyzer/96841 * region-model.cc (region_model::get_representative_path_var): When handling offset_region, wrap the MEM_REF's first argument in an ADDR_EXPR of pointer type, rather than simply using the tree for the parent region. Require the MEM_REF's second argument to be an integer constant. gcc/testsuite/ChangeLog: PR analyzer/96646 PR analyzer/96841 * gcc.dg/analyzer/pr96646.c: New test. * gcc.dg/analyzer/pr96841.c: New test.
2020-09-26Daily bump.GCC Administrator5-1/+199
2020-09-26Disable ipa-modref with live patchingJan Hubicka2-1/+8
2020-09-26 Jan Hubicka <hubicka@ucw.cz> * doc/invoke.texi: Add -fno-ipa-modref to flags disabled by -flive-patching. * opts.c (control_options_for_live_patching): Disable ipa-modref.
2020-09-26Fix gimple_clobber handling in ipa-modrefJan Hubicka1-1/+1
2020-09-25 Jan Hubicka <hubicka@ucw.cz> * ipa-modref.c (analyze_stmt): Fix return value for gimple_clobber.
2020-09-25c++: Adjust pushdecl/duplicate_decls APINathan Sidwell6-62/+81
The decl pushing APIs and duplicate_decls take an 'is_friend' parm, when what they actually mean is 'hide this from name lookup'. That conflation has gotten more anachronistic as time moved on. We now have anticipated builtins, and I plan to have injected extern decls soon. So this patch is mainly a renaming excercise. is_friend -> hiding. duplicate_decls gets an additional 'was_hidden' parm. As I've already said, hiddenness is a property of the symbol table, not the decl. Builtins are now pushed requesting hiding, and pushdecl asserts that we don't attempt to push a thing that should be hidden without asking for it to be hidden. This is the final piece of groundwork to get rid of a bunch of 'this is hidden' markers on decls and move the hiding management entirely into name lookup. gcc/cp/ * cp-tree.h (duplicate_decls): Replace 'is_friend' with 'hiding' and add 'was_hidden'. * name-lookup.h (pushdecl_namespace_level): Replace 'is_friend' with 'hiding'. (pushdecl): Likewise. (pushdecl_top_level): Drop is_friend parm. * decl.c (check_no_redeclaration_friend_default_args): Rename parm olddelc_hidden_p. (duplicate_decls): Replace 'is_friend' with 'hiding' and 'was_hidden'. Do minimal adjustments in body. (cxx_builtin_function): Pass 'hiding' to pushdecl. * friend.c (do_friend): Pass 'hiding' to pushdecl. * name-lookup.c (supplement_binding_1): Drop defaulted arg to duplicate_decls. (update_binding): Replace 'is_friend' with 'hiding'. Drop defaulted arg to duplicate_decls. (do_pushdecl): Replace 'is_friend' with 'hiding'. Assert no surprise hidhing. Adjust duplicate_decls calls to inform of old decl's hiddennes. (pushdecl): Replace 'is_friend' with 'hiding'. (set_identifier_type_value_with_scope): Adjust update_binding call. (do_pushdecl_with_scope): Replace 'is_friend' with 'hiding'. (pushdecl_outermost_localscope): Drop default arg to do_pushdecl_with_scope. (pushdecl_namespace_level): Replace 'is_friend' with 'hiding'. (pushdecl_top_level): Drop is_friend parm. * pt.c (register_specialization): Comment duplicate_decls call args. (push_template_decl): Commont pushdecl_namespace_level. (tsubst_friend_function, tsubst_friend_class): Likewise.
2020-09-25c++: Replace tag_scope with TAG_howNathan Sidwell6-96/+84
I always found tag_scope confusing, as it is not a scope, but a direction of how to lookup or insert an elaborated type tag. This replaces it with a enum class TAG_how. I also add a new value, HIDDEN_FRIEND, to distinguish the two cases of innermost-non-class insertion that we currently conflate. Also renamed 'lookup_type_scope' to 'lookup_elaborated_type', because again, we're not providing a scope to lookup in. gcc/cp/ * name-lookup.h (enum tag_scope): Replace with ... (enum class TAG_how): ... this. Add HIDDEN_FRIEND value. (lookup_type_scope): Replace with ... (lookup_elaborated_type): ... this. (pushtag): Use TAG_how, not tag_scope. * cp-tree.h (xref_tag): Parameter is TAG_how, not tag_scope. * decl.c (lookup_and_check_tag): Likewise. Adjust. (xref_tag_1, xref_tag): Likewise. adjust. (start_enum): Adjust lookup_and_check_tag call. * name-lookup.c (lookup_type_scope_1): Rename to ... (lookup_elaborated_type_1) ... here. Use TAG_how, not tag_scope. (lookup_type_scope): Rename to ... (lookup_elaborated_type): ... here. Use TAG_how, not tag_scope. (do_pushtag): Use TAG_how, not tag_scope. Adjust. (pushtag): Likewise. * parser.c (cp_parser_elaborated_type_specifier): Adjust. (cp_parser_class_head): Likewise. gcc/objcp/ * objcp-decl.c (objcp_start_struct): Use TAG_how not tag_scope. (objcp_xref_tag): Likewise.
2020-09-25AArch64: Add Linux cpuinfo string for rng featureKyrylo Tkachov1-1/+1
The Linux kernel has defined the cpuinfo string for the +rng feature, so this patch adds that to GCC so that -march=native can pick it up. Bootstrapped and tested on aarch64-none-linux-gnu. gcc/ * config/aarch64/aarch64-option-extensions.def (rng): Add cpuinfo string.
2020-09-25arm: Add missing Neoverse V1 featureAlex Coplan1-1/+1
This adds a missing feature (FP16) to the Neoverse V1 description in AArch32 GCC. gcc/ChangeLog: * config/arm/arm-cpus.in (neoverse-v1): Add FP16.
2020-09-25gcov: fix streaming of HIST_TYPE_IOR histogram type.Martin Liska1-1/+4
gcc/ChangeLog: PR gcov-profile/64636 * value-prof.c (stream_out_histogram_value): Allow negative values for HIST_TYPE_IOR.
2020-09-25c++: DECL_BUILTIN_P for builtinsNathan Sidwell5-28/+32
We currently detect builtin decls via DECL_ARTIFICIAL && !DECL_HIDDEN_FUNCTION_P, which, besides being clunky, is a problem as hiddenness is a property of the symbol table -- not the decl being hidden. This adds DECL_BUILTIN_P, which just looks at the SOURCE_LOCATION -- we have a magic one for builtins. One of the consequential changes is to make function-scope omp udrs have function context (needed because otherwise duplicate-decls thinks the types don't match at the point we check). This is also morally better, because that's what they are -- nested functions, stop lying. (That's actually my plan for all DECL_LOCAL_DECL_P decls, as they are distinct decls to the namespace-scope decl they alias.) gcc/cp/ * cp-tree.h (DECL_BUILTIN_P): New. * decl.c (duplicate_decls): Use it. Do not treat omp-udr as a builtin. * name-lookup.c (anticipated_builtin): Use it. (set_decl_context_in_fn): Function-scope OMP UDRs have function context. (do_nonmember_using_decl): Use DECL_BUILTIN_P. * parser.c (cp_parser_omp_declare_reduction): Function-scope OMP UDRs have function context. Assert we never find a valid duplicate. * pt.c (tsubst_expr): Function-scope OMP UDRs have function context. libcc1/ * libcp1plugin.cc (supplement_binding): Use DECL_BULTIN_P.
2020-09-25[nvptx] Fix Wimplicit-fallthrough in nvptx.c with -save-tempsTom de Vries1-2/+2
When compiling nvptx.c using -save-temps, I ran into Wimplicit-fallthrough warnings. The fallthrough locations have been marked with a fallthrough comment, but that doesn't work with -save-temps, something that has been filed as PR78497. Work around this by using gcc_fallthrough () in addition to the comment. Tested by building target nvptx, copying nvptx.c compile line and adding -save-temps. gcc/ChangeLog: 2020-09-25 Tom de Vries <tdevries@suse.de> * config/nvptx/nvptx.c (nvptx_assemble_integer, nvptx_print_operand): Use gcc_fallthrough ().
2020-09-25middle-end/96814 - fix VECTOR_BOOLEAN_TYPE_P CTOR RTL expansionRichard Biener2-7/+30
The RTL expansion code for CTORs doesn't handle VECTOR_BOOLEAN_TYPE_P with bit-precision elements correctly as the testcase shows before the PR97085 fix. The following makes it do the correct thing (not 100% sure for CTOR of sub-vectors due to the lack of a testcase). The alternative would be to assert such CTORs do not happen (and also add IL verification for this). The GIMPLE FE needs a way to declare the VECTOR_BOOLEAN_TYPE_P vectors (thus the C FE needs that). 2020-09-25 Richard Biener <rguenther@suse.de> PR middle-end/96814 * expr.c (store_constructor): Handle VECTOR_BOOLEAN_TYPE_P CTORs correctly. * gcc.target/i386/pr96814.c: New testcase.
2020-09-25middle-end/97207 - implement move assign for auto_vec<>Richard Biener1-1/+7
This implements the missing move assignment to make std::swap work on auto_vec<> 2020-09-25 Richard Biener <rguenther@suse.de> PR middle-end/97207 * vec.h (auto_vec<T>::operator=(auto_vec<T>&&)): Implement.
2020-09-25arm: Fix fp16 move patterns for base MVERichard Sandiford9-45/+1295
This patch fixes ICEs in gcc.dg/torture/float16-basic.c for -march=armv8.1-m.main+mve -mfloat-abi=hard. The problem was that an fp16 argument was (rightly) being passed in FPRs, but the fp16 move patterns only handled GPRs. LRA then cycled trying to look for a way of handling the FPR. It looks like there are three related problems here: (1) We're using the wrong fp16 move pattern for base MVE. *mov<mode>_vfp_<mode>16 (the pattern we use for +mve.fp) works for base MVE too. (2) The fp16 MVE load and store patterns are separate from the main move patterns. The loads and stores should instead be alternatives of the main move patterns, so that LRA knows what to do with pseudo registers that become stack slots. (3) The range restrictions for the loads and stores were wrong for fp16: we were enforcing a multiple of 4 in [-255*4, 255*4] instead of a multiple of 2 in [-255*2, 255*2]. (2) came from a patch to prevent writeback being used for MVE. That patch also added a Uj constraint to enforce the correct memory types for MVE. I think the simplest fix is therefore to merge the loads and stores back into the main pattern and extend the Uj constraint so that it acts like Um for non-MVE. The testcase for that patch was mve-vldstr16-no-writeback.c, whose main function is: void fn1 (__fp16 *pSrc) { __fp16 high; __fp16 *pDst = 0; unsigned i; for (i = 0;; i++) if (pSrc[i]) pDst[i] = high; } Fixing (2) causes the store part to fail, not because we're using writeback, but because we decide to use GPRs to store high (which is uninitialised, and so gets replaced with zero). This patch therefore adds some scan-assembler-nots instead. (I wondered about changing the testcase to initialise high, but that seemed like a bad idea for a regression test.) For (3): MVE seems to be the only thing to use arm_coproc_mem_operand_wb (and its various interfaces) for 16-bit scalars: the Neon patterns only use it for 32-bit scalars. I've added new tests to try the various FPR alternatives of the move patterns. The range of offsets that GCC uses for FPR loads and stores is the intersection of the range allowed for GPRs and FPRs, so the tests include GPR<->memory tests as well. The fp32 and fp64 tests already pass, they're just there for completeness. gcc/ * config/arm/arm-protos.h (arm_mve_mode_and_operands_type_check): Delete. * config/arm/arm.c (arm_coproc_mem_operand_wb): Use a scale factor of 2 rather than 4 for 16-bit modes. (arm_mve_mode_and_operands_type_check): Delete. * config/arm/constraints.md (Uj): Allow writeback for Neon, but continue to disallow it for MVE. * config/arm/arm.md (*arm32_mov<HFBF:mode>): Add !TARGET_HAVE_MVE. * config/arm/vfp.md (*mov_load_vfp_hf16, *mov_store_vfp_hf16): Fold back into... (*mov<mode>_vfp_<mode>16): ...here but use Uj for the FPR memory constraints. Use for base MVE too. gcc/testsuite/ * gcc.target/arm/mve/intrinsics/mve-vldstr16-no-writeback.c: Allow the store to use GPRs instead of FPRs. Add scan-assembler-nots for writeback. * gcc.target/arm/armv8_1m-fp16-move-1.c: New test. * gcc.target/arm/armv8_1m-fp32-move-1.c: Likewise. * gcc.target/arm/armv8_1m-fp64-move-1.c: Likewise.
2020-09-25tree-optimization/97199 - fix virtual operand update in if-conversionRichard Biener1-44/+63
This fixes a corner case with virtual operand update in if-conversion by re-organizing the code to remove edges only after the last point we need virtual PHI operands to be available. 2020-09-25 Richard Biener <rguenther@suse.de> PR tree-optimization/97199 * tree-if-conv.c (combine_blocks): Remove edges only after looking at virtual PHI args.
2020-09-25testsuite: [aarch64] Fix aarch64/advsimd-intrinsics/v{trn,uzp,zip}_half.cChristophe Lyon3-9/+0
Since r11-3402 (g:65c9878641cbe0ed898aa7047b7b994e9d4a5bb1), the vtrn_half, vuzp_half and vzip_half started failing with vtrn_half.c:76:17: error: redeclaration of 'vector_float64x2' with no linkage vtrn_half.c:77:17: error: redeclaration of 'vector2_float64x2' with no linkage vtrn_half.c:80:17: error: redeclaration of 'vector_res_float64x2' with no linkage This is because r11-3402 now always declares float64x2 variables for aarch64, leading to a duplicate declaration in these testcases. The fix is simply to remove these now useless declarations. These tests are skipped on arm*, so there is no impact on that target. 2020-09-25 Christophe Lyon <christophe.lyon@linaro.org> gcc/testsuite/ PR target/71233 * gcc.target/aarch64/advsimd-intrinsics/vtrn_half.c: Remove declarations of vector, vector2, vector_res for float64x2 type. * gcc.target/aarch64/advsimd-intrinsics/vuzp_half.c: Likewise. * gcc.target/aarch64/advsimd-intrinsics/vzip_half.c: Likewise.
2020-09-25testsuite/97204 - fix gcc.target/i386/sse2-mmx-pinsrw.cRichard Biener1-4/+4
This fixes the testcase writing to adjacent stack vars, exposed my IPA modref. 2020-09-25 Richard Biener <rguenther@suse.de> PR testsuite/97204 * gcc.target/i386/sse2-mmx-pinsrw.c: Fix.
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