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2018-04-10Add missing cases to vect_get_smallest_scalar_type (PR 85286)Richard Sandiford4-0/+31
In this PR we used WIDEN_SUM_EXPR to vectorise: short i, y; int sum; [...] for (i = x; i > 0; i--) sum += y; with 4 ints and 8 shorts per vector. The problem was that we set the VF based only on the ints, then calculated the number of vector copies based on the shorts, giving 4/8. Previously that led to ncopies==0, but after r249897 we pick it up as an ICE. In this particular case we could vectorise the reduction by setting ncopies based on the output type rather than the input type, but it doesn't seem worth adding a special "optimisation" for such a pathological case. I think it's really an instance of the more general problem that we can't vectorise using combinations of (say) 64-bit and 128-bit vectors on targets that support both. 2018-04-10 Richard Sandiford <richard.sandiford@linaro.org> gcc/ PR tree-optimization/85286 * tree-vect-data-refs.c (vect_get_smallest_scalar_type): gcc/testsuite/ PR tree-optimization/85286 * gcc.dg/vect/pr85286.c: New test. From-SVN: r259268
2018-04-10Set insn_last_address in final_1Richard Sandiford2-0/+8
final_1 already sets insn_current_address for each instruction, making it possible to use some of the address functions in final.c during assembly generation. This patch also sets insn_last_address, since as the comment says, we can treat final as a shorten_branches pass that does nothing. It's then possible to use insn_current_reference_address during final as well. This is needed for the aarch64.md definitions of far_branch to work: (set (attr "far_branch") (if_then_else (and (ge (minus (match_dup 2) (pc)) (const_int -1048576)) (lt (minus (match_dup 2) (pc)) (const_int 1048572))) (const_int 0) (const_int 1)))] This value (tested only during final) uses the difference between the INSN_ADDRESSES of operand 2 and insn_current_reference_address to calculate a conservatively-correct estimate of the branch distance. It takes into account the worst-case gap due to alignment, whereas a direct comparison of INSN_ADDRESSES would give an unreliable, optimistic result. 2018-04-10 Richard Sandiford <richard.sandiford@linaro.org> gcc/ * final.c (final_1): Set insn_last_address as well as insn_current_address. From-SVN: r259267
2018-04-10[explow] PR target/85173: validize memory before passing it on to target ↵Kyrylo Tkachov4-3/+42
probe_stack In this PR the expansion code emits an invalid memory address for the stack probe, which the backend fails to recognise. The address is created explicitly in anti_adjust_stack_and_probe_stack_clash in explow.c and passed down to gen_probe_stack without any validation in emit_stack_probe. This patch fixes the ICE by calling validize_mem on the memory location before passing it down to the target. Jakub pointed out that we also want to create valid addresses for the probe_stack_address case, so this patch creates an expand operand and legitimizes it before passing it down to the probe_stack_address expander. This patch passes bootstrap and testing on arm-none-linux-gnueabihf and aarch64-none-linux-gnu and ppc64le-redhat-linux on gcc112 in the compile farm. PR target/85173 * explow.c (emit_stack_probe): Call validize_mem on memory location before passing it to gen_probe_stack. Create address operand and legitimize it for the probe_stack_address case. * gcc.target/arm/pr85173.c: New test. From-SVN: r259266
2018-04-10Be more carefull about DECL merging in LTO (PR lto/85248).Martin Liska5-0/+82
2018-04-10 Richard Biener <rguenther@suse.de> Martin Liska <mliska@suse.cz> PR lto/85248 * lto-symtab.c (lto_symtab_merge_p): Handle noreturn attribute. 2018-04-10 Jakub Jelinek <jakub@redhat.com> PR lto/85248 * gcc.dg/lto/pr85248_0.c: New test. * gcc.dg/lto/pr85248_1.c: New test. From-SVN: r259265
2018-04-10re PR lto/85078 (LTO ICE: tree check: expected tree that contains 'decl ↵Jan Hubicka6-1/+79
minimal' structure, have 'identifier_node' in decl_mangling_context, at cp/mangle.c:878) PR lto/85078 * ipa-devirt.c (rebuild_type_inheritance-hash): New. * ipa-utils.h (rebuild_type_inheritance-hash): Declare. * tree.c (free_lang_data_in_type): Fix handling of binfos; walk basetypes. (free_lang_data): Rebuild type inheritance graph. * g++.dg/torture/pr85078.C: New. From-SVN: r259264
2018-04-10Daily bump.GCC Administrator1-1/+1
From-SVN: r259263
2018-04-09re PR c++/85227 (ICE with structured binding of a forward declared variable)Paolo Carlini5-0/+43
/cp 2018-04-09 Paolo Carlini <paolo.carlini@oracle.com> PR c++/85227 * decl.c (cp_finish_decomp): In a template, if the type is incomplete issue a pedwarn and defer trying to do bindings. /testsuite 2018-04-09 Paolo Carlini <paolo.carlini@oracle.com> PR c++/85227 * g++.dg/cpp1z/decomp44.C: New. * g++.dg/cpp1z/decomp45.C: Likewise. From-SVN: r259259
2018-04-09re PR fortran/83064 (DO CONCURRENT and auto-parallelization)Thomas Koenig5-2/+88
2018-04-09 Thomas Koenig <tkoenig@gcc.gnu.org> PR fortran/83064 * trans-stmt.c (gfc_trans_forall_loop): Remove annotation for parallell processing of DO CONCURRENT -ftree-parallelize-loops is set. 2018-04-09 Thomas Koenig <tkoenig@gcc.gnu.org> PR fortran/83064 * gfortran.dg/do_concurrent_5.f90: New test. * gfortran.dg/vect/vect-do-concurrent-1.f90: Adjust dg-bogus message. From-SVN: r259258
2018-04-09PR c++/85279 - dump_expr doesn't understand decltype.Jason Merrill3-0/+11
* error.c (dump_expr): Handle DECLTYPE_TYPE. From-SVN: r259257
2018-04-09re PR fortran/51260 (PARAMETER array with constructor initializer: ↵Thomas Koenig4-0/+38
Compile-time simplify single element access) 2018-04-09 Thomas Koenig <tkoenig@gcc.gnu.org> PR fortran/51260 * resolve.c (resolve_variable): Simplify cases where access to a parameter array results in a single constant. 2018-04-09 Thomas Koenig <tkoenig@gcc.gnu.org> PR fortran/51260 * gfortran.dg/parameter_array_element_3.f90: New test. From-SVN: r259256
2018-04-09PR c++/85262 - ICE with redundant qualification on constructor.Jason Merrill3-8/+27
* call.c (build_new_method_call_1): Move make_args_non_dependent after A::A() handling. From-SVN: r259255
2018-04-09PR c++/85277 - ICE with invalid offsetof.Jason Merrill6-17/+23
* semantics.c (finish_offsetof): Avoid passing non-DECL to %qD. Adjust -Winvalid-offsetof diagnostic to say conditionally supported. From-SVN: r259254
2018-04-09PR c++/85264 - ICE with excess template-parameter-list.Jason Merrill3-6/+36
* parser.c (cp_parser_check_template_parameters): Add template_id_p parameter. Don't allow an extra template header if true. (cp_parser_class_head): Pass template_id_p. (cp_parser_elaborated_type_specifier): Likewise. (cp_parser_alias_declaration): Likewise. (cp_parser_check_declarator_template_parameters): Likewise. From-SVN: r259253
2018-04-09re PR c++/85194 (ICE with structured binding in broken for-loop)Jakub Jelinek4-1/+31
PR c++/85194 * parser.c (cp_parser_simple_declaration): For structured bindings, if *maybe_range_for_decl is NULL after parsing it, set it to error_mark_node. * g++.dg/cpp1z/decomp43.C: New test. From-SVN: r259252
2018-04-09invoke.texi (-finline-small-functions): Mention other optimization options.Martin Sebor2-5/+13
gcc/doc/ChangeLog: * invoke.texi (-finline-small-functions): Mention other optimization options. (-findirect-inlining, -fpartial-inlining): Same. (-finline-functions-called-once): Same. (-freorder-blocks-and-partition): Same. From-SVN: r259250
2018-04-09re PR rtl-optimization/80463 (ICE with -fselective-scheduling2 and ↵Jakub Jelinek2-1/+6
-fvar-tracking-assignments) PR rtl-optimization/80463 * g++.dg/pr80463.C: Add -w to dg-options. From-SVN: r259249
2018-04-09re PR rtl-optimization/84058 (RTl partitioning fixup should drag very small ↵Jan Hubicka3-33/+32
blocks back to hot partition) PR rtl/84058 * cfgcleanup.c (try_forward_edges): Do not give up on crossing jumps; choose last target that matches the criteria (i.e. no partition changes for non-crossing jumps). * cfgrtl.c (cfg_layout_redirect_edge_and_branch): Add basic support for redirecting crossing jumps to non-crossing. From-SVN: r259244
2018-04-09PR c++/85256 - ICE capturing pointer to VLA.Jason Merrill6-6/+22
* lambda.c (add_capture): Distinguish between variable-size and variably-modified types. From-SVN: r259240
2018-04-09* g++.dg/opt/pr85196.C: Fix for -std=c++17.Jason Merrill1-1/+1
From-SVN: r259239
2018-04-09[ARC] Fix stack usage info for naked functions.Alexey Brodkin2-1/+10
gcc/ 2018-04-09 Alexey Brodkin <abrodkin@synopsys.com> * config/arc/arc.c (arc_expand_prologue): Set stack usage info also for naked functions. From-SVN: r259238
2018-04-09[ARC] Add/update combiner patterns.Claudiu Zissulescu3-47/+261
gcc/ 2018-01-26 Claudiu Zissulescu <claziss@synopsys.com> * config/arc/arc.md (add_shift): New pattern. (add_shift2): Likewise. (sub_shift): Likewise. (sub_shift_cmp0_noout): Likewise. (compare_si_ashiftsi): Likewise. (xbfu_cmp0_noout): New combine pattern. (xbfu_cmp0"): Likewise. (movsi_set_cc_insn): Place the predicable variant first. (commutative_binary_cmp0_noout): Remove clobber. (commutative_binary_cmp0): New pattern. (noncommutative_binary_cmp0): Likewise. (noncommutative_binary_cmp0_noout): Likewise. (noncommutative_binary_comparison_result_used): Removed. (rsub_cmp0): New pattern. (rsub_cmp0_noout): Likewise. (extzvsi): Changed, keep only meaningful variants. (SQH, SEZ): New iterators. (SQH_postfix): New mode attribute. (SEZ_prefix): New code attribute. (<SEZ_prefix>xt<SQH_postfix>_cmp0_noout): New instruction pattern. (<SEZ_prefix>xt<SQH_postfix>_cmp0): Likewise. * config/arc/predicates.md (cc_set_register): Use CC_REG instead of numerical value. (noncommutative_operator): Check the availability of barrel shifter option. From-SVN: r259237
2018-04-09re PR tree-optimization/85284 (Loop miscompilation starting with r238367)Richard Biener4-2/+34
2018-04-09 Richard Biener <rguenther@suse.de> PR tree-optimization/85284 * tree-ssa-loop-niter.c (number_of_iterations_exit_assumptions): Only use the niter constraining form of simple_iv when the exit is always executed. * gcc.dg/torture/pr85284.c: New testcase. From-SVN: r259234
2018-04-09[nvptx] Add memory_barrier insnTom de Vries2-0/+29
2018-04-09 Tom de Vries <tom@codesourcery.com> PR target/84041 * config/nvptx/nvptx.md (define_c_enum "unspecv"): Add UNSPECV_MEMBAR. (define_expand "*memory_barrier"): New define_expand. (define_insn "memory_barrier"): New insn. From-SVN: r259233
2018-04-09re PR rtl-optimization/80463 (ICE with -fselective-scheduling2 and ↵Andrey Belevantsev6-5/+149
-fvar-tracking-assignments) PR rtl-optimization/80463 PR rtl-optimization/83972 PR rtl-optimization/83480 * sel-sched-ir.c (has_dependence_note_mem_dep): Take into account the correct producer for the insn. (tidy_control_flow): Fixup seqnos in case of debug insns. * gcc.dg/pr80463.c: New test. * g++.dg/pr80463.C: Likewise. * gcc.dg/pr83972.c: Likewise. From-SVN: r259231
2018-04-09re PR rtl-optimization/83913 (Compile time and memory hog w/ selective ↵Andrey Belevantsev4-2/+44
scheduling) PR rtl-optimization/83913 * sel-sched-ir.c (merge_expr_data): Choose the middle between two different sched-times when merging exprs. * gcc.dg/pr83913.c: New test. From-SVN: r259230
2018-04-09re PR rtl-optimization/83962 (ICE: verify_flow_info failed (too many ↵Andrey Belevantsev4-2/+28
outgoing branch edges from bb 8)) PR rtl-optimization/83962 * sel-sched-ir.c (tidy_control_flow): Correct the order in which we call tidy_fallthru_edge and tidy_control_flow. * gcc.dg/pr83962.c: New test. From-SVN: r259229
2018-04-09re PR rtl-optimization/83530 (ICE in reset_sched_cycles_in_current_ebb, at ↵Andrey Belevantsev4-4/+44
sel-sched.c:7150) PR rtl-optimization/83530 * sel-sched.c (force_next_insn): New global variable. (remove_insn_for_debug): When force_next_insn is true, also leave only next insn in the ready list. (sel_sched_region): When the region wasn't scheduled, make another pass over it with force_next_insn set to 1. * gcc.dg/pr83530.c: New test. From-SVN: r259228
2018-04-09Daily bump.GCC Administrator1-1/+1
From-SVN: r259227
2018-04-08invoke.texi (-Wrestrict, [...]): Tweak text.Martin Sebor1-6/+6
gcc/ChangeLog: * invoke.texi (-Wrestrict, -fprintf-return-value): Tweak text. From-SVN: r259224
2018-04-08[NDS32] Add intrinsic functions for interrupt control.Monk Chiang7-2/+660
gcc/ * config.gcc (nds32le-*-*, nds32be-*-*): Add nds32/nds32_intrinsic.h into tm_file. * config/nds32/constants.md (unspec_volatile_element): Add enum values for interrupt control. * config/nds32/nds32-intrinsic.c: Implementation of intrinsic functions for interrupt control. * config/nds32/nds32-intrinsic.md: Likewise. * config/nds32/nds32_intrinsic.h: Likewise. * config/nds32/nds32.h (nds32_builtins): Likewise. From-SVN: r259223
2018-04-08[NDS32] Add strict_aligned_p to machine_function and implement ↵Chung-Ju Wu3-4/+58
TARGET_EXPAND_TO_RTL_HOOK. gcc/ * config/nds32/nds32.c (nds32_init_machine_status, nds32_legitimate_index_p, nds32_legitimate_address_p): Consider strict_aligned_p field. (nds32_expand_to_rtl_hook): New function. (TARGET_EXPAND_TO_RTL_HOOK): Define. * config/nds32/nds32.h (machine_function): Add strict_aligned_p field. From-SVN: r259222
2018-04-08[NDS32] Implement n7 pipeline.Kito Cheng9-4/+457
gcc/ * config.gcc (nds32*-*-*): Check that n7 is valid to --with-cpu. * config/nds32/nds32-n7.md: New file. * config/nds32/nds32-opts.h (nds32_cpu_type): Add CPU_N7. * config/nds32/nds32-pipelines-auxiliary.c: Implementation for n7 pipeline. * config/nds32/nds32-protos.h: More declarations for n7 pipeline. * config/nds32/nds32.md (pipeline_model): Add n7. * config/nds32/nds32.opt (mcpu): Support n7 pipeline cpus. * config/nds32/pipelines.md: Include n7 settings. Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com> From-SVN: r259221
2018-04-08[NDS32] Implement e8 pipeline.Kito Cheng9-4/+514
gcc/ * config.gcc (nds32*-*-*): Check that e8 is valid to --with-cpu. * config/nds32/nds32-e8.md: New file. * config/nds32/nds32-opts.h (nds32-cpu_type): Add CPU_E8. * config/nds32/nds32-pipelines-auxiliary.c: Implementation for e8 pipeline. * config/nds32/nds32-protos.h: More declarations for e8 pipeline. * config/nds32/nds32.md (pipeline_model): Add e8. * config/nds32/nds32.opt (mcpu): Support e8 pipeline cpus. * config/nds32/pipelines.md: Include e8 settings. Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com> From-SVN: r259220
2018-04-08[NDS32] Implement n8 pipeline.Kito Cheng10-4/+810
gcc/ * config.gcc (nds32*-*-*): Check that n6/n8/s8 are valid to --with-cpu. * config/nds32/nds32-n8.md: New file. * config/nds32/nds32-opts.h (nds32_cpu_type): Add CPU_N6 and CPU_N8. * config/nds32/nds32-pipelines-auxiliary.c: Implementation for n8 pipeline. * config/nds32/nds32-protos.h: More declarations for n8 pipeline. * config/nds32/nds32-utils.c: More implementations for n8 pipeline. * config/nds32/nds32.md (pipeline_model): Add n8. * config/nds32/nds32.opt (mcpu): Support n8 pipeline cpus. * config/nds32/pipelines.md: Include n8 settings. Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com> From-SVN: r259219
2018-04-08[NDS32] Implment n9 pipeline.Kito Cheng13-10/+1871
gcc/ * config.gcc (nds32*): Add nds32-utils.o into extra_objs. * config/nds32/nds32-n9-2r1w.md: New file. * config/nds32/nds32-n9-3r2w.md: New file. * config/nds32/nds32-opts.h (nds32_cpu_type, nds32_mul_type, nds32_register_ports): New or modify for cpu n9. * config/nds32/nds32-pipelines-auxiliary.c: Implementation for n9 pipeline. * config/nds32/nds32-protos.h: More declarations for n9 pipeline. * config/nds32/nds32-utils.c: New file. * config/nds32/nds32.h (TARGET_PIPELINE_N9, TARGET_PIPELINE_SIMPLE, TARGET_MUL_SLOW): Define. * config/nds32/nds32.md (pipeline_model): New attribute. * config/nds32/nds32.opt (mcpu, mconfig-mul, mconfig-register-ports): New options that support cpu n9. * config/nds32/pipelines.md: Include n9 settings. * config/nds32/t-nds32 (nds32-utils.o): Add dependency. Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com> From-SVN: r259218
2018-04-08[NDS32] New option -malways-align and -malign-functions.Chung-Ju Wu6-34/+100
gcc/ * config/nds32/nds32-md-auxiliary.c (output_cond_branch): Output align information if necessary. (output_cond_branch_compare_zero): Likewise. * config/nds32/nds32.c (nds32_adjust_insn_length): Consider align case. (nds32_target_alignment): Refine for alignment. * config/nds32/nds32.h (NDS32_ALIGN_P): Define. (FUNCTION_BOUNDARY): Modify. * config/nds32/nds32.md (call_internal, call_value_internal): Consider align case. * config/nds32/nds32.opt (malways-align, malign-functions): New. From-SVN: r259217
2018-04-08[NDS32] Add intrinsic functions for TLB operation and data prefech.Monk Chiang7-0/+272
gcc/ * config/nds32/constants.md (unspec_volatile_element): Add values for TLB operation and data prefetch. * config/nds32/nds32-intrinsic.c: Implementation of intrinsic functions for TLB operation and data prefetch. * config/nds32/nds32-intrinsic.md: Likewise. * config/nds32/nds32_intrinsic.h: Likewise. * config/nds32/nds32.c (nds32_dpref_names): Likewise. (nds32_print_operand): Likewise. * config/nds32/nds32.h (nds32_builtins): Likewise. From-SVN: r259216
2018-04-08Daily bump.GCC Administrator1-1/+1
From-SVN: r259215
2018-04-07re PR middle-end/82976 (Error: non-trivial conversion at assignment since ↵Thomas Koenig4-1/+43
r254526) 2018-04-07 Thomas Koenig <tkoenig@gcc.gnu.org> Andrew Pinski <pinsika@gcc.gnu.org> PR middle-end/82976 * match.pd: Use constant_boolean_node of correct type instead of boolean_true_node or boolean_false_node for simplifying pointer comparisons to zero. 2018-04-07 Thomas Koenig <tkoenig@gcc.gnu.org> PR middle-end/82976 * gfortran.dg/realloc_on_assign_16a.f90: New test. Co-Authored-By: Andrew Pinski <pinskia@gcc.gnu.org> From-SVN: r259212
2018-04-07re PR tree-optimization/80021 (untranslateable diagnostic "type variant ↵Jakub Jelinek2-1/+7
differs by " #flag ".") PR tree-optimization/80021 * tree.c (verify_type_variant): Make error call in verify_variant_match translatable and remove final full stop. From-SVN: r259211
2018-04-07[NDS32] Support dwarf exception handling.Chung-Ju Wu7-9/+280
gcc/ * config/nds32/constants.md (unspec_volatile_element): Add UNSPEC_VOLATILE_EH_RETURN. * config/nds32/nds32-md-auxiliary.c (nds32_output_stack_push, nds32_output_stack_pop): Support dwarf exception handling process. * config/nds32/nds32-protos.h (nds32_dynamic_chain_address): Declare. * config/nds32/nds32.c (nds32_init_machine_status): Support dwarf exception handling process. (nds32_compute_stack_frame): Likewise. (nds32_return_addr_rtx): Likewise. (nds32_initial_elimination_offset): Likewise. (nds32_expand_prologue): Likewise. (nds32_expand_epilogue): Likewise. (nds32_dynamic_chain_address): New function. * config/nds32/nds32.h (machine_function): Add fields for dwarf exception handling. (DYNAMIC_CHAIN_ADDRESS): Define. (EH_RETURN_DATA_REGNO): Define. (EH_RETURN_STACKADJ_RTX): Define. * config/nds32/nds32.md (eh_return, nds32_eh_return): Implement patterns for dwarf exception handling. From-SVN: r259210
2018-04-07[NDS32] Clean up nds32.h.Chung-Ju Wu2-59/+4
gcc/ * config/nds32/nds32.h: Clean up obsolete macros. From-SVN: r259209
2018-04-07[NDS32] Add intrinsic functions for particular instructions.Monk Chiang7-5/+801
gcc/ * config/nds32/constants.md (unspec_element, unspec_volatile_element): Add enum values for particular instructions. * config/nds32/nds32-intrinsic.c: Implementation of expanding particular intrinsic functions. * config/nds32/nds32-intrinsic.md: Likewise. * config/nds32/nds32_intrinsic.h: Likewise. * config/nds32/nds32.h (nds32_builtins): Likewise. * config/nds32/nds32.md (type): Add pbsad and pbsada. (btst, ave): New patterns for particular instructions. From-SVN: r259208
2018-04-07[NDS32] Add intrinsic functions for atomic load/store and memory sync.Monk Chiang6-0/+324
gcc/ * config/nds32/constants.md (unspec_element, unspec_volatile_element): Add enum values for atomic load/store and memory sync. * config/nds32/nds32-intrinsic.c: Implementation for atomic load/store and memory sync. * config/nds32/nds32-intrinsic.md: Likewise. * config/nds32/nds32_intrinsic.h: Likewise. * config/nds32/nds32.h (nds32_builtins): Likewise. From-SVN: r259207
2018-04-07re PR tree-optimization/85257 (wrong code with -O -fno-tree-ccp and reading ↵Jakub Jelinek5-7/+40
zeroed vector member) PR tree-optimization/85257 * fold-const.c (native_encode_vector): If not all elts could fit and off is -1, return 0 rather than offset. * tree-ssa-sccvn.c (vn_reference_lookup_3): Pass (offseti - offset2) / BITS_PER_UNIT as 4th argument to native_encode_expr. Verify len * BITS_PER_UNIT >= maxsizei. Don't adjust buffer in native_interpret_expr call. * gcc.dg/pr85257.c: New test. From-SVN: r259206
2018-04-07[NDS32] Add intrinsic functions for cache control.Monk Chiang9-3/+339
gcc/ * config/nds32/constants.md (unspec_volatile_element): Add cache control enum values. * config/nds32/nds32-intrinsic.c: Add cache control expand functions. * config/nds32/nds32-intrinsic.md: Add cache control patterns. * config/nds32/nds32.c (nds32_cctl_names): New. (nds32_print_operand): Handle cache control register names. * config/nds32/nds32.h (nds32_builtins): New enum values. * config/nds32/nds32_intrinsic.h: Add cache control enum types and macros. * config/nds32/nds32.md (type): Add mmu. * config/nds32/pipelines.md (simple_insn): Add mmu. From-SVN: r259205
2018-04-07[NDS32] Remove unused insn type: call.Chung-Ju Wu3-2/+7
gcc/ * config/nds32/nds32.md (type): Remove call. * config/nds32/pipelines.md (simple_insn): Likewise. From-SVN: r259204
2018-04-07[NDS32] Add intrinsic functions for FPU.Monk Chiang6-0/+164
gcc/ * config/nds32/constants.md (unspec_volatile_element): Add UNSPEC_VOLATILE_FMFCSR, UNSPEC_VOLATILE_FMTCSR and UNSPEC_VOLATILE_FMFCFG. * config/nds32/nds32-intrinsic.c (bdesc_noarg): New builtin description for fmfcfg and fmfcsr. (bdesc_1arg): Add fmtcsr. (bdesc_2arg): Add fcpynss, fcpyss, fcpynsd and fcpysd. (nds32_expand_builtin_impl): Deal with FPU intrinsic functions. * config/nds32/nds32-intrinsic.md (unspec_fcpynsd, unspec_fcpysd, unspec_fcpynss, unspec_fcpysd, unspec_fcpyss, unspec_fmfcsr, unspec_fmfcfg): New patterns. * config/nds32/nds32.h (nds32_builtins): Add NDS32_BUILTIN_FMFCFG, NDS32_BUILTIN_FMFCSR, NDS32_BUILTIN_FMTCSR, NDS32_BUILTIN_FCPYNSS, NDS32_BUILTIN_FCPYSS,NDS32_BUILTIN_FCPYNSD and NDS32_BUILTIN_FCPYSD. * config/nds32/nds32_intrinsic.h (__nds32__fcpynsd, __nds32__fcpynss, __nds32__fcpysd, __nds32__fcpyss, __nds32__fmfcsr, __nds32__fmtcsr, __nds32__fmfcfg): Define. From-SVN: r259203
2018-04-07[NDS32] Add more intrinsic register names.Monk Chiang3-3/+474
gcc/ * config/nds32/nds32.c (nds32_intrinsic_register_names): Add more intrinsic register names. * config/nds32/nds32_intrinsic.h (nds32_intrinsic_registers): Add more intrinsic register enum values and macros. From-SVN: r259202
2018-04-07[NDS32] Support [$ra + $rb << 3] form for load/store address.Chung-Ju Wu2-5/+15
gcc/ * config/nds32/nds32.c (nds32_legitimate_index_p): Modify condition for load/store addressing form. (nds32_print_operand_address): Likewise. From-SVN: r259201
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