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config/i386/i386.c:13810 with -Og -fgcse)
PR middle-end/85414
* simplify-rtx.c (simplify_unary_operation_1) <case SIGN_EXTEND,
case ZERO_EXTEND>: Pass SUBREG_REG (op) rather than op to
gen_lowpart_no_emit.
From-SVN: r259649
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2018-04-25 Sebastian Peryt <sebastian.peryt@intel.com>
gcc/ChangeLog:
PR target/85473
* config/i386/i386.c (ix86_expand_builtin): Change memory
operand to XI, extend p0 to Pmode.
* config/i386/i386.md: Change unspec volatile and operand
1 mode to XI, change operand 0 mode to P.
gcc/testsuite/ChangeLog:
PR target/85473
* gcc.target/i386/pr85473-1.c: New test.
* gcc.target/i386/pr85473-2.c: New test.
From-SVN: r259648
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gcc/
* config/nds32/nds32-predicates.c (nds32_can_use_bclr_p): Mask with
GET_MODE_MASK before any checking.
(nds32_can_use_bset_p): Likewise.
(nds32_can_use_btgl_p): Likewise.
From-SVN: r259647
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gcc/
* config/nds32/nds32-doubleword.md: New define_split pattern for
illegal register number.
From-SVN: r259646
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gcc/
* config/nds32/nds32.c (nds32_print_operand): Set op_value ealier.
From-SVN: r259643
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gcc/
* config/nds32/nds32.h (ASM_APP_ON): Add missing newline character.
From-SVN: r259642
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PR sanitizer/84307
* c-decl.c (build_compound_literal): Call pushdecl (decl) even when
it is not TREE_STATIC.
* c-typeck.c (c_mark_addressable) <case COMPOUND_LITERAL_EXPR>: Mark
not just the COMPOUND_LITERAL_EXPR node itself addressable, but also
its COMPOUND_LITERAL_EXPR_DECL.
From-SVN: r259641
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PR ada/85007
* gnat_ugn.texi: Regenerate.
From-SVN: r259639
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2018-04-25 Richard Biener <rguenther@suse.de>
* lto-streamer.h (LTO_major_version): Bump to 8.
From-SVN: r259638
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From-SVN: r259635
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PR c++/85437
PR c++/49171
* cp-tree.h (REINTERPRET_CAST_P): New.
* constexpr.c (cxx_eval_constant_expression) <case NOP_EXPR>:
Reject REINTERPET_CAST_P conversions. Use cplus_expand_constant
for non-trivial PTRMEM_CST cases.
* typeck.c (build_nop_reinterpret): New.
(build_reinterpret_cast_1): Use it. Set REINTERPRET_CAST_P on
NOP_EXPRs returned by cp_convert.
* g++.dg/cpp0x/addressof1.C: Make reinterpret cases runtime checks.
* g++.dg/cpp0x/constexpr-cast.C: Remove xfails
* g++.dg/cpp0x/constexpr-nullptr-2.C: Likewise.
* g++.dg/cpp0x/constexpr-pmf1.C: Check when optimized.
* g++.dg/cpp0x/pr85437-1.C: New.
* g++.dg/cpp0x/pr85437-2.C: New.
* g++.dg/cpp0x/pr85437-3.C: New.
* g++.dg/cpp0x/pr85437-4.C: New.
From-SVN: r259629
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From-SVN: r259628
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2018-04-24 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/85520
* decl.c (gfc_match_char_spec): Check for negative length and set to 0.
2018-04-24 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/85520
* gfortran.dg/pr85520.f90: New test.
From-SVN: r259623
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Both of these libfuncs had a "tkf" misspelling, which caused
gcc.target/powerpc/pr85456.c to fail (there is no test for __abskf2).
* config/rs6000/rs6000.c (init_float128_ieee): Fix spelling mistakes
in __abskf2 and __powikf2.
From-SVN: r259622
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In this testcase it is possible to generate an invalid SISD shift of zero:
Error: immediate value out of range 1 to 64 at operand 3 -- `sshr v9.2s,v0.2s,0'
The SSHR and USHR instructions require a shift from 1 up to the element size.
However our constraints on the scalar shifts that generate these patterns
allow a shift amount of zero as well. The pure GP-reg ASR and LSR instructions allow a shift amount of zero.
It is unlikely that a shift of zero will survive till the end of compilation, but it's not impossible, as this PR shows.
The patch tightens up the constraints in the offending patterns by adding two new constraints
that allow shift amounts [1,32] and [1,64] and using them in *aarch64_ashr_sisd_or_int_<mode>3
and *aarch64_lshr_sisd_or_int_<mode>3.
The left-shift SISD instructions SHL and USHL allow a shift amount of zero so don't need adjustment
The vector shift patterns that map down to SSHR and USHR already enforce the correct immediate range.
PR target/85512
* config/aarch64/constraints.md (Usg, Usj): New constraints.
* config/aarch64/iterators.md (cmode_simd): New mode attribute.
* config/aarch64/aarch64.md (*aarch64_ashr_sisd_or_int_<mode>3):
Use the above on operand 2. Reindent.
(*aarch64_lshr_sisd_or_int_<mode>3): Likewise.
* gcc.dg/pr85512.c: New test.
From-SVN: r259614
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With revision 259496:
commit b1384095a7c1d06a44b70853372ebe037b2f7867
Author: hjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Thu Apr 19 15:15:04 2018 +0000
x86: Enable -fcf-protection with multi-byte NOPs
-fcf-protection no longer depens on -mcet and with revision 259522:
commit d59cfa9a4064339cf2bd2da828c4c133f13e57f0
Author: hjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Fri Apr 20 13:30:13 2018 +0000
Define __CET__ for -fcf-protection and remove -mibt
-mcet becomes an alias for -mshstk. Since all usages of -mcet and
-mno-cet have either been removed or replaced, we can remove the -mcet
command-lint option.
PR target/85485
* common/config/i386/i386-common.c (ix86_handle_option): Don't
handle OPT_mcet.
* config/i386/i386.opt (mcet): Removed.
* doc/install.texi: Remove -mcet documentation.
* doc/invoke.texi: Likewise.
From-SVN: r259613
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With revision 259496:
commit b1384095a7c1d06a44b70853372ebe037b2f7867
Author: hjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Thu Apr 19 15:15:04 2018 +0000
x86: Enable -fcf-protection with multi-byte NOPs
-fcf-protection no longer depens on -mcet and with revision 259522:
commit d59cfa9a4064339cf2bd2da828c4c133f13e57f0
Author: hjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Fri Apr 20 13:30:13 2018 +0000
Define __CET__ for -fcf-protection and remove -mibt
-mcet becomes an alias for -mshstk.
We can remove -mcet/-mno-cet where they are unused and replace -mcet
with -mshstk where -mcet is used as an alias for -mshstk.
PR target/85485
* g++.dg/cet-notrack-1.C (dg-options): Remove -mcet.
* g++.dg/torture/pr85334.C (dg-additional-options): Likwise.
* gcc.dg/pr85388-1.c (dg-options): Likwise.
* gcc.dg/pr85388-2.c (dg-options): Likwise.
* gcc.dg/pr85388-3.c (dg-options): Likwise.
* gcc.dg/pr85388-4.c (dg-options): Likwise.
* gcc.dg/pr85388-5.c (dg-options): Likwise.
* gcc.dg/pr85388-6.c (dg-options): Likwise.
* gcc.dg/torture/pr85397-1.c (dg-additional-options): Likwise.
* gcc.target/i386/attr-nocf-check-1a.c (dg-options): Likwise.
* gcc.target/i386/attr-nocf-check-3a.c (dg-options): Likwise.
* gcc.target/i386/cet-label.c (dg-options): Likwise.
* gcc.target/i386/cet-label-2.c (dg-options): Likwise.
* gcc.target/i386/cet-notrack-1b.c (dg-options): Likwise.
* gcc.target/i386/cet-notrack-2a.c (dg-options): Likwise.
* gcc.target/i386/cet-notrack-2b.c (dg-options): Likwise.
* gcc.target/i386/cet-notrack-3.c (dg-options): Likwise.
* gcc.target/i386/cet-notrack-4b.c (dg-options): Likwise.
* gcc.target/i386/cet-notrack-5a.c (dg-options): Likwise.
* gcc.target/i386/cet-notrack-5b.c (dg-options): Likwise.
* gcc.target/i386/cet-notrack-6a.c (dg-options): Likwise.
* gcc.target/i386/cet-notrack-6b.c (dg-options): Likwise.
* gcc.target/i386/cet-notrack-7.c (dg-options): Likwise.
* gcc.target/i386/cet-notrack-icf-2.c (dg-options): Likwise.
* gcc.target/i386/cet-notrack-icf-4.c (dg-options): Likwise.
* gcc.target/i386/cet-property-1.c (dg-options): Likwise.
* gcc.target/i386/cet-property-2.c (dg-options): Likwise.
* gcc.target/i386/cet-sjlj-1.c (dg-options): Likwise.
* gcc.target/i386/cet-sjlj-2.c (dg-options): Likwise.
* gcc.target/i386/cet-sjlj-3.c (dg-options): Likwise.
* gcc.target/i386/cet-sjlj-4.c (dg-options): Likwise.
* gcc.target/i386/cet-sjlj-5.c (dg-options): Likwise.
* gcc.target/i386/cet-sjlj-6a.c (dg-options): Likwise.
* gcc.target/i386/cet-sjlj-6b.c (dg-options): Likwise.
* gcc.target/i386/cet-switch-1.c (dg-options): Likwise.
* gcc.target/i386/cet-switch-2.c (dg-options): Likwise.
* gcc.target/i386/cet-switch-3.c (dg-options): Likwise.
* gcc.target/i386/indirect-thunk-11.c (dg-options): Likwise.
* gcc.target/i386/indirect-thunk-12.c (dg-options): Likwise.
* gcc.target/i386/indirect-thunk-attr-12.c (dg-options): Likwise.
* gcc.target/i386/indirect-thunk-attr-13.c (dg-options): Likwise.
* gcc.target/i386/indirect-thunk-attr-14.c (dg-options): Likwise.
* gcc.target/i386/indirect-thunk-attr-15.c (dg-options): Likwise.
* gcc.target/i386/indirect-thunk-attr-16.c (dg-options): Likwise.
* gcc.target/i386/indirect-thunk-extern-8.c (dg-options): Likwise.
* gcc.target/i386/indirect-thunk-extern-9.c (dg-options): Likwise.
* gcc.target/i386/indirect-thunk-extern-10.c (dg-options): Likwise.
* gcc.target/i386/pr82659-1.c (dg-options): Likwise.
* gcc.target/i386/pr82659-2.c (dg-options): Likwise.
* gcc.target/i386/pr82659-3.c (dg-options): Likwise.
* gcc.target/i386/pr82659-4.c (dg-options): Likwise.
* gcc.target/i386/pr82659-5.c (dg-options): Likwise.
* gcc.target/i386/pr82659-6.c (dg-options): Likwise.
* gcc.target/i386/pr84146.c (dg-options): Likwise.
* gcc.target/i386/pr85403.c (dg-options): Likwise.
* gcc.target/i386/pr85404.c (dg-options): Likwise.
* gcc.target/i386/cet-intrin-3.c (dg-options): Replace -mcet
with -mshstk.
* gcc.target/i386/cet-intrin-5.c (dg-options): Likwise.
* gcc.target/i386/cet-intrin-6.c (dg-options): Likwise.
* gcc.target/i386/cet-intrin-7.c (dg-options): Likwise.
* gcc.target/i386/cet-intrin-8.c (dg-options): Likwise.
* gcc.target/i386/cet-intrin-9.c (dg-options): Likwise.
* gcc.target/i386/cet-intrin-10.c (dg-options): Likwise.
* gcc.target/i386/cet-rdssp-1.c (dg-options): Likwise.
* (dg-options): Likwise.
* gcc.target/i386/cet-notrack-1a.c (dg-options): Remove
-mno-cet.
* gcc.target/i386/cet-notrack-4a.c (dg-options): Likwise.
* gcc.target/i386/cet-label-3.c: Removed.
* gcc.target/i386/cet-property-3.c: Likwise.
* gcc.target/i386/cet-sjlj-7.c: Likwise.
From-SVN: r259612
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With revision 259496:
commit b1384095a7c1d06a44b70853372ebe037b2f7867
Author: hjl <hjl@138bc75d-0d04-0410-961f-82ee72b054a4>
Date: Thu Apr 19 15:15:04 2018 +0000
x86: Enable -fcf-protection with multi-byte NOPs
-fcf-protection no longer requires -mcet.
config/
PR target/85485
* bootstrap-cet.mk (STAGE2_CFLAGS): Remove -mcet.
(STAGE3_CFLAGS): Likewise.
gcc/
PR target/85485
* doc/install.texi: Remove -mcet from bootstrap-cet.
From-SVN: r259611
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mode causes internal compiler error)
PR target/85511
* config/i386/i386.c (ix86_init_mmx_sse_builtins): Don't define
__builtin_ia32_readeflags_u32 and __builtin_ia32_writeeflags_u32
if TARGET_64BIT.
* gcc.target/i386/pr85511.c: New test.
From-SVN: r259609
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config/rs6000/rs6000-p8swap.c:1853 on powerpc64le-linux-gnu)
PR target/85503
* config/rs6000/rs6000-p8swap.c (const_load_sequence_p): Punt if
const_vector is not CONST_VECTOR or SYMBOL_REF for a constant pool
containing a CONST_VECTOR.
* g++.dg/ext/pr85503.C: New test.
From-SVN: r259607
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gcc/testsuite:
* c-c++-common/attr-aligned-1.c: Use __alignof__ in C++11.
* g++.dg/cpp0x/alignas4.C: Expect 4-byte alignment on x86.
From-SVN: r259606
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gcc/
* doc/install.texi: Update newlib dependency for nvptx.
From-SVN: r259596
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PR target/85508
* config/i386/i386.c (ix86_expand_vector_init_one_var): Use UINTVAL
instead of INTVAL when shifting x left.
* gcc.target/i386/pr85508.c: New test.
From-SVN: r259594
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Fix PR85478
gcc/ChangeLog:
2018-04-24 Andreas Krebbel <krebbel@linux.ibm.com>
PR tree-optimization/85478
* tree-vect-loop.c (vect_analyze_loop_2): Do not call
vect_grouped_store_supported for single element vectors.
gcc/testsuite/ChangeLog:
2018-04-24 Andreas Krebbel <krebbel@linux.ibm.com>
PR tree-optimization/85478
* g++.dg/pr85478.C: New test.
From-SVN: r259593
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slower than peak)
2018-04-24 Richard Biener <rguenther@suse.de>
PR target/85491
* config/i386/i386.c (ix86_add_stmt_cost): Restrict strided
load cost increase to the case of non-constant step.
From-SVN: r259592
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PR target/84828
* reg-stack.c (move_for_stack_reg): Don't fail assertion about dead
destination if any_malformed_asm.
From-SVN: r259591
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From-SVN: r259589
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CWG 1879 - Inadequate definition of alignment requirement.
* cp-tree.h (ALIGNOF_EXPR_STD_P): New.
* typeck.c (cxx_sizeof_or_alignof_type): Add std_alignof parm.
(cxx_sizeof_expr, cxx_sizeof_nowarn, cxx_alignas_expr)
(cxx_alignof_expr): Pass it.
* parser.c (cp_parser_unary_expression): Pass it.
* pt.c (tsubst_copy): Copy it.
(tsubst_copy_and_build): Pass it.
* decl.c (fold_sizeof_expr): Pass it.
From-SVN: r259578
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gcc/po:
* gcc.pot: Regenerate.
libcpp/po:
* cpplib.pot: Regenerate.
From-SVN: r259575
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expr.c:3722)
PR middle-end/85496
* expr.c (store_field): In the bitfield case, if the value comes from
a function call and is returned in registers by means of a PARALLEL,
do not change the mode of the temporary unless BLKmode and VOIDmode.
From-SVN: r259574
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* decl.c (check_initializer): Check DECL_INITIALIZED_IN_CLASS_P.
* typeck2.c (store_init_value): Likewise.
Co-Authored-By: Jason Merrill <jason@redhat.com>
From-SVN: r259571
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sel-sched.c:6403)
PR rtl-optimization/85423
* sel-sched-ir.c (has_dependence_note_mem_dep): Only discard
dependencies to debug insns when the previous insn is non-debug.
* gcc.dg/pr85423.c: New test.
From-SVN: r259563
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Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.md ("vunspec"): Delete it, unify all the unspec
enums into a single definition.
(fls): Fix predicates and printing.
(seti): Likewise.
From-SVN: r259558
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gcc/
2018-04-23 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc-protos.h (check_if_valid_sleep_operand): Remove.
* config/arc/arc.c (arc_expand_builtin): Sleep accepts registers
and short u6 immediate.
(check_if_valid_sleep_operand): Remove.
* config/arc/arc.md (Sleep): Accepts registers and u6 immediates.
changelog
From-SVN: r259557
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From-SVN: r259556
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gcc/
* config/nds32/nds32.c (nds32_compute_stack_frame): Consider
flag_always_save_lp condition.
* config/nds32/nds32.opt (malways-save-lp): New option.
From-SVN: r259553
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USE_STORE_POST_DECREMENT and USE_STORE_POST_INCREMENT.
gcc/
* config/nds32/nds32-protos.h (nds32_use_load_post_increment): Declare.
* config/nds32/nds32.c (nds32_use_load_post_increment): New.
* config/nds32/nds32.h
(USE_LOAD_POST_INCREMENT, USE_LOAD_POST_DECREMENT): Define.
(USE_STORE_POST_INCREMENT, USE_STORE_POST_DECREMENT): Define.
From-SVN: r259552
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gcc/
* config/nds32/nds32-protos.h (nds32_ls_333_p): Remove.
* config/nds32/nds32.c (nds32_ls_333_p): Remove.
From-SVN: r259551
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gcc/
* config/nds32/nds32-protos.h (nds32_case_vector_shorten_mode):
Declare.
* config/nds32/nds32.c (nds32_case_vector_shorten_mode): New function.
* config/nds32/nds32.h (CASE_VECTOR_SHORTEN_MODE): Modify.
Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>
From-SVN: r259550
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function.
gcc/
* config/nds32/nds32.c (nds32_compute_stack_frame): Fix wrong value.
From-SVN: r259549
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gcc/
* config/nds32/nds32-protos.h (nds32_data_alignment,
nds32_local_alignment): Declare.
* config/nds32/nds32.c (nds32_data_alignment, nds32_constant_alignment,
nds32_local_alignment): New functions.
(TARGET_CONSTANT_ALIGNMENT): Define.
* config/nds32/nds32.h (DATA_ALIGNMENT, LOCAL_ALIGNMENT): Define.
From-SVN: r259548
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gcc/
* config/nds32/nds32.c
(TARGET_HARD_REGNO_MODE_OK): Move to the bottom of file.
(TARGET_MODES_TIEABLE_P): Likewise.
From-SVN: r259547
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gcc/
* config/nds32/nds32.c (nds32_asm_file_start): Display optimization
level Ofast and Og.
From-SVN: r259546
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gcc/
* config/nds32/constants.md (unspec_volatile_element): Add enum values
for unaligned access.
* config/nds32/nds32-intrinsic.c: Implementation of expanding
unaligned access.
* config/nds32/nds32-intrinsic.md: Likewise.
* config/nds32/nds32_intrinsic.h: Likewise.
* config/nds32/nds32.h (nds32_builtins): Likewise.
* config/nds32/nds32.opt (munaligned-access): New option.
* config/nds32/nds32.c (nds32_asm_file_start): Display
flag_unaligned_access status.
Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com>
From-SVN: r259545
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From-SVN: r259544
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gcc/
2018-04-20 Kito Cheng <kito.cheng@gmail.com>
* config/riscv/elf.h (LINK_SPEC): Pass --no-relax if
-mno-relax is present.
* config/riscv/linux.h (LINK_SPEC): Ditto.
From-SVN: r259540
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From-SVN: r259539
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gcc/ChangeLog:
PR c/85365
* gimple-fold.c (gimple_fold_builtin_strcpy): Suppress -Wrestrict
for null pointers.
(gimple_fold_builtin_stxcpy_chk): Same.
* gimple-ssa-warn-restrict.c (check_bounds_or_overlap): Same.
gcc/testsuite/ChangeLog:
PR c/85365
* gcc.dg/Wrestrict-15.c: New test.
From-SVN: r259535
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for __builtin_powi.)
[libgcc]
2018-04-20 Michael Meissner <meissner@linux.ibm.com>
PR target/85456
* config/rs6000/_powikf2.c: New file. Add support for the
__builtin_powil function when long double is IEEE 128-bit floating
point.
* config/rs6000/float128-ifunc.c (__powikf2_resolve): Add
__powikf2 support.
(__powikf2): Likewise.
* config/rs6000/quad-float128.h (__powikf2_sw): Likewise.
(__powikf2_hw): Likewise.
(__powikf2): Likewise.
* config/rs6000/t-float128 (fp128_ppc_funcs): Likewise.
* config/rs6000/t-float128-hw (fp128_hw_func): Likewise.
(_powikf2-hw.c): Likewise.
[gcc]
2018-04-20 Michael Meissner <meissner@linux.ibm.com>
PR target/85456
* config/rs6000/rs6000.c (init_float128_ieee): Add support to call
__powikf2 when long double is IEEE 128-bit.
[gcc/testsuite]
2018-04-20 Michael Meissner <meissner@linux.ibm.com>
PR target/85456
* gcc.target/powerpc/pr85456.c: New test.
From-SVN: r259533
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[gcc/testsuite]
2018-04-20 Bill Schmidt <wschmidt@linux.ibm.com>
* g++.dg/ext/undef-bool-1.C: Require lp64.
* gcc.target/powerpc/undef-bool-2.c: Likewise.
From-SVN: r259532
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