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2020-12-17Export print-rtl.c:print_insn_with_notesRichard Sandiford2-4/+2
Later patches want to use print_insn_with_notes (printing to a pretty_printer). This patch exports it from print-rtl.c. The non-notes version is already public. gcc/ * print-rtl.h (print_insn_with_notes): Declare. * print-rtl.c (print_insn_with_notes): Make non-static
2020-12-17Split update_cfg_for_uncondjump out of combineRichard Sandiford3-36/+48
Later patches want to reuse combine's update_cfg_for_uncondjump, so this patch makes it a public cfgrtl.c function. gcc/ * cfgrtl.h (update_cfg_for_uncondjump): Declare. * combine.c (update_cfg_for_uncondjump): Move to... * cfgrtl.c: ...here.
2020-12-17Add a cut-down version of std::span (array_slice)Richard Sandiford1-0/+120
A later patch wants to be able to pass around subarray views of an existing array. The standard class to do that is std::span, but it's a C++20 thing. This patch just adds a cut-down version of it. The intention is just to provide what's currently needed. gcc/ * vec.h (array_slice): New class.
2020-12-17Add an alternative splay tree implementationRichard Sandiford7-0/+1721
We already have two splay tree implementations: the old C one in libiberty and a templated reimplementation of it in typed-splay-tree.h. However, they have some drawbacks: - They hard-code the assumption that nodes should have both a key and a value, which isn't always true. - They use the two-phase method of lookup, and so nodes need to store a temporary back pointer. We can avoid that overhead by using the top-down method (as e.g. the bitmap tree code already does). - The tree node has to own the key and the value. For some use cases it's more convenient to embed the tree links in the value instead. Also, a later patch wants to use splay trees to represent an adaptive total order: the splay tree itself records whether node N1 is less than node N2, and (in the worst case) comparing nodes is a splay operation. This patch therefore adds an alternative implementation. The main features are: - Nodes can optionally point back to their parents. - An Accessors class abstracts accessing child nodes and (where applicable) parent nodes, so that the information can be embedded in larger data structures. - There is no fixed comparison function at the class level. Instead, individual functions that do comparisons take a comparison function argument. - There are two styles of comparison function, optimised for different use cases. (See the comments in the patch for details.) - It's possible to do some operations directly on a given node, without knowing whether it's the root. This includes the comparison use case described above. This of course has its own set of drawbacks. It's really providing splay utility functions rather than a true ADT, and so is more low-level than the existing routines. It's mostly geared for cases in which the client code wants to participate in the splay operations to some extent. gcc/ * Makefile.in (OBJS): Add splay-tree-utils.o. * system.h: Include <array> when INCLUDE_ARRAY is defined. * selftest.h (splay_tree_cc_tests): Declare. * selftest-run-tests.c (selftest::run_tests): Run splay_tree_cc_tests. * splay-tree-utils.h: New file. * splay-tree-utils.tcc: Likewise. * splay-tree-utils.cc: Likewise.
2020-12-17Add a class that multiplexes two pointer typesRichard Sandiford1-0/+251
This patch adds a pointer_mux<T1, T2> class that provides similar functionality to: union { T1 *a; T2 *b; }; ... bool is_b_rather_than_a; except that the is_b_rather_than_a tag is stored in the low bit of the pointer. See the comments in the patch for a comparison between the two approaches and why this one can be more efficient. I've tried to microoptimise the class a fair bit, since a later patch uses it extensively in order to keep the sizes of data structures down. gcc/ * mux-utils.h: New file.
2020-12-17Add an RAII class for managing obstacksRichard Sandiford1-0/+86
This patch adds an RAII class for managing the lifetimes of objects on an obstack. See the comments in the patch for more details and example usage. gcc/ * obstack-utils.h: New file.
2020-12-17Add more iterator utilitiesRichard Sandiford1-0/+159
This patch adds some more iterator helper classes. They really fall into two groups, but there didn't seem much value in separating them: - A later patch has a class hierarchy of the form: Base +- Derived1 +- Derived2 A class wants to store an array A1 of Derived1 pointers and an array A2 of Derived2 pointers. However, for compactness reasons, it was convenient to have a single array of Base pointers, with A1 and A2 being slices of this array. This reduces the overhead from two pointers and two ints (3 LP64 words) to one pointer and two ints (2 LP64 words). But consumers of the class shouldn't be aware of this: they should see A1 as containing Derived1 pointers rather than Base pointers and A2 as containing Derived2 pointers rather than Base pointers. This patch adds derived_iterator and const_derived_container classes to support this use case. - A later patch also adds various linked lists. This patch adds wrapper_iterator and list_iterator classes to make it easier to create iterators for these linked lists. For example: // Iterators for lists of definitions. using def_iterator = list_iterator<def_info, &def_info::next_def>; using reverse_def_iterator = list_iterator<def_info, &def_info::prev_def>; This in turn makes it possible to use range-based for loops on the lists. The patch just adds the things that the later patches need; it doesn't try to make the classes as functionally complete as possible. I think we should add extra functionality when needed rather than ahead of time. gcc/ * iterator-utils.h (derived_iterator): New class. (const_derived_container, wrapper_iterator): Likewise. (list_iterator): Likewise.
2020-12-17reginfo: Add a global_reg_setRichard Sandiford2-0/+7
A later patch wants to use the set of global registers as a HARD_REG_SET rather than a bool/char array. Most other arrays already have a HARD_REG_SET counterpart, but this one didn't. gcc/ * hard-reg-set.h (global_reg_set): Declare. * reginfo.c (global_reg_set): New variable. (init_reg_sets_1, globalize_reg): Update it when globalizing registers.
2020-12-16rs6000: Add support for powerpc64le-unknown-freebsdPiotr Kubaj4-3/+19
This implements support for powerpc64le architecture on FreeBSD. Since we don't have powerpcle (32-bit), I did not add support for powerpcle here. This remains to be changed if there is powerpcle support in the future. 2020-12-15 Piotr Kubaj <pkubaj@FreeBSD.org> gcc/ * config.gcc (powerpc*le-*-freebsd*): Add. * configure.ac (powerpc*le-*-freebsd*): Ditto. * configure: Regenerate. * config/rs6000/freebsd64.h (ASM_SPEC_COMMON): Use ENDIAN_SELECT. (DEFAULT_ASM_ENDIAN): Add little endian support. (LINK_OS_FREEBSD_SPEC64): Ditto.
2020-12-16test: add new Go tests from source repoIan Lance Taylor14-0/+579
2020-12-16C: Drop qualifiers of assignment expressions. [PR98047]Martin Uecker2-10/+21
ISO C17 6.5.15.1 specifies that the result is the type the LHS would have after lvalue conversion. 2020-12-16 Martin Uecker <muecker@gwdg.de> gcc/c/ PR c/98047 * c-typeck.c (build_modify_expr): Drop qualifiers. gcc/testsuite/ PR c/98047 * gcc.dg/qual-assign-7.c: New test.
2020-12-16C: Avoid incorrect warning for volatile in compound expressions [PR98260]Martin Uecker2-2/+21
2020-12-16 Martin Uecker <muecker@gwdg.de> gcc/c/ PR c/98260 * c-parser.c (c_parser_expression): Look into nop expression when marking expressions as read. gcc/testsuite/ PR c/98260 * gcc.dg/unused-9.c: New test.
2020-12-16gcc: xtensa: rearrange DI mode constant loadingTakayuki 'January June' Suwa2-2/+32
2020-12-16 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp> gcc/ * config/xtensa/xtensa.c (xtensa_emit_move_sequence): Try to replace 'l32r' with 'movi' + 'slli' when optimizing for size. * config/xtensa/xtensa.md (movdi): Split loading DI mode constant into register pair into two loads of SI mode constants.
2020-12-16Arm: MVE: Split refactoring of remaining complex instrinsicsTamar Christina5-138/+54
This refactors the complex numbers bits of MVE to go through the same unspecs as the NEON variant. This is pre-work to allow code to be shared between NEON and MVE for the complex vectorization patches. gcc/ChangeLog: * config/arm/arm_mve.h (__arm_vcmulq_rot90_f16): (__arm_vcmulq_rot270_f16, _arm_vcmulq_rot180_f16, __arm_vcmulq_f16, __arm_vcmulq_rot90_f32, __arm_vcmulq_rot270_f32, __arm_vcmulq_rot180_f32, __arm_vcmulq_f32, __arm_vcmlaq_f16, __arm_vcmlaq_rot180_f16, __arm_vcmlaq_rot270_f16, __arm_vcmlaq_rot90_f16, __arm_vcmlaq_f32, __arm_vcmlaq_rot180_f32, __arm_vcmlaq_rot270_f32, __arm_vcmlaq_rot90_f32): Update builtin calls. * config/arm/arm_mve_builtins.def (vcmulq_f, vcmulq_rot90_f, vcmulq_rot180_f, vcmulq_rot270_f, vcmlaq_f, vcmlaq_rot90_f, vcmlaq_rot180_f, vcmlaq_rot270_f): Removed. (vcmulq, vcmulq_rot90, vcmulq_rot180, vcmulq_rot270, vcmlaq, vcmlaq_rot90, vcmlaq_rot180, vcmlaq_rot270): New. * config/arm/iterators.md (mve_rot): Add UNSPEC_VCMLA, UNSPEC_VCMLA90, UNSPEC_VCMLA180, UNSPEC_VCMLA270, UNSPEC_VCMUL, UNSPEC_VCMUL90, UNSPEC_VCMUL180, UNSPEC_VCMUL270. (VCMUL): New. * config/arm/mve.md (mve_vcmulq_f<mode, mve_vcmulq_rot180_f<mode>, mve_vcmulq_rot270_f<mode>, mve_vcmulq_rot90_f<mode>, mve_vcmlaq_f<mode>, mve_vcmlaq_rot180_f<mode>, mve_vcmlaq_rot270_f<mode>, mve_vcmlaq_rot90_f<mode>): Removed. (mve_vcmlaq<mve_rot><mode>, mve_vcmulq<mve_rot><mode>, mve_vcaddq<mve_rot><mode>, cadd<rot><mode>3, mve_vcaddq<mve_rot><mode>): New. * config/arm/unspecs.md (UNSPEC_VCMUL90, UNSPEC_VCMUL270, UNSPEC_VCMUL, UNSPEC_VCMUL180): New. (VCMULQ_F, VCMULQ_ROT180_F, VCMULQ_ROT270_F, VCMULQ_ROT90_F, VCMLAQ_F, VCMLAQ_ROT180_F, VCMLAQ_ROT90_F, VCMLAQ_ROT270_F): Removed.
2020-12-16Arm: Add NEON and MVE RTL patterns for Complex Addition.Tamar Christina7-72/+58
This adds implementation for the optabs for complex additions. With this the following C code: void f90 (float complex a[restrict N], float complex b[restrict N], float complex c[restrict N]) { for (int i=0; i < N; i++) c[i] = a[i] + (b[i] * I); } generates f90: add r3, r2, #1600 .L2: vld1.32 {q8}, [r0]! vld1.32 {q9}, [r1]! vcadd.f32 q8, q8, q9, #90 vst1.32 {q8}, [r2]! cmp r3, r2 bne .L2 bx lr instead of f90: add r3, r2, #1600 .L2: vld2.32 {d24-d27}, [r0]! vld2.32 {d20-d23}, [r1]! vsub.f32 q8, q12, q11 vadd.f32 q9, q13, q10 vst2.32 {d16-d19}, [r2]! cmp r3, r2 bne .L2 bx lr gcc/ChangeLog: * config/arm/arm_mve.h (__arm_vcaddq_rot90_u8, __arm_vcaddq_rot270_u8, __arm_vcaddq_rot90_s8, __arm_vcaddq_rot270_s8, __arm_vcaddq_rot90_u16, __arm_vcaddq_rot270_u16, __arm_vcaddq_rot90_s16, __arm_vcaddq_rot270_s16, __arm_vcaddq_rot90_u32, __arm_vcaddq_rot270_u32, __arm_vcaddq_rot90_s32, __arm_vcaddq_rot270_s32, __arm_vcaddq_rot90_f16, __arm_vcaddq_rot270_f16, __arm_vcaddq_rot90_f32, __arm_vcaddq_rot270_f32): Update builtin calls. * config/arm/arm_mve_builtins.def (vcaddq_rot90_u, vcaddq_rot270_u, vcaddq_rot90_s, vcaddq_rot270_s, vcaddq_rot90_f, vcaddq_rot270_f): Removed. (vcaddq_rot90, vcaddq_rot270): New. * config/arm/constraints.md (Dz): Include MVE. * config/arm/iterators.md (mve_rot): New. (supf): Remove VCADDQ_ROT270_S, VCADDQ_ROT270_U, VCADDQ_ROT90_S, VCADDQ_ROT90_U. (VCADDQ_ROT270, VCADDQ_ROT90): Removed. * config/arm/mve.md (mve_vcaddq_rot270_<supf><mode, mve_vcaddq_rot90_<supf><mode>, mve_vcaddq_rot270_f<mode>, mve_vcaddq_rot90_f<mode>): Removed. (mve_vcaddq<mve_rot><mode>, mve_vcaddq<mve_rot><mode>): New. * config/arm/unspecs.md (VCADDQ_ROT270_S, VCADDQ_ROT90_S, VCADDQ_ROT270_U, VCADDQ_ROT90_U, VCADDQ_ROT270_F, VCADDQ_ROT90_F): Removed. * config/arm/vec-common.md (cadd<rot><mode>3): New.
2020-12-16AArch64: Add NEON, SVE and SVE2 RTL patterns for Complex Addition.Tamar Christina4-0/+36
This adds implementation for the optabs for add complex operations. With this the following C code: void f90 (float complex a[restrict N], float complex b[restrict N], float complex c[restrict N]) { for (int i=0; i < N; i++) c[i] = a[i] + (b[i] * I); } generates f90: mov x3, 0 .p2align 3,,7 .L2: ldr q0, [x0, x3] ldr q1, [x1, x3] fcadd v0.4s, v0.4s, v1.4s, #90 str q0, [x2, x3] add x3, x3, 16 cmp x3, 1600 bne .L2 ret instead of f90: add x3, x1, 1600 .p2align 3,,7 .L2: ld2 {v4.4s - v5.4s}, [x0], 32 ld2 {v2.4s - v3.4s}, [x1], 32 fsub v0.4s, v4.4s, v3.4s fadd v1.4s, v5.4s, v2.4s st2 {v0.4s - v1.4s}, [x2], 32 cmp x3, x1 bne .L2 ret gcc/ChangeLog: * config/aarch64/aarch64-simd.md (cadd<rot><mode>3): New. * config/aarch64/iterators.md (SVE2_INT_CADD_OP): New. * config/aarch64/aarch64-sve.md (cadd<rot><mode>3): New. * config/aarch64/aarch64-sve2.md (cadd<rot><mode>3): New.
2020-12-16testsuite: Adjust expected instruction count for PPC fold testcases.David Edelsohn8-12/+12
commit r11-5958 changed the code generation for the vector logical fold tests. This patch updates the expected instruction counts for different instructions. gcc/testsuite/ChangeLog: 2020-12-16 David Edelsohn <dje.gcc@gmail.com> PR target/98280 * gcc.target/powerpc/fold-vec-logical-ors-char.c: Adjust count. * gcc.target/powerpc/fold-vec-logical-ors-int.c: Adjust count. * gcc.target/powerpc/fold-vec-logical-ors-longlong.c: Adjust count. * gcc.target/powerpc/fold-vec-logical-ors-short.c: Adjust count. * gcc.target/powerpc/fold-vec-logical-other-char.c: Adjust count. * gcc.target/powerpc/fold-vec-logical-other-int.c: Adjust count. * gcc.target/powerpc/fold-vec-logical-other-longlong.c: Adjust count. * gcc.target/powerpc/fold-vec-logical-other-short.c: Adjust count.
2020-12-16c++: Another solaris header use [PR 98315]Nathan Sidwell2-7/+4
Rather than early-include sys/socket.h, let's allow the includer to tell cody no networking. libcody/ * cody.hh: Allow user to set CODY_NETWORKING. gcc/cp/ * mapper-resolver.cc: Remove early include of sys/socket.h. Specify no CODY_NETWORKING instead. * module.cc: Specify no CODY_NETWORKING.
2020-12-16c++: Fix template parm ICE [PR 98297]Nathan Sidwell2-1/+9
I think this is nonsense code, we seem to be naming an instantiation of a template template parm. But this fixes the ICE. Perhaps we should diagnose the issue earlier? gcc/cp/ * parser.c (cp_parser_elaborated_type_specifier): Test BOUND_TEMPLATE_TEMPLATE_PARM before checking for instantiation. gcc/testsuite/ * g++.dg/template/pr98297.C: New.
2020-12-16Fix instruction length for MMA insns.Pat Haugen1-21/+11
Prefixed instructions should not have their length explicitly set to '8'. The function get_attr_length() will adjust the length appropriately based on the value of the "prefixed" attribute. 2020-12-16 Pat Haugen <pthaugen@linux.ibm.com> gcc/ * config/rs6000/mma.md (*movxo, mma_<vvi4i4i8>, mma_<avvi4i4i8>, mma_<vvi4i4i2>, mma_<avvi4i4i2>, mma_<vvi4i4>, mma_<avvi4i4>, mma_<pvi4i2>, mma_<apvi4i2>, mma_<vvi4i4i4>, mma_<avvi4i4i4>): Remove explicit setting of length attribute.
2020-12-16c++: Fix offsetof use [PR 98232]Nathan Sidwell1-1/+1
offsetof is underspecified. GCC happened to accept an unneeded explicit scoping, clang does not. gcc/cp/ * module.cc (dumper::push): Clangify offsetof use.
2020-12-16C++: Fix solaris header use (mk 2)Nathan Sidwell1-0/+6
There is another path to get to a poisoned bcopy. Fixed thusly. gcc/cp/ * mapper-resolver.cc: #include sys/socket before system.h due to poisoned bcopy use.
2020-12-16PR fortran/98284 - ICE in get_array_indexHarald Anlauf2-0/+19
Reject DATA elements with the ALLOCATABLE attribute also when they are components of a derived type. gcc/fortran/ChangeLog: PR fortran/98284 * resolve.c (check_data_variable): Reject DATA elements with the ALLOCATABLE attribute. gcc/testsuite/ChangeLog: PR fortran/98284 * gfortran.dg/pr98284.f90: New test.
2020-12-16varasm: Fix up __patchable_function_entries handlingJakub Jelinek1-3/+3
The SECTION_LINK_ORDER changes don't seem to work properly. If I compile: static inline __attribute__((__gnu_inline__)) __attribute__((__unused__)) __attribute__((patchable_function_entry(0, 0))) int foo (int x) { return x + 1; } static inline __attribute__((__gnu_inline__)) __attribute__((__unused__)) __attribute__((patchable_function_entry(0, 0))) int bar (int x) { return x + 2; } int baz (int x) { return foo (x) + 1; } int qux (int x) { return bar (x) + 2; } (distilled from aarch64 Linux kernel) with -O2 -fpatchable-function-entry=2 on aarch64 compiler configured against latest binutils, I get: ... .section __patchable_function_entries,"awo",@progbits,baz ... .section __patchable_function_entries ... in the assembly, but when it is assembled, one gets: [ 4] __patchable_function_entries PROGBITS 0000000000000000 000060 000008 00 WAL 1 0 8 [ 5] .rela__patchable_function_entries RELA 0000000000000000 000280 000018 18 I 12 4 8 [ 6] __patchable_function_entries PROGBITS 0000000000000000 000068 000008 00 0 0 8 [ 7] .rela__patchable_function_entries RELA 0000000000000000 000298 000018 18 I 12 6 8 i.e. one writable allocated section with SHF_LINK_ORDER and another non-allocated non-writable without link order. In the kernel case there is always one entry in the WAL section and then dozens or more in the non-allocated one. The kernel then fails to link: WARNING: modpost: vmlinux.o (__patchable_function_entries): unexpected non-allocatable section. Did you forget to use "ax"/"aw" in a .S file? Note that for example <linux/init.h> contains section definitions for use in .S files. ld: .init.data has both ordered [`__patchable_function_entries' in init/main.o] and unordered [`.init.data' in +./drivers/firmware/efi/libstub/vsprintf.stub.o] sections ld: final link failed: bad value make: *** [Makefile:1175: vmlinux] Error 1 The following patch fixes it by always forcing full section flags for SECTION_LINK_ORDER sections. 2020-12-16 Jakub Jelinek <jakub@redhat.com> * varasm.c (default_elf_asm_named_section): Always force section flags even for sections with SECTION_LINK_ORDER flag.
2020-12-16c++: Fix detailed-mem-stat breakageNathan Sidwell1-22/+25
module.cc has a static initializer that ends up in a circular dependency when detailed mem stats are enabled. This removes the need for that initializer to be dynamic, and we punt to the lazy initializing we already had inside the object in question anyway. At the cost of an additional indirection. gcc/cp/ * module.cc (loc_spans): Make spans a pointer, not inline. Adjust all accesses.
2020-12-16Require .init_array/.fini_array support for SHF_GNU_RETAINH.J. Lu3-5/+16
Since SHF_GNU_RETAIN support doesn't work for crtstuff.c which switches the output section directly with asm statement: --- static void __attribute__((used)) __do_global_dtors_aux (void) { static _Bool completed; if (__builtin_expect (completed, 0)) return; completed = 1; } static void __attribute__((__used__)) call___do_global_dtors_aux (void) { asm ("\t.section\t.fini"); __do_global_dtors_aux (); asm ("\t.section\t.text"); } --- use SHF_GNU_RETAIN only if .init_array/.fini_array section is supported. gcc/ PR target/98146 * defaults.h (SUPPORTS_SHF_GNU_RETAIN): New. * varasm.c (get_section): Replace HAVE_GAS_SHF_GNU_RETAIN with SUPPORTS_SHF_GNU_RETAIN. (resolve_unique_section): Likewise. (get_variable_section): Likewise. (switch_to_section): Likewise. gcc/testsuite/ PR target/98146 * lib/target-supports.exp (check_effective_target_R_flag_in_section): Also check HAVE_INITFINI_ARRAY_SUPPORT != 0.
2020-12-16Warn used and not used symbols in section with the same nameH.J. Lu5-3/+23
When SECTION_RETAIN is used, issue a warning when a symbol without used attribute and a symbol with used attribute are placed in the section with the same name, like int __attribute__((used,section(".data.foo"))) foo2 = 2; int __attribute__((section(".data.foo"))) foo1 = 1; since assembler will put them in different sections with the same section name. gcc/ PR target/98146 * varasm.c (switch_to_section): Warn when a symbol without used attribute and a symbol with used attribute are placed in the section with the same name. gcc/testsuite/ PR target/98146 * c-c++-common/attr-used-5.c: Updated. * c-c++-common/attr-used-6.c: Likewise. * c-c++-common/attr-used-7.c: Likewise. * c-c++-common/attr-used-8.c: Likewise.
2020-12-16Switch to a new section if the SECTION_RETAIN bit doesn't matchH.J. Lu7-6/+130
When definitions marked with used attribute and unmarked definitions are placed in the section with the same name, switch to a new section if the SECTION_RETAIN bit doesn't match. gcc/ PR target/98146 * output.h (switch_to_section): Add a tree argument, default to nullptr. * varasm.c (get_section): If the SECTION_RETAIN bit doesn't match, return and switch to a new section later. (assemble_start_function): Pass decl to switch_to_section. (assemble_variable): Likewise. (switch_to_section): If the SECTION_RETAIN bit doesn't match, switch to a new section. gcc/testsuite/ PR target/98146 * c-c++-common/attr-used-5.c: New test. * c-c++-common/attr-used-6.c: Likewise. * c-c++-common/attr-used-7.c: Likewise. * c-c++-common/attr-used-8.c: Likewise. * c-c++-common/attr-used-9.c: Likewise.
2020-12-16c++: Fix (some) solaris breakageNathan Sidwell1-0/+9
Solaris' sys/socket uses the poisoned bcopy identifier, so we must preemptively copy a bit of cody's inclusion logic to get it earlier. gcc/cp/ * mapper-client.cc: Include sys/socket.h before system.h.
2020-12-16[Ada] Code cleanup: rename ALI.ScopeArnaud Charlet4-9/+9
gcc/ada/ * ali.ads, ali.adb, bindo-writers.adb, lib-writ.adb (Scope): Renamed to IS_Scope.
2020-12-16[Ada] Add contracts to Ada.Strings.FixedJoffrey Huguet1-46/+848
gcc/ada/ * libgnat/a-strfix.ads: Add postconditions and contract cases to subprograms.
2020-12-16[Ada] Handle iterator filters on loop specifications over containersEd Schonberg1-1/+7
gcc/ada/ * sem_ch5.adb (Analyze_Iterator_Specification): If iterator filter is present, preanalyze filter without expansion. (Analyze_Loop_Parameter_Specification): When loop_Parameter_Specification is rewritten as Iterator_Specification, transfer Iterator_Filter if present.
2020-12-16[Ada] armhf-linux: symbolic tracebacksDoug Rupp3-1/+10
gcc/ada/ * libgnat/s-objrea.ads (Object_Arch): Add ARM enum * libgnat/s-objrea.adb (Initialize): Add EM_ARM case. (Read_Address): Add ARM case to 32bit read. * Makefile.rtl: Add trasym units to the runtime for armhf-linux.
2020-12-16[Ada] Fix memory leak in GNAT.Expect.Non_Blocking_Spawn on WindowsDmitriy Anisimkov1-0/+6
gcc/ada/ * libgnat/g-expect.adb (Non_Blocking_Spawn): Deallocate elements on Arg_List after calling Set_Up_Child_Communications.
2020-12-16[Ada] Remove inconsistent colons in messages for Ada 83 violationsPiotr Trojanek3-3/+3
gcc/ada/ * par-ch3.adb (P_Modular_Type_Definition): Remove colon from error message. * sem_ch11.adb (Check_Duplication): Likewise. * sem_ch3.adb (Derived_Type_Declaration): Likewise.
2020-12-16[Ada] Refine types of variables for parsing formal object declarationsPiotr Trojanek1-3/+3
gcc/ada/ * par-ch12.adb (P_Formal_Object_Declarations): Refine types to Pos.
2020-12-16[Ada] Fix typo in checks for implementation defined unitsPiotr Trojanek1-1/+1
gcc/ada/ * impunit.adb (Not_Impl_Defined_Unit): Fix typo in iteration over Non_Imp_File_Names_12 array.
2020-12-16[Ada] Simplify membership tests with N_Delay_Statement subtypePiotr Trojanek2-5/+2
gcc/ada/ * exp_ch9.adb, sem_warn.adb: Simplify membership test.
2020-12-16[Ada] Simplify membership tests with N_Subprogram_Call subtypePiotr Trojanek5-9/+6
gcc/ada/ * exp_ch6.adb, exp_util.adb, sem_ch4.adb, sem_disp.adb, sem_elab.adb: Simplify membership test.
2020-12-16[Ada] Fix glitch in comment of System.Powten_TableEric Botcazou1-3/+3
gcc/ada/ * libgnat/s-powtab.ads (Maxpow): Use explicit formula in comment.
2020-12-16[Ada] Fix possible uninitialized ATCB component usePhilippe Gil1-0/+1
gcc/ada/ * libgnarl/s-tporft.adb (Register_Foreign_Thread): Set Global_Task_Lock_Nesting before using allocator.
2020-12-16[Ada] Avoid artificial underflow in System.Val_RealEric Botcazou1-6/+45
gcc/ada/ * libgnat/s-valrea.adb (Maxexp32): New constant array. (Maxexp64): Likewise. (Maxexp80): Likewise. (Integer_to_Real): New local constants Maxexp and B. When the exponent is too negative, do the divison in two steps.
2020-12-16[Ada] Fix integer-vs-float errors in example for Test_Case pragmaPiotr Trojanek2-5/+5
gcc/ada/ * doc/gnat_rm/implementation_defined_pragmas.rst (Test_Case): Change integer to float literals. * gnat_rm.texi: Regenerate.
2020-12-16[Ada] Reject junk syntax for Contract_Cases/Test_Case/Subprogram_VariantPiotr Trojanek2-8/+50
gcc/ada/ * sem_ch13.adb (Analyze_Aspect_Specifications): Add a codefix for extra parentheses around aspect Annotate expression; reject "(null record)" aggregate and extra parentheses around aspect Test_Case expression. * sem_prag.adb (Analyze_Pragma): Reject "null", "(null record)" and extra parentheses around pragma Contract_Cases; likewise for pragma Subprogram_Variant.
2020-12-16[Ada] Fix gmem.out corruption by GNAT.ExpectDmitriy Anisimkov4-12/+42
gcc/ada/ * adaint.h (__gnat_in_child_after_fork): New flag to express child process side after fork call. * adaint.c (__gnat_portable_spawn): Set flag __gnat_in_child_after_fork. * expect.c (__gnat_expect_fork): Set __gnat_in_child_after_fork to one on child side. * libgnat/memtrack.adb (In_Child_After_Fork): Flag to disable memory tracking. (Allow_Trace): New routine defining if memory should be tracked. (Alloc, Realloc, Free): Use Allow_Trace in "if" condition instead of First_Call.
2020-12-16[Ada] Mark generic body outside of SPARKYannick Moy3-3/+3
gcc/ada/ * libgnat/a-tifiio.adb: Mark body not in SPARK. * libgnat/a-tifiio.ads: Mark spec in SPARK. * libgnat/a-tifiio__128.adb: Mark body not in SPARK.
2020-12-16[Ada] Another small adjustment to System.Value_REric Botcazou1-6/+12
gcc/ada/ * libgnat/s-valuer.adb (Scan_Decimal_Digits): Tweak overflow test. (Scan_Integral_Digits): Likewise.
2020-12-16[Ada] Add some OS constants to control serial portPascal Obry1-0/+35
gcc/ada/ * s-oscons-tmplt.c: Add some OS constants.
2020-12-16bswap: Handle vector CONSTRUCTORs [PR96239]Jakub Jelinek2-5/+140
The following patch teaches the bswap pass to handle for small (2/4/8 byte long) vectors a CONSTRUCTOR by determining if the bytes of the constructor come from non-vector sources and are either nop or bswap and changing the CONSTRUCTOR in that case to VIEW_CONVERT_EXPR from scalar integer to the vector type. Unfortunately, as I found after the patch was written, due to pass ordering this doesn't really fix the original testcase, just the one I wrote, because both loop and slp vectorization is done only after the bswap pass. A possible way out of that would be to perform just this particular bswap optimization (i.e. for CONSTRUCTOR assignments with integral vector types call find_bswap_or_nop and bswap_replace if successful) also during the store merging pass, it isn't really a store, but the store merging pass already performs bswapping when handling store, so it wouldn't be that big hack. What do you think? 2020-12-16 Jakub Jelinek <jakub@redhat.com> PR tree-optimization/96239 * gimple-ssa-store-merging.c (find_bswap_or_nop): Handle a vector CONSTRUCTOR. (bswap_replace): Likewise. * gcc.dg/pr96239.c: New test.
2020-12-16opts: Remove all usages of Report keyword.Martin Liska65-1383/+1383
gcc/brig/ChangeLog: * lang.opt: Remove usage of Report. gcc/c-family/ChangeLog: * c.opt: Remove usage of Report. gcc/ChangeLog: * common.opt: Remove usage of Report. * config/aarch64/aarch64.opt: Ditto. * config/alpha/alpha.opt: Ditto. * config/arc/arc.opt: Ditto. * config/arm/arm.opt: Ditto. * config/avr/avr.opt: Ditto. * config/bfin/bfin.opt: Ditto. * config/bpf/bpf.opt: Ditto. * config/c6x/c6x.opt: Ditto. * config/cr16/cr16.opt: Ditto. * config/cris/cris.opt: Ditto. * config/cris/elf.opt: Ditto. * config/csky/csky.opt: Ditto. * config/darwin.opt: Ditto. * config/fr30/fr30.opt: Ditto. * config/frv/frv.opt: Ditto. * config/ft32/ft32.opt: Ditto. * config/gcn/gcn.opt: Ditto. * config/i386/cygming.opt: Ditto. * config/i386/i386.opt: Ditto. * config/ia64/ia64.opt: Ditto. * config/ia64/ilp32.opt: Ditto. * config/linux-android.opt: Ditto. * config/linux.opt: Ditto. * config/lm32/lm32.opt: Ditto. * config/m32r/m32r.opt: Ditto. * config/m68k/m68k.opt: Ditto. * config/mcore/mcore.opt: Ditto. * config/microblaze/microblaze.opt: Ditto. * config/mips/mips.opt: Ditto. * config/mmix/mmix.opt: Ditto. * config/mn10300/mn10300.opt: Ditto. * config/moxie/moxie.opt: Ditto. * config/msp430/msp430.opt: Ditto. * config/nds32/nds32.opt: Ditto. * config/nios2/elf.opt: Ditto. * config/nios2/nios2.opt: Ditto. * config/nvptx/nvptx.opt: Ditto. * config/pa/pa.opt: Ditto. * config/pdp11/pdp11.opt: Ditto. * config/pru/pru.opt: Ditto. * config/riscv/riscv.opt: Ditto. * config/rl78/rl78.opt: Ditto. * config/rs6000/aix64.opt: Ditto. * config/rs6000/linux64.opt: Ditto. * config/rs6000/rs6000.opt: Ditto. * config/rs6000/sysv4.opt: Ditto. * config/rx/elf.opt: Ditto. * config/rx/rx.opt: Ditto. * config/s390/s390.opt: Ditto. * config/s390/tpf.opt: Ditto. * config/sh/sh.opt: Ditto. * config/sol2.opt: Ditto. * config/sparc/long-double-switch.opt: Ditto. * config/sparc/sparc.opt: Ditto. * config/tilegx/tilegx.opt: Ditto. * config/tilepro/tilepro.opt: Ditto. * config/v850/v850.opt: Ditto. * config/visium/visium.opt: Ditto. * config/vms/vms.opt: Ditto. * config/vxworks.opt: Ditto. * config/xtensa/xtensa.opt: Ditto. gcc/lto/ChangeLog: * lang.opt: Remove usage of Report.
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