aboutsummaryrefslogtreecommitdiff
path: root/gcc
AgeCommit message (Expand)AuthorFilesLines
2019-11-18PR middle-end/92493 - ICE in get_origin_and_offset at gimple-ssa-sprintf.cMartin Sebor4-1/+40
2019-11-18Refactor tree-loop-distribution.c for thread safetyGiuliano Belinassi4-270/+441
2019-11-18re PR ipa/92508 (ICE in do_estimate_edge_time, at ipa-inline-analysis.c:223 s...Jan Hubicka3-3/+9
2019-11-18Add more C2x attributes tests.Joseph Myers7-0/+50
2019-11-18PR c++/91962 - ICE with reference binding and qualification conversion.Marek Polacek4-1/+25
2019-11-18Add testcase for already fixed PR ipa/92528Martin Jambor2-0/+69
2019-11-18Add optabs for accelerating RAW and WAR alias checksRichard Sandiford20-4/+372
2019-11-18Add an empty constructor shortcut to build_vector_from_ctorRichard Sandiford2-0/+8
2019-11-18Two RTL CC tweaks for SVE pmore/plast conditionsRichard Sandiford5-21/+140
2019-11-18Handle VIEW_CONVERT_EXPR for variable-length vectorsRichard Sandiford4-9/+214
2019-11-18Optimise WAR and WAW alias checksRichard Sandiford12-41/+260
2019-11-18LRA: handle memory constraints that accept more than "m"Richard Sandiford12-15/+48
2019-11-18Remove vestiges of MODIFY_JNI_METHOD_CALLTom Tromey4-40/+6
2019-11-18re PR tree-optimization/92516 (ICE in vect_schedule_slp_instance, at tree-vec...Richard Biener5-75/+141
2019-11-18Unset m_checker in sem_function::init.Martin Liska2-0/+8
2019-11-18Remove strange dump suboptions in testsuite.Martin Liska3-2/+11
2019-11-18re PR tree-optimization/92558 (Miscompare of 554.roms_r with -Ofast -march=zn...Richard Biener4-0/+35
2019-11-18musl: use correct long double abi by defaultSzabolcs Nagy3-2/+33
2019-11-18s390: add musl supportSzabolcs Nagy2-0/+8
2019-11-18Improve -dbg-cnt error message and support :0.Martin Liska2-11/+14
2019-11-18Verify NOP_EXPR LHS type in IPA ICF.Martin Liska4-0/+46
2019-11-18[mid-end][__RTL] Clean state despite unspecified __RTL startwith passesMatthew Malcomson6-20/+70
2019-11-18re PR target/92462 ([arm32] -ftree-pre makes a variable to be wrongly hoisted...Richard Biener2-4/+16
2019-11-18[testsuite][ARM] check_effective_target_arm_vfp_ok_nocache: Fix typo in optio...Christophe Lyon2-2/+8
2019-11-18re PR target/92545 (avr: support ATmega devices from the 0-series)Georg-Johann Lay1-1/+1
2019-11-18re PR target/92545 (avr: support ATmega devices from the 0-series)Georg-Johann Lay1-12/+12
2019-11-18Add support for AVR devices from the 0-series.Georg-Johann Lay7-333/+455
2019-11-18Split X86_TUNE_AVX128_OPTIMAL into X86_TUNE_AVX256_SPLIT_REGSHongtao Liu6-6/+25
2019-11-18Daily bump.GCC Administrator1-1/+1
2019-11-17* gcc.dg/complex-6.c: Do not run dump scan tests for rx target.Jeff Law2-2/+6
2019-11-17method.c (lookup_comparison_result): Use %qD instead of %<%T::%D%> to print t...Jakub Jelinek4-2/+27
2019-11-17Daily bump.GCC Administrator1-1/+1
2019-11-17rs6000: Allow mode GPR in cceq_{ior,rev}_compareSegher Boessenkool2-7/+18
2019-11-16Delete common/config/powerpcspeSegher Boessenkool2-321/+4
2019-11-16[AArch64] Robustify aarch64_wrffrRichard Sandiford2-1/+6
2019-11-16Use a single comparison for index-based alias checksRichard Sandiford6-51/+295
2019-11-16Print the type of alias check in a dump messageRichard Sandiford14-0/+48
2019-11-16Dump the list of merged alias pairsRichard Sandiford9-1/+270
2019-11-16Record whether a dr_with_seg_len contains mixed stepsRichard Sandiford3-22/+55
2019-11-16Add flags to dr_with_seg_len_pair_tRichard Sandiford5-14/+161
2019-11-16Delay swapping data refs in prune_runtime_alias_test_listRichard Sandiford2-9/+21
2019-11-16Move canonicalisation of dr_with_seg_len_pair_tsRichard Sandiford4-23/+33
2019-11-16[AArch64] Add scatter stores for partial SVE modesRichard Sandiford10-40/+185
2019-11-16[AArch64] Pattern-match SVE extending gather loadsRichard Sandiford17-128/+710
2019-11-16[AArch64] Add gather loads for partial SVE modesRichard Sandiford14-50/+268
2019-11-16[AArch64] Add truncation for partial SVE modesRichard Sandiford11-6/+113
2019-11-16[AArch64] Pattern-match SVE extending loadsRichard Sandiford16-75/+358
2019-11-16[AArch64] Add sign and zero extension for partial SVE modesRichard Sandiford16-31/+220
2019-11-16[AArch64] Add autovec support for partial SVE vectorsRichard Sandiford12-167/+674
2019-11-16[AArch64] Tweak gcc.target/aarch64/sve/clastb_8.cRichard Sandiford2-2/+10
generated by cgit v1.1 at 2025-03-18 15:40:42 +0000