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2024-06-13ada: Do not inline subprogram which could cause SPARK violationYannick Moy1-1/+82
Inlining in GNATprove a subprogram containing a constant declaration with an address clause/aspect might lead to a spurious error if the address expression is based on a constant view of a mutable object at call site. Do not allow such inlining in GNATprove. gcc/ada/ * inline.adb (Can_Be_Inlined_In_GNATprove_Mode): Do not inline when constant with address clause is found.
2024-06-13ada: Fix incorrect String lower bound in gnatlinkRonan Desplanques1-7/+24
This patch fixes code in gnatlink that incorrectly assumed that the lower bound of a particular string was always 1. gcc/ada/ * gnatlink.adb (Gnatlink): Fix incorrect lower bound assumption. (Is_Prefix): New function.
2024-06-13ada: Reject too-strict alignment specifications.Steve Baird1-2/+3
In some cases the compiler incorrectly concludes that a package body is required for a package specification that includes the implicit declaration of one or more inherited subprograms for an explicitly declared derived type. Spurious error messages (e.g., "cannot generate code for file") may result. gcc/ada/ * sem_ch7.adb (Requires_Completion_In_Body): Modify the Comes_From_Source test so that the implicit declaration of an inherited subprogram does not cause an incorrect result of True.
2024-06-13ada: Inline if -gnatn in CCG mode even if -O0Richard Kenner1-2/+3
gcc/ada/ * exp_ch6.adb (Expand_Ctrl_Function_Call): Inline if -gnatn in CCG mode even if -O0.
2024-06-13ada: Fix fallout of previous finalization changeEric Botcazou1-4/+14
Now that Is_Finalizable_Transient only looks at the renamings coming from nontransient objects serviced by transient scopes, it must find the object ultimately renamed by them through a chain of renamings. gcc/ada/ PR ada/114710 * exp_util.adb (Find_Renamed_Object): Recurse if the renamed object is itself a renaming.
2024-06-13ada: Missing support for 'Old with overloaded functionJavier Miranda3-1/+51
The compiler reports an error when the prefix of 'Old is a call to an overloaded function that has no parameters. gcc/ada/ * sem_attr.adb (Analyze_Attribute): Enhance support for using 'Old with a prefix that references an overloaded function that has no parameters; add missing support for the use of 'Old within qualified expressions. * sem_util.ads (Preanalyze_And_Resolve_Without_Errors): New subprogram. * sem_util.adb (Preanalyze_And_Resolve_Without_Errors): New subprogram.
2024-06-13ada: Simplify checks for Address and Object_Size clausesPiotr Trojanek3-7/+4
Where possible, we can use high-level wrapper routines instead of the low-level Get_Attribute_Definition_Clause. Code cleanup; semantics is unaffected. gcc/ada/ * layout.adb (Layout_Type): Use high-level wrapper routine. * sem_ch13.adb (Inherit_Delayed_Rep_Aspects): Likewise. * sem_ch3.adb (Analyze_Object_Declaration): Likewise.
2024-06-13ada: Add support for symbolic backtraces with DLLs on WindowsEric Botcazou3-28/+29
This puts Windows on par with Linux as far as backtraces are concerned. gcc/ada/ * libgnat/s-tsmona__linux.adb (Get): Move down descriptive comment. * libgnat/s-tsmona__mingw.adb: Add with clause and use clause for System.Storage_Elements. (Get): Pass GET_MODULE_HANDLE_EX_FLAG_UNCHANGED_REFCOUNT in the call to GetModuleHandleEx and remove the subsequent call to FreeLibrary. Upon success, set Load_Addr to the base address of the module. * libgnat/s-win32.ads (GET_MODULE_HANDLE_EX_FLAG_FROM_ADDRESS): Use shorter literal. (GET_MODULE_HANDLE_EX_FLAG_UNCHANGED_REFCOUNT): New constant.
2024-06-13ada: Fix too late finalization of temporary objectEric Botcazou3-98/+48
The problem is that Is_Finalizable_Transient returns false when a transient object is subject to a renaming by another transient object present in the same transient scope, thus forcing its finalization to be deferred to the enclosing scope. That's not necessary, as only renamings by nontransient objects serviced by transient scopes need to be rejected by the predicate. The change also removes now dead code in the finalization machinery. gcc/ada/ PR ada/114710 * exp_ch7.adb (Build_Finalizer.Process_Declarations): Remove dead code dealing with renamings. * exp_util.ads (Is_Finalizable_Transient): Rename Rel_Node to N. * exp_util.adb (Is_Finalizable_Transient): Likewise. (Is_Aliased): Remove obsolete code dealing wih EWA nodes and only consider renamings present in N itself. (Requires_Cleanup_Actions): Remove dead code dealing with renamings.
2024-06-13ada: Missing dynamic predicate checksJavier Miranda2-2/+112
The compiler does not generate dynamic predicate checks when they are enabled for one type declaration and ignored for other type declarations defined in the same scope. gcc/ada/ * sem_ch13.adb (Analyze_One_Aspect): Set the applicable policy of a type declaration when its aspect Dynamic_Predicate is analyzed. * sem_prag.adb (Handle_Dynamic_Predicate_Check): New subprogram that enables or ignores dynamic predicate checks depending on whether dynamic checks are enabled in the context where the associated type declaration is defined; used in the analysis of pragma check. In addition, for pragma Predicate, do not disable it when the aspect was internally build as part of processing a dynamic predicate aspect.
2024-06-13aarch64: Fix invalid nested subregs [PR115464]Richard Sandiford5-1/+36
The testcase extracts one arm_neon.h vector from a pair (one subreg) and then reinterprets the result as an SVE vector (another subreg). Each subreg makes sense individually, but we can't fold them together into a single subreg: it's 32 bytes -> 16 bytes -> 16*N bytes, but the interpretation of 32 bytes -> 16*N bytes depends on whether N==1 or N>1. Since the second subreg makes sense individually, simplify_subreg should bail out rather than ICE on it. simplify_gen_subreg will then do the same (because it already checks validate_subreg). This leaves simplify_gen_subreg returning null, requiring the caller to take appropriate action. I think this is relatively likely to occur elsewhere, so the patch adds a helper for forcing a subreg, allowing a temporary pseudo to be created where necessary. I'll follow up by using force_subreg in more places. This patch is intended to be a minimal backportable fix for the PR. gcc/ PR target/115464 * simplify-rtx.cc (simplify_context::simplify_subreg): Don't try to fold two subregs together if their relationship isn't known at compile time. * explow.h (force_subreg): Declare. * explow.cc (force_subreg): New function. * config/aarch64/aarch64-sve-builtins-base.cc (svset_neonq_impl::expand): Use it instead of simplify_gen_subreg. gcc/testsuite/ PR target/115464 * gcc.target/aarch64/sve/acle/general/pr115464.c: New test.
2024-06-13RISC-V: Bugfix vec_extract vls mode iterator restriction mismatchPan Li3-1/+36
We have vec_extract pattern which takes ZVFHMIN as the mode iterator of the VLS mode. Aka V_VLS. But it will expand to pred_extract_first pattern which takes the ZVFH as the mode iterator of the VLS mode. AKa V_VLSF. The mismatch will result in one ICE similar as below: error: unrecognizable insn: 27 | } | ^ (insn 19 18 20 2 (set (reg:HF 150 [ _13 ]) (unspec:HF [ (vec_select:HF (reg:V4HF 134 [ _1 ]) (parallel [ (const_int 0 [0]) ])) (reg:SI 67 vtype) ] UNSPEC_VPREDICATE)) "compress_run-2.c":24:5 -1 (nil)) during RTL pass: vregs compress_run-2.c:27:1: internal compiler error: in extract_insn, at recog.cc:2812 0x1a627ef _fatal_insn(char const*, rtx_def const*, char const*, int, char const*) ../../../gcc/gcc/rtl-error.cc:108 0x1a62834 _fatal_insn_not_found(rtx_def const*, char const*, int, char const*) ../../../gcc/gcc/rtl-error.cc:116 0x1a0f356 extract_insn(rtx_insn*) ../../../gcc/gcc/recog.cc:2812 0x159ee61 instantiate_virtual_regs_in_insn ../../../gcc/gcc/function.cc:1612 0x15a04aa instantiate_virtual_regs ../../../gcc/gcc/function.cc:1995 0x15a058e execute ../../../gcc/gcc/function.cc:2042 This patch would like to fix this issue by align the mode iterator restriction to ZVFH. The below test suites are passed for this patch. 1. The rv64gcv fully regression test. 2. The rv64gcv build with glibc. PR target/115456 gcc/ChangeLog: * config/riscv/autovec.md: Take ZVFH mode iterator instead of the ZVFHMIN for the alignment. * config/riscv/vector-iterators.md: Add 2 new iterator V_VLS_ZVFH and VLS_ZVFH. gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/base/pr115456-1.c: New test. Signed-off-by: Pan Li <pan2.li@intel.com>
2024-06-13[APX CCMP] Use ctestcc when comparing to const 0Hongyu Wang3-10/+15
For CTEST, we don't have conditional AND so there's no optimization opportunity to write a new ctest pattern. Emit ctest when ccmp did comparison to const 0 to save bytes. gcc/ChangeLog: * config/i386/i386.md (@ccmp<mode>): Add new alternative <r>,C and adjust output templates. Also adjust UNSPEC mode to CCmode. gcc/testsuite/ChangeLog: * gcc.target/i386/apx-ccmp-1.c: Adjust output to scan ctest. * gcc.target/i386/apx-ccmp-2.c: Adjust some condition to compare with 0.
2024-06-13doc: Streamline requirements on the build compilerGerald Pfeifer1-5/+3
No need to talk about potential implementation bugs in older versions than what we require. And no need to talk about building GCC 3.3 and earlier at this point. gcc: PR other/69374 * doc/install.texi (Prerequisites): Simplify note on the C++ compiler required. Drop requirements for versions of GCC prior to 3.4. Fix grammar.
2024-06-13Improve code generation of strided SLP loadsRichard Biener5-54/+127
This avoids falling back to elementwise accesses for strided SLP loads when the group size is not a multiple of the vector element size. Instead we can use a smaller vector or integer type for the load. For stores we can do the same though restrictions on stores we handle and the fact that store-merging covers up makes this mostly effective for cost modeling which shows for gcc.target/i386/vect-strided-3.c which we now vectorize with V4SI vectors rather than just V2SI ones. For all of this there's still the opportunity to use non-uniform accesses, say for a 6-element group with a VF of two do V4SI, { V2SI, V2SI }, V4SI. But that's for a possible followup. * tree-vect-stmts.cc (get_group_load_store_type): Consistently use VMAT_STRIDED_SLP for strided SLP accesses and not VMAT_ELEMENTWISE. (vectorizable_store): Adjust VMAT_STRIDED_SLP handling to allow not only half-size but also smaller accesses. (vectorizable_load): Likewise. * gcc.target/i386/vect-strided-1.c: New testcase. * gcc.target/i386/vect-strided-2.c: Likewise. * gcc.target/i386/vect-strided-3.c: Likewise. * gcc.target/i386/vect-strided-4.c: Likewise.
2024-06-13tree-optimization/115385 - handle more gaps with peeling of a single iterationRichard Biener3-5/+180
The following makes peeling of a single scalar iteration handle more gaps, including non-power-of-two cases. This can be done by rounding up the remaining access to the next power-of-two which ensures that the next scalar iteration will pick at least the number of excess elements we access. I've added a correctness testcase and one x86 specific scanning for the optimization. PR tree-optimization/115385 * tree-vect-stmts.cc (get_group_load_store_type): Peeling of a single scalar iteration is sufficient if we can narrow the access to the next power of two of the bits in the last access. (vectorizable_load): Ensure that the last access is narrowed. * gcc.dg/vect/pr115385.c: New testcase. * gcc.target/i386/vect-pr115385.c: Likewise.
2024-06-13tree-optimization/114107 - avoid peeling for gaps in more casesRichard Biener4-63/+94
The following refactors the code to detect necessary peeling for gaps, in particular the PR103116 case when there is no gap but the group size is smaller than the vector size. The testcase in PR114107 shows we fail to SLP for (int i=0; i<n; i++) for (int k=0; k<4; k++) data[4*i+k] *= factor[i]; because peeling one scalar iteration isn't enough to cover a gap of 3 elements of factor[i]. But the code detecting this is placed after the logic that detects cases we handle properly already as we'd code generate { factor[i], 0., 0., 0. } for V4DFmode vectorization already. In fact the check to detect when peeling a single iteration isn't enough seems improperly guarded as it should apply to all cases. I'm not sure we correctly handle VMAT_CONTIGUOUS_REVERSE but I checked that VMAT_STRIDED_SLP and VMAT_ELEMENTWISE correctly avoid touching excess elements. With this change we can use SLP for the above testcase and the PR103116 testcases no longer require an epilogue on x86-64. It might be different on other targets so I made those testcases runtime FAIL only instead of relying on dump scanning there's currently no easy way to properly constrain. PR tree-optimization/114107 PR tree-optimization/110445 * tree-vect-stmts.cc (get_group_load_store_type): Refactor contiguous access case. Make sure peeling for gap constraints are always tested and consistently relax when we know we can avoid touching excess elements during code generation. But rewrite the check poly-int aware. * gcc.dg/vect/pr114107.c: New testcase. * gcc.dg/vect/pr103116-1.c: Adjust. * gcc.dg/vect/pr103116-2.c: Likewise.
2024-06-12Fix error messageAndi Kleen2-2/+2
gcc/cp/ChangeLog: * parser.cc (cp_parser_asm_string_expression): Use correct error message. gcc/testsuite/ChangeLog: * g++.dg/cpp1z/constexpr-asm-3.C: Adjust for new message.
2024-06-12Parse close paren even when constexpr extraction failsAndi Kleen1-1/+1
To get better error recovery. gcc/cp/ChangeLog: * parser.cc (cp_parser_asm_string_expression): Parse close parent when constexpr extraction fails.
2024-06-12Remove const char * support for asm constexprAndi Kleen4-18/+16
asm constexpr now only accepts the same string types as C++26 assert, e.g. string_view and string. Adjust test suite and documentation. gcc/cp/ChangeLog: * parser.cc (cp_parser_asm_string_expression): Remove support for const char * for asm constexpr. gcc/ChangeLog: * doc/extend.texi: Use std::string_view in asm constexpr example. gcc/testsuite/ChangeLog: * g++.dg/cpp1z/constexpr-asm-1.C: Use std::std_string_view. * g++.dg/cpp1z/constexpr-asm-3.C: Dito.
2024-06-13Fix ICE due to REGNO of a SUBREG.liuhongt2-1/+5
Use reg_or_subregno instead. gcc/ChangeLog: PR target/115452 * config/i386/i386-features.cc (scalar_chain::convert_op): Use reg_or_subregno instead of REGNO to avoid ICE. gcc/testsuite/ChangeLog: * gcc.target/i386/pr115452.c: New test.
2024-06-13Test: Move target independent test cases to gcc.dg/torturePan Li2-2/+0
The test cases of pr115387 are target independent, at least x86 and riscv are able to reproduce. Thus, move these cases to the gcc.dg/torture. The below test suites are passed. 1. The rv64gcv fully regression test. 2. The x86 fully regression test. gcc/testsuite/ChangeLog: * gcc.target/riscv/pr115387-1.c: Move to... * gcc.dg/torture/pr115387-1.c: ...here. * gcc.target/riscv/pr115387-2.c: Move to... * gcc.dg/torture/pr115387-2.c: ...here. Signed-off-by: Pan Li <pan2.li@intel.com>
2024-06-12rs6000: Fix pr66144-3.c test to accept multiple equivalent insns. [PR115262]Peter Bergner1-4/+4
Jeff's commit r15-831-g05daf617ea22e1 changed the instruction we expected for this test case into an equivalent instruction. Modify the test case so it will accept any of three instructions we could get depending on the options used. 2024-06-12 Peter Bergner <bergner@linux.ibm.com> gcc/testsuite/ PR testsuite/115262 * gcc.target/powerpc/pr66144-3.c (dg-do): Compile for all targets. (dg-options): Add -fno-unroll-loops and remove -mvsx. (scan-assembler): Change from this... (scan-assembler-times): ...to this. Tweak regex to accept multiple allowable instructions.
2024-06-13MIPS: Use FPU-enabled tune for mips32/mips64/mips64r2/mips64r3/mips64r5YunQiang Su1-5/+5
Currently, the default tune value of mips32 is PROCESSOR_4KC, and the default tune value of mips64/mips64r2/mips64r3/mips64r5 is PROCESSOR_5KC. PROCESSOR_4KC and PROCESSOR_5KC are both FPU-less. Let's use PROCESSOR_24KF1_1 for mips32, and PROCESSOR_5KF for mips64/ mips64r2/mips64r3/mips64r5. We find this problem when we try to fix gcc.target/mips/movcc-3.c. gcc: * config/mips/mips-cpus.def: Use PROCESSOR_24KF1_1 for mips32; Use PROCESSOR_5KF for mips64/mips64r2/mips64r3/mips64r5.
2024-06-13MIPS: Use signaling fcmp instructions for LT/LE/LTGTYunQiang Su5-11/+61
LT/LE: c.lt.fmt/c.le.fmt on pre-R6 and cmp.lt.fmt/cmp.le.fmt have different semantic: c.lt.fmt will signal for all NaN, including qNaN; cmp.lt.fmt will only signal sNaN, while not qNaN; cmp.slt.fmt has the same semantic as c.lt.fmt; lt/le of RTL will signaling qNaN. while in `s<code>_<SCALARF:mode>_using_<FPCC:mode>`, RTL operation `lt`/`le` are convert to c/cmp's lt/le, which is correct for C.cond.fmt, while not for CMP.cond.fmt. Let's convert them to slt/sle if ISA_HAS_CCF. For LTGT, which signals qNaN, `sne` of r6 has same semantic, while pre-R6 has only inverse one `ngl`. Thus for RTL we have to use the `uneq` as the operator, and introduce a new CC mode: CCEmode to mark it as signaling. This patch can fix gcc.dg/torture/pr91323.c for pre-R6; gcc.dg/torture/builtin-iseqsig-* for R6. gcc: * config/mips/mips-modes.def: New CC_MODE CCE. * config/mips/mips-protos.h(mips_output_compare): New function. * config/mips/mips.cc(mips_allocate_fcc): Set CCEmode count=1. (mips_emit_compare): Use CCEmode for LTGT/LT/LE for pre-R6. (mips_output_compare): New function. Convert lt/le to slt/sle for R6; convert ueq to ngl for CCEmode. (mips_hard_regno_mode_ok_uncached): Mention CCEmode. * config/mips/mips.h: Mention CCEmode for LOAD_EXTEND_OP. * config/mips/mips.md(FPCC): Add CCE. (define_mode_iterator MOVECC): Mention CCE. (define_mode_attr reg): Add CCE with "z". (define_mode_attr fpcmp): Add CCE with "c". (define_code_attr fcond): ltgt should use sne instead of ne. (s<code>_<SCALARF:mode>_using_<FPCC:mode>): call mips_output_compare.
2024-06-13[APX ZU] Support APX zero-upperLingling Kong6-3/+86
Enable ZU for IMUL (opcodes 0x69 and 0x6B) and SETcc. gcc/ChangeLog: * config/i386/i386-opts.h (enum apx_features): Add apx_zu. * config/i386/i386.h (TARGET_APX_ZU): Define. * config/i386/i386.md (*imulhi<mode>zu): New define_insn. (*setcc_<mode>_zu): Ditto. * config/i386/i386.opt: Add enum value for zu. gcc/testsuite/ChangeLog: * gcc.target/i386/apx-zu-1.c: New test. * gcc.target/i386/apx-zu-2.c: New test.
2024-06-13Daily bump.GCC Administrator10-1/+658
2024-06-12c++: visibility wrt concept-id as targ [PR115283]Patrick Palka2-2/+17
Like with alias templates, it seems we don't maintain visibility flags for concepts either, so min_vis_expr_r should ignore them for now. Otherwise after r14-6789 we may incorrectly give a function template that uses a concept-id in its signature internal linkage. PR c++/115283 gcc/cp/ChangeLog: * decl2.cc (min_vis_expr_r) <case TEMPLATE_DECL>: Ignore concepts. gcc/testsuite/ChangeLog: * g++.dg/template/linkage5.C: New test. Reviewed-by: Jason Merrill <jason@redhat.com>
2024-06-12c++: repeated export usingJason Merrill2-2/+17
A sample implementation of module std was breaking because the exports included 'using std::operator&' twice. Since Nathaniel's r15-964 for PR114867, the first using added an extra instance of each function that was revealed/exported by that using, resulting in duplicates for lookup_maybe_add to dedup. But if the duplicate is the first thing in the list, lookup_add doesn't make an OVERLOAD, so trying to set OVL_USING_P crashes. Fixed by using ovl_make in the case where we want to set the flag. gcc/cp/ChangeLog: * tree.cc (lookup_maybe_add): Use ovl_make when setting OVL_USING_P. gcc/testsuite/ChangeLog: * g++.dg/modules/using-21_a.C: New test.
2024-06-12c++: module std and exception_ptrJason Merrill2-2/+19
exception_ptr.h contains namespace __exception_ptr { class exception_ptr; } using __exception_ptr::exception_ptr; so when module std tries to 'export using std::exception_ptr', it names another using-directive rather than the class directly, so __exception_ptr is never explicitly opened in module purview. gcc/cp/ChangeLog: * module.cc (depset::hash::add_binding_entity): Set DECL_MODULE_PURVIEW_P instead of asserting. gcc/testsuite/ChangeLog: * g++.dg/modules/using-20_a.C: New test.
2024-06-12c++: fix testcase diagnosticsJason Merrill1-2/+2
The r15-1180 adjustments to this testcase broke a couple of tests in C++26 mode. gcc/testsuite/ChangeLog: * g++.dg/cpp26/static_assert1.C: Fix diagnostic typos.
2024-06-12Whitespace cleanup for target-supports.expPatrick O'Neill1-584/+584
This patch removes trailing whitespace and replaces leading groups of 8-16 spaces with tabs. gcc/testsuite/ChangeLog: * lib/target-supports.exp: Cleanup whitespace.
2024-06-12pretty_printer: unbreak build on aarch64 [PR115465]David Malcolm1-1/+1
I missed this target-specific usage of pretty_printer::buffer when making the fields private in r15-1209-gc5e3be456888aa; sorry. gcc/ChangeLog: PR bootstrap/115465 * config/aarch64/aarch64-early-ra.cc (early_ra::process_block): Update for fields of pretty_printer becoming private in r15-1209-gc5e3be456888aa. Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2024-06-12RISC-V: Allow any temp register to be used in amo testsPatrick O'Neill12-24/+24
We artifically restrict the temp registers to be a[0-9]+ when other registers like t[0-9]+ are valid too. Update to make the regex accept any register for the temp value. gcc/testsuite/ChangeLog: * gcc.target/riscv/amo/amo-table-a-6-load-1.c: Update temp register regex. * gcc.target/riscv/amo/amo-table-a-6-load-2.c: Ditto. * gcc.target/riscv/amo/amo-table-a-6-load-3.c: Ditto. * gcc.target/riscv/amo/amo-table-a-6-store-1.c: Ditto. * gcc.target/riscv/amo/amo-table-a-6-store-2.c: Ditto. * gcc.target/riscv/amo/amo-table-a-6-store-compat-3.c: Ditto. * gcc.target/riscv/amo/amo-table-ztso-load-1.c: Ditto. * gcc.target/riscv/amo/amo-table-ztso-load-2.c: Ditto. * gcc.target/riscv/amo/amo-table-ztso-load-3.c: Ditto. * gcc.target/riscv/amo/amo-table-ztso-store-1.c: Ditto. * gcc.target/riscv/amo/amo-table-ztso-store-2.c: Ditto. * gcc.target/riscv/amo/amo-table-ztso-store-3.c: Ditto. Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
2024-06-12RISC-V: Fix amoadd call argumentsPatrick O'Neill26-26/+26
Update __atomic_add_fetch arguments to be a pointer and value rather than two pointers. gcc/testsuite/ChangeLog: * gcc.target/riscv/amo/amo-table-a-6-amo-add-1.c: Update __atomic_add_fetch args. * gcc.target/riscv/amo/amo-table-a-6-amo-add-2.c: Ditto. * gcc.target/riscv/amo/amo-table-a-6-amo-add-3.c: Ditto. * gcc.target/riscv/amo/amo-table-a-6-amo-add-4.c: Ditto. * gcc.target/riscv/amo/amo-table-a-6-amo-add-5.c: Ditto. * gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-1.c: Ditto. * gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-2.c: Ditto. * gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-3.c: Ditto. * gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-4.c: Ditto. * gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-5.c: Ditto. * gcc.target/riscv/amo/amo-table-ztso-amo-add-1.c: Ditto. * gcc.target/riscv/amo/amo-table-ztso-amo-add-2.c: Ditto. * gcc.target/riscv/amo/amo-table-ztso-amo-add-3.c: Ditto. * gcc.target/riscv/amo/amo-table-ztso-amo-add-4.c: Ditto. * gcc.target/riscv/amo/amo-table-ztso-amo-add-5.c: Ditto. * gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-1.c: Ditto. * gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-2.c: Ditto. * gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-3.c: Ditto. * gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-4.c: Ditto. * gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-5.c: Ditto. * gcc.target/riscv/amo/amo-zaamo-preferred-over-zalrsc.c: Ditto. * gcc.target/riscv/amo/amo-zalrsc-amo-add-1.c: Ditto. * gcc.target/riscv/amo/amo-zalrsc-amo-add-2.c: Ditto. * gcc.target/riscv/amo/amo-zalrsc-amo-add-3.c: Ditto. * gcc.target/riscv/amo/amo-zalrsc-amo-add-4.c: Ditto. * gcc.target/riscv/amo/amo-zalrsc-amo-add-5.c: Ditto. Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
2024-06-12RISC-V: Move amo tests into subfolderPatrick O'Neill73-0/+41
There's a large number of atomic related testcases in the riscv folder. Move them into a subfolder similar to what was done for rvv testcases. gcc/testsuite/ChangeLog: * gcc.target/riscv/amo-table-a-6-amo-add-1.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-amo-add-1.c: ...here. * gcc.target/riscv/amo-table-a-6-amo-add-2.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-amo-add-2.c: ...here. * gcc.target/riscv/amo-table-a-6-amo-add-3.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-amo-add-3.c: ...here. * gcc.target/riscv/amo-table-a-6-amo-add-4.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-amo-add-4.c: ...here. * gcc.target/riscv/amo-table-a-6-amo-add-5.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-amo-add-5.c: ...here. * gcc.target/riscv/amo-table-a-6-compare-exchange-1.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-compare-exchange-1.c: ...here. * gcc.target/riscv/amo-table-a-6-compare-exchange-2.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-compare-exchange-2.c: ...here. * gcc.target/riscv/amo-table-a-6-compare-exchange-3.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-compare-exchange-3.c: ...here. * gcc.target/riscv/amo-table-a-6-compare-exchange-4.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-compare-exchange-4.c: ...here. * gcc.target/riscv/amo-table-a-6-compare-exchange-5.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-compare-exchange-5.c: ...here. * gcc.target/riscv/amo-table-a-6-compare-exchange-6.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-compare-exchange-6.c: ...here. * gcc.target/riscv/amo-table-a-6-compare-exchange-7.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-compare-exchange-7.c: ...here. * gcc.target/riscv/amo-table-a-6-fence-1.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-fence-1.c: ...here. * gcc.target/riscv/amo-table-a-6-fence-2.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-fence-2.c: ...here. * gcc.target/riscv/amo-table-a-6-fence-3.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-fence-3.c: ...here. * gcc.target/riscv/amo-table-a-6-fence-4.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-fence-4.c: ...here. * gcc.target/riscv/amo-table-a-6-fence-5.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-fence-5.c: ...here. * gcc.target/riscv/amo-table-a-6-load-1.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-load-1.c: ...here. * gcc.target/riscv/amo-table-a-6-load-2.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-load-2.c: ...here. * gcc.target/riscv/amo-table-a-6-load-3.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-load-3.c: ...here. * gcc.target/riscv/amo-table-a-6-store-1.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-store-1.c: ...here. * gcc.target/riscv/amo-table-a-6-store-2.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-store-2.c: ...here. * gcc.target/riscv/amo-table-a-6-store-compat-3.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-store-compat-3.c: ...here. * gcc.target/riscv/amo-table-a-6-subword-amo-add-1.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-1.c: ...here. * gcc.target/riscv/amo-table-a-6-subword-amo-add-2.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-2.c: ...here. * gcc.target/riscv/amo-table-a-6-subword-amo-add-3.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-3.c: ...here. * gcc.target/riscv/amo-table-a-6-subword-amo-add-4.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-4.c: ...here. * gcc.target/riscv/amo-table-a-6-subword-amo-add-5.c: Move to... * gcc.target/riscv/amo/amo-table-a-6-subword-amo-add-5.c: ...here. * gcc.target/riscv/amo-table-ztso-amo-add-1.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-amo-add-1.c: ...here. * gcc.target/riscv/amo-table-ztso-amo-add-2.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-amo-add-2.c: ...here. * gcc.target/riscv/amo-table-ztso-amo-add-3.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-amo-add-3.c: ...here. * gcc.target/riscv/amo-table-ztso-amo-add-4.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-amo-add-4.c: ...here. * gcc.target/riscv/amo-table-ztso-amo-add-5.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-amo-add-5.c: ...here. * gcc.target/riscv/amo-table-ztso-compare-exchange-1.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-compare-exchange-1.c: ...here. * gcc.target/riscv/amo-table-ztso-compare-exchange-2.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-compare-exchange-2.c: ...here. * gcc.target/riscv/amo-table-ztso-compare-exchange-3.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-compare-exchange-3.c: ...here. * gcc.target/riscv/amo-table-ztso-compare-exchange-4.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-compare-exchange-4.c: ...here. * gcc.target/riscv/amo-table-ztso-compare-exchange-5.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-compare-exchange-5.c: ...here. * gcc.target/riscv/amo-table-ztso-compare-exchange-6.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-compare-exchange-6.c: ...here. * gcc.target/riscv/amo-table-ztso-compare-exchange-7.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-compare-exchange-7.c: ...here. * gcc.target/riscv/amo-table-ztso-fence-1.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-fence-1.c: ...here. * gcc.target/riscv/amo-table-ztso-fence-2.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-fence-2.c: ...here. * gcc.target/riscv/amo-table-ztso-fence-3.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-fence-3.c: ...here. * gcc.target/riscv/amo-table-ztso-fence-4.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-fence-4.c: ...here. * gcc.target/riscv/amo-table-ztso-fence-5.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-fence-5.c: ...here. * gcc.target/riscv/amo-table-ztso-load-1.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-load-1.c: ...here. * gcc.target/riscv/amo-table-ztso-load-2.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-load-2.c: ...here. * gcc.target/riscv/amo-table-ztso-load-3.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-load-3.c: ...here. * gcc.target/riscv/amo-table-ztso-store-1.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-store-1.c: ...here. * gcc.target/riscv/amo-table-ztso-store-2.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-store-2.c: ...here. * gcc.target/riscv/amo-table-ztso-store-3.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-store-3.c: ...here. * gcc.target/riscv/amo-table-ztso-subword-amo-add-1.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-1.c: ...here. * gcc.target/riscv/amo-table-ztso-subword-amo-add-2.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-2.c: ...here. * gcc.target/riscv/amo-table-ztso-subword-amo-add-3.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-3.c: ...here. * gcc.target/riscv/amo-table-ztso-subword-amo-add-4.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-4.c: ...here. * gcc.target/riscv/amo-table-ztso-subword-amo-add-5.c: Move to... * gcc.target/riscv/amo/amo-table-ztso-subword-amo-add-5.c: ...here. * gcc.target/riscv/amo-zaamo-preferred-over-zalrsc.c: Move to... * gcc.target/riscv/amo/amo-zaamo-preferred-over-zalrsc.c: ...here. * gcc.target/riscv/amo-zalrsc-amo-add-1.c: Move to... * gcc.target/riscv/amo/amo-zalrsc-amo-add-1.c: ...here. * gcc.target/riscv/amo-zalrsc-amo-add-2.c: Move to... * gcc.target/riscv/amo/amo-zalrsc-amo-add-2.c: ...here. * gcc.target/riscv/amo-zalrsc-amo-add-3.c: Move to... * gcc.target/riscv/amo/amo-zalrsc-amo-add-3.c: ...here. * gcc.target/riscv/amo-zalrsc-amo-add-4.c: Move to... * gcc.target/riscv/amo/amo-zalrsc-amo-add-4.c: ...here. * gcc.target/riscv/amo-zalrsc-amo-add-5.c: Move to... * gcc.target/riscv/amo/amo-zalrsc-amo-add-5.c: ...here. * gcc.target/riscv/inline-atomics-1.c: Move to... * gcc.target/riscv/amo/inline-atomics-1.c: ...here. * gcc.target/riscv/inline-atomics-2.c: Move to... * gcc.target/riscv/amo/inline-atomics-2.c: ...here. * gcc.target/riscv/inline-atomics-3.c: Move to... * gcc.target/riscv/amo/inline-atomics-3.c: ...here. * gcc.target/riscv/inline-atomics-4.c: Move to... * gcc.target/riscv/amo/inline-atomics-4.c: ...here. * gcc.target/riscv/inline-atomics-5.c: Move to... * gcc.target/riscv/amo/inline-atomics-5.c: ...here. * gcc.target/riscv/inline-atomics-6.c: Move to... * gcc.target/riscv/amo/inline-atomics-6.c: ...here. * gcc.target/riscv/inline-atomics-7.c: Move to... * gcc.target/riscv/amo/inline-atomics-7.c: ...here. * gcc.target/riscv/inline-atomics-8.c: Move to... * gcc.target/riscv/amo/inline-atomics-8.c: ...here. * gcc.target/riscv/pr114130.c: Move to... * gcc.target/riscv/amo/pr114130.c: ...here. * gcc.target/riscv/pr89835.c: Move to... * gcc.target/riscv/amo/pr89835.c: ...here. * gcc.target/riscv/amo/amo.exp: New file. Signed-off-by: Patrick O'Neill <patrick@rivosinc.com>
2024-06-12aarch64: Use bitreverse rtl code instead of unspec [PR115176]Andrew Pinski6-19/+10
Bitreverse rtl code was added with r14-1586-g6160572f8d243c. So let's use it instead of an unspec. This is just a small cleanup but it does have one small fix with respect to rtx costs which didn't handle vector modes correctly for the UNSPEC and now it does. This is part of the first step in adding __builtin_bitreverse's builtins but it is independent of it though. Bootstrapped and tested on aarch64-linux-gnu with no regressions. gcc/ChangeLog: PR target/115176 * config/aarch64/aarch64-simd.md (aarch64_rbit<mode><vczle><vczbe>): Use bitreverse instead of unspec. * config/aarch64/aarch64-sve-builtins-base.cc (svrbit): Convert over to using rtx_code_function instead of unspec_based_function. * config/aarch64/aarch64-sve.md: Update comment where RBIT is included. * config/aarch64/aarch64.cc (aarch64_rtx_costs): Handle BITREVERSE like BSWAP. Remove UNSPEC_RBIT support. * config/aarch64/aarch64.md (unspec): Remove UNSPEC_RBIT. (aarch64_rbit<mode>): Use bitreverse instead of unspec. * config/aarch64/iterators.md (SVE_INT_UNARY): Add bitreverse. (optab): Likewise. (sve_int_op): Likewise. (SVE_INT_UNARY): Remove UNSPEC_RBIT. (optab): Likewise. (sve_int_op): Likewise. (min_elem_bits): Likewise. Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
2024-06-12match: Improve gimple_bitwise_equal_p and gimple_bitwise_inverted_equal_p ↵Andrew Pinski3-10/+48
for truncating casts [PR115449] As mentioned by Jeff in r15-831-g05daf617ea22e1d818295ed2d037456937e23530, we don't handle `(X | Y) & ~Y` -> `X & ~Y` on the gimple level when there are some different signed (but same precision) types dealing with matching `~Y` with the `Y` part. This improves both gimple_bitwise_equal_p and gimple_bitwise_inverted_equal_p to be able to say `(truncate)a` and `(truncate)a` are bitwise_equal and that `~(truncate)a` and `(truncate)a` are bitwise_invert_equal. Bootstrapped and tested on x86_64-linux-gnu with no regressions. PR tree-optimization/115449 gcc/ChangeLog: * gimple-match-head.cc (gimple_maybe_truncate): New declaration. (gimple_bitwise_equal_p): Match truncations that differ only in types with the same precision. (gimple_bitwise_inverted_equal_p): For matching after bit_not_with_nop call gimple_bitwise_equal_p. * match.pd (maybe_truncate): New match pattern. gcc/testsuite/ChangeLog: * gcc.dg/tree-ssa/bitops-10.c: New test. Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
2024-06-12Move cexpr_stree tree string build into utility functionAndi Kleen3-4/+16
No semantics changes. gcc/cp/ChangeLog: * cp-tree.h (extract): Add new overload to return tree. * parser.cc (cp_parser_asm_string_expression): Use tree extract. * semantics.cc (cexpr_str::extract): Add new overload to return tree.
2024-06-12middle-end: Drop __builtin_prefetch calls in autovectorization [PR114061]Victor Do Nascimento4-2/+31
At present the autovectorizer fails to vectorize simple loops involving calls to `__builtin_prefetch'. A simple example of such loop is given below: void foo(double * restrict a, double * restrict b, int n){ int i; for(i=0; i<n; ++i){ a[i] = a[i] + b[i]; __builtin_prefetch(&(b[i+8])); } } The failure stems from two issues: 1. Given that it is typically not possible to fully reason about a function call due to the possibility of side effects, the autovectorizer does not attempt to vectorize loops which make such calls. Given the memory reference passed to `__builtin_prefetch', in the absence of assurances about its effect on the passed memory location the compiler deems the function unsafe to vectorize, marking it as clobbering memory in `vect_find_stmt_data_reference'. This leads to the failure in autovectorization. 2. Notwithstanding the above issue, though the prefetch statement would be classed as `vect_unused_in_scope', the loop invariant that is used in the address of the prefetch is the scalar loop's and not the vector loop's IV. That is, it still uses `i' and not `vec_iv' because the instruction wasn't vectorized, causing DCE to think the value is live, such that we now have both the vector and scalar loop invariant actively used in the loop. This patch addresses both of these: 1. About the issue regarding the memory clobber, data prefetch does not generate faults if its address argument is invalid and does not write to memory. Therefore, it does not alter the internal state of the program or its control flow under any circumstance. As such, it is reasonable that the function be marked as not affecting memory contents. To achieve this, we add the necessary logic to `get_references_in_stmt' to ensure that builtin functions are given given the same treatment as internal functions. If the gimple call is to a builtin function and its function code is `BUILT_IN_PREFETCH', we mark `clobbers_memory' as false. 2. Finding precedence in the way clobber statements are handled, whereby the vectorizer drops these from both the scalar and vectorized versions of a given loop, we choose to drop prefetch hints in a similar fashion. This seems appropriate given how software prefetch hints are typically ignored by processors across architectures, as they seldom lead to performance gain over their hardware counterparts. gcc/ChangeLog: PR tree-optimization/114061 * tree-data-ref.cc (get_references_in_stmt): set `clobbers_memory' to false for __builtin_prefetch. * tree-vect-loop.cc (vect_transform_loop): Drop all __builtin_prefetch calls from loops. gcc/testsuite/ChangeLog: * gcc.dg/vect/vect-prefetch-drop.c: New test. * gcc.target/aarch64/vect-prefetch-drop.c: Likewise.
2024-06-12pretty_printer: convert chunk_info into a classDavid Malcolm4-55/+90
No functional change intended. gcc/cp/ChangeLog: * error.cc (append_formatted_chunk): Move part of body into chunk_info::append_formatted_chunk. gcc/ChangeLog: * dumpfile.cc (dump_pretty_printer::emit_items): Update for changes to chunk_info. * pretty-print.cc (chunk_info::append_formatted_chunk): New, based on code in cp/error.cc's append_formatted_chunk. (chunk_info::pop_from_output_buffer): New, based on code in pp_output_formatted_text and dump_pretty_printer::emit_items. (on_begin_quote): Convert to... (chunk_info::on_begin_quote): ...this. (on_end_quote): Convert to... (chunk_info::on_end_quote): ...this. (pretty_printer::format): Update for chunk_info becoming a class and its fields gaining "m_" prefixes. Update for on_begin_quote and on_end_quote moving to chunk_info. (quoting_info::handle_phase_3): Update for changes to chunk_info. (pp_output_formatted_text): Likewise. Move cleanup code to chunk_info::pop_from_output_buffer. * pretty-print.h (class output_buffer): New forward decl. (class urlifier): New forward decl. (struct chunk_info): Convert to... (class chunk_info): ...this. Add friend class pretty_printer. (chunk_info::get_args): New accessor. (chunk_info::get_quoting_info): New accessor. (chunk_info::append_formatted_chunk): New decl. (chunk_info::pop_from_output_buffer): New decl. (chunk_info::on_begin_quote): New decl. (chunk_info::on_end_quote): New decl. (chunk_info::prev): Rename to... (chunk_info::m_prev): ...this. (chunk_info::args): Rename to... (chunk_info::m_args): ...this. (output_buffer::cur_chunk_array): Drop "struct" from decl. Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2024-06-12pretty_printer: make all fields privateDavid Malcolm50-373/+516
No functional change intended. gcc/analyzer/ChangeLog: * access-diagram.cc (access_range::dump): Update for fields of pretty_printer becoming private. * call-details.cc (call_details::dump): Likewise. * call-summary.cc (call_summary::dump): Likewise. (call_summary_replay::dump): Likewise. * checker-event.cc (checker_event::debug): Likewise. * constraint-manager.cc (range::dump): Likewise. (bounded_range::dump): Likewise. (constraint_manager::dump): Likewise. * engine.cc (exploded_node::dump): Likewise. (exploded_path::dump): Likewise. (exploded_path::dump_to_file): Likewise. * feasible-graph.cc (feasible_graph::dump_feasible_path): Likewise. * program-point.cc (program_point::dump): Likewise. * program-state.cc (extrinsic_state::dump_to_file): Likewise. (sm_state_map::dump): Likewise. (program_state::dump_to_file): Likewise. * ranges.cc (symbolic_byte_offset::dump): Likewise. (symbolic_byte_range::dump): Likewise. * record-layout.cc (record_layout::dump): Likewise. * region-model-reachability.cc (reachable_regions::dump): Likewise. * region-model.cc (region_to_value_map::dump): Likewise. (region_model::dump): Likewise. (model_merger::dump): Likewise. * region-model.h (one_way_id_map<T>::dump): Likewise. * region.cc (region_offset::dump): Likewise. (region::dump): Likewise. * sm-malloc.cc (deallocator_set::dump): Likewise. * store.cc (uncertainty_t::dump): Likewise. (binding_key::dump): Likewise. (bit_range::dump): Likewise. (byte_range::dump): Likewise. (binding_map::dump): Likewise. (binding_cluster::dump): Likewise. (store::dump): Likewise. * supergraph.cc (supergraph::dump_dot_to_file): Likewise. (superedge::dump): Likewise. * svalue.cc (svalue::dump): Likewise. gcc/c-family/ChangeLog: * c-ada-spec.cc (dump_ads): Update for fields of pretty_printer becoming private. * c-pretty-print.cc: Likewise throughout. gcc/c/ChangeLog: * c-objc-common.cc (print_type): Update for fields of pretty_printer becoming private. (c_tree_printer): Likewise. gcc/cp/ChangeLog: * cxx-pretty-print.cc: Update throughout for fields of pretty_printer becoming private. * error.cc: Likewise. gcc/ChangeLog: * diagnostic.cc (diagnostic_context::urls_init): Update for fields of pretty_printer becoming private. (diagnostic_context::print_any_cwe): Likewise. (diagnostic_context::print_any_rules): Likewise. (diagnostic_context::print_option_information): Likewise. * diagnostic.h (diagnostic_format_decoder): Likewise. (diagnostic_prefixing_rule): Likewise, fixing typo. * digraph.cc (test_dump_to_dot): Likewise. * digraph.h (digraph<GraphTraits>::dump_dot_to_file): Likewise. * dumpfile.cc (dump_pretty_printer::emit_any_pending_textual_chunks): Likewise. * gimple-pretty-print.cc (print_gimple_stmt): Likewise. (print_gimple_expr): Likewise. (print_gimple_seq): Likewise. (dump_ssaname_info_to_file): Likewise. (gimple_dump_bb): Likewise. * graph.cc (print_graph_cfg): Likewise. (start_graph_dump): Likewise. * langhooks.cc (lhd_print_error_function): Likewise. * lto-wrapper.cc (print_lto_docs_link): Likewise. * pretty-print.cc (pp_set_real_maximum_length): Convert to... (pretty_printer::set_real_maximum_length): ...this. (pp_clear_state): Convert to... (pretty_printer::clear_state): ...this. (pp_wrap_text): Update for pp_remaining_character_count_for_line becoming a member function. (urlify_quoted_string): Update for fields of pretty_printer becoming private. (pp_format): Convert to... (pretty_printer::format): ...this. Reduce the scope of local variables "old_line_length" and "old_wrapping_mode" and make const. Reduce the scope of locals "args", "new_chunk_array", "curarg", "any_unnumbered", and "any_numbered". (pp_output_formatted_text): Update for fields of pretty_printer becoming private. (pp_flush): Likewise. (pp_really_flush): Likewise. (pp_set_line_maximum_length): Likewise. (pp_set_prefix): Convert to... (pretty_printer::set_prefix): ...this. (pp_take_prefix): Update for fields of pretty_printer gaining "m_" prefixes. (pp_destroy_prefix): Likewise. (pp_emit_prefix): Convert to... (pretty_printer::emit_prefix): ...this. (pretty_printer::pretty_printer): Update both ctors for fields gaining "m_" prefixes. (pretty_printer::~pretty_printer): Likewise for dtor. (pp_append_text): Update for pp_emit_prefix becoming pretty_printer::emit_prefix. (pp_remaining_character_count_for_line): Convert to... (pretty_printer::remaining_character_count_for_line): ...this. (pp_character): Update for above change. (pp_maybe_space): Convert to... (pretty_printer::maybe_space): ...this. (pp_begin_url): Convert to... (pretty_printer::begin_url): ...this. (get_end_url_string): Update for fields of pretty_printer becoming private. (pp_end_url): Convert to... (pretty_printer::end_url): ...this. (selftest::test_pretty_printer::test_pretty_printer): Update for fields of pretty_printer becoming private. (selftest::test_urls): Likewise. (selftest::test_null_urls): Likewise. (selftest::test_urlification): Likewise. * pretty-print.h (pp_line_cutoff): Convert from macro to inline function. (pp_prefixing_rule): Likewise. (pp_wrapping_mode): Likewise. (pp_format_decoder): Likewise. (pp_needs_newline): Likewise. (pp_indentation): Likewise. (pp_translate_identifiers): Likewise. (pp_show_color): Likewise. (pp_buffer): Likewise. (pp_get_prefix): Add forward decl to allow friend decl. (pp_take_prefix): Likewise. (pp_destroy_prefix): Likewise. (class pretty_printer): Fix typo in leading comment. Add "friend" decls for the various new accessor functions that were formerly macros and for pp_get_prefix, pp_take_prefix, and pp_destroy_prefix. Make all fields private. (pretty_printer::set_output_stream): New. (pretty_printer::set_prefix): New decl. (pretty_printer::emit_prefix): New decl. (pretty_printer::format): New decl. (pretty_printer::maybe_space): New decl. (pretty_printer::supports_urls_p): New. (pretty_printer::get_url_format): New. (pretty_printer::set_url_format): New. (pretty_printer::begin_url): New decl. (pretty_printer::end_url): New decl. (pretty_printer::set_verbatim_wrapping): New. (pretty_printer::set_padding): New. (pretty_printer::get_padding): New. (pretty_printer::clear_state): New decl. (pretty_printer::set_real_maximum_length): New decl. (pretty_printer::remaining_character_count_for_line): New decl. (pretty_printer::buffer): Rename to... (pretty_printer::m_buffer): ...this. (pretty_printer::prefix): Rename to... (pretty_printer::m_prefix): ...this; (pretty_printer::padding): Rename to... (pretty_printer::m_padding): ...this; (pretty_printer::maximum_length): Rename to... (pretty_printer::m_maximum_length): ...this; (pretty_printer::indent_skip): Rename to... (pretty_printer::m_indent_skip): ...this; (pretty_printer::wrapping): Rename to... (pretty_printer::m_wrapping): ...this; (pretty_printer::format_decoder): Rename to... (pretty_printer::m_format_decoder): ...this; (pretty_printer::emitted_prefix): Rename to... (pretty_printer::m_emitted_prefix): ...this; (pretty_printer::need_newline): Rename to... (pretty_printer::m_need_newline): ...this; (pretty_printer::translate_identifiers): Rename to... (pretty_printer::m_translate_identifiers): ...this; (pretty_printer::show_color): Rename to... (pretty_printer::m_show_color): ...this; (pretty_printer::url_format): Rename to... (pretty_printer::m_url_format): ...this; (pp_get_prefix): Reformat. (pp_format_postprocessor): New inline function. (pp_take_prefix): Move decl to before class pretty_printer. (pp_destroy_prefix): Likewise. (pp_set_prefix): Convert to inline function. (pp_emit_prefix): Convert to inline function. (pp_format): Convert to inline function. (pp_maybe_space): Convert to inline function. (pp_begin_url): Convert to inline function. (pp_end_url): Convert to inline function. (pp_set_verbatim_wrapping): Convert from macro to inline function, renaming... (pp_set_verbatim_wrapping_): ...this. * print-rtl.cc (dump_value_slim): Update for fields of pretty_printer becoming private. (dump_insn_slim): Likewise. (dump_rtl_slim): Likewise. * print-tree.cc (print_node): Likewise. * sched-rgn.cc (dump_rgn_dependencies_dot): Likewise. * text-art/canvas.cc (canvas::print_to_pp): Likewise. (canvas::debug): Likewise. (selftest::test_canvas_urls): Likewise. * text-art/dump.h (dump_to_file): Likewise. * text-art/selftests.cc (selftest::assert_canvas_streq): Likewise. * text-art/style.cc (style::print_changes): Likewise. * text-art/styled-string.cc (styled_string::from_fmt_va): Likewise. * tree-diagnostic-path.cc (control_flow_tests): Update for pp_show_color becoming an inline function. * tree-loop-distribution.cc (dot_rdg_1): Update for fields of pretty_printer becoming private. * tree-pretty-print.cc (maybe_init_pretty_print): Likewise. * value-range.cc (vrange::dump): Likewise. (irange_bitmask::dump): Likewise. gcc/fortran/ChangeLog: * error.cc (gfc_clear_pp_buffer): Likewise. (gfc_warning): Likewise. (gfc_warning_check): Likewise. (gfc_error_opt): Likewise. (gfc_error_check): Likewise. gcc/jit/ChangeLog: * jit-recording.cc (recording::function::dump_to_dot): Update for fields of pretty_printer becoming private. gcc/testsuite/ChangeLog: * gcc.dg/plugin/analyzer_cpython_plugin.c (dump_refcnt_info): Update for fields of pretty_printer becoming private. Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2024-06-12pretty_printer: rename instances named "buffer" to "pp"David Malcolm6-1348/+1348
Various pretty_printer instances are named "buffer", but a pretty_printer *has* a buffer, rather than *is* a buffer. For example, pp_buffer (buffer)->digit_buffer is referring to "buffer"'s buffer's digit_buffer. This mechanical patch renames such variables to "pp", which I find much clearer; the above becomes: pp_buffer (pp)->digit_buffer i.e. "pp's buffer's digit_buffer". No functional change intended. Signed-off-by: David Malcolm <dmalcolm@redhat.com> gcc/c-family/ChangeLog: * c-ada-spec.cc: Rename pretty_printer "buffer" to "pp" throughout. gcc/ChangeLog: * gimple-pretty-print.cc: Rename pretty_printer "buffer" to "pp" throughout. * print-tree.cc (print_node): Likewise. * tree-loop-distribution.cc (dot_rdg_1): Likewise. * tree-pretty-print.h (dump_location): Likewise. * value-range.cc (vrange::dump): Likewise. (irange_bitmask::dump): Likewise. Signed-off-by: David Malcolm <dmalcolm@redhat.com>
2024-06-12LoongArch: Use bstrins for "value & (-1u << const)"Xi Ruoyao5-0/+49
A move/bstrins pair is as fast as a (addi.w|lu12i.w|lu32i.d|lu52i.d)/and pair, and twice fast as a srli/slli pair. When the src reg and the dst reg happens to be the same, the move instruction can be optimized away. gcc/ChangeLog: * config/loongarch/predicates.md (high_bitmask_operand): New predicate. * config/loongarch/constraints.md (Yy): New constriant. * config/loongarch/loongarch.md (and<mode>3_align): New define_insn_and_split. gcc/testsuite/ChangeLog: * gcc.target/loongarch/bstrins-1.c: New test. * gcc.target/loongarch/bstrins-2.c: New test.
2024-06-12LoongArch: Fix mode size comparision in loongarch_expand_conditional_moveXi Ruoyao1-1/+1
We were comparing a mode size with word_mode, but word_mode is an enum value thus this does not really make any sense. (Un)luckily E_DImode happens to be 8 so this seemed to work, but let's make it correct so it won't blow up when we add LA32 support or add another machine mode... gcc/ChangeLog: * config/loongarch/loongarch.cc (loongarch_expand_conditional_move): Compare mode size with UNITS_PER_WORD instead of word_mode.
2024-06-12testsuite: Fix expand-return CMSE test for Armv8.1-M [PR115253]Torbjörn SVENSSON1-6/+56
For Armv8.1-M, the clearing of the registers is handled differently than for Armv8-M, so update the test case accordingly. gcc/testsuite/ChangeLog: PR target/115253 * gcc.target/arm/cmse/extend-return.c: Update test case condition for Armv8.1-M. Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com> Co-authored-by: Yvan ROUX <yvan.roux@foss.st.com>
2024-06-12arm: Zero/Sign extends for CMSE security on Armv8-M.baseline [PR115253]Torbjörn SVENSSON1-8/+68
Properly handle zero and sign extension for Armv8-M.baseline as Cortex-M23 can have the security extension active. Currently, there is an internal compiler error on Cortex-M23 for the epilog processing of sign extension. This patch addresses the following CVE-2024-0151 for Armv8-M.baseline. gcc/ChangeLog: PR target/115253 * config/arm/arm.cc (cmse_nonsecure_call_inline_register_clear): Sign extend for Thumb1. (thumb1_expand_prologue): Add zero/sign extend. Signed-off-by: Torbjörn SVENSSON <torbjorn.svensson@foss.st.com> Co-authored-by: Yvan ROUX <yvan.roux@foss.st.com>
2024-06-12doc: Update Cygwin web linkGerald Pfeifer1-1/+1
gcc: PR target/69374 * doc/install.texi (Specific) <*-*-cygwin>: Update web link.
2024-06-12Widening-Mul: Take gsi after_labels instead of start_bb for gcall insertionPan Li1-1/+1
We inserted the gcall of .SAT_ADD before the gsi_start_bb for avoiding the ssa def after use ICE issue. Unfortunately, there will be the potential ICE when the first stmt is label. We cannot insert the gcall before the label. Thus, we take gsi_after_labels to locate the 'really' stmt that the gcall will insert before. The existing test cases pr115387-1.c and pr115387-2.c cover this change. The below test suites are passed for this patch. * The rv64gcv fully regression test with newlib. * The x86 regression test. * The x86 bootstrap test. gcc/ChangeLog: * tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children): Leverage gsi_after_labels instead of gsi_start_bb to skip the leading labels of bb. Signed-off-by: Pan Li <pan2.li@intel.com>
2024-06-12doc: Simplify *-*-linux-gnu dependenciesGerald Pfeifer1-3/+0
Glibc 2.1 was released in 1999, binutils 2.12 in 2002; no need to explicitly list them as dependencies any longer. gcc: PR target/69374 * doc/install.texi (Specific) <*-*-linux-gnu>: Do not list glibc 2.1 and binutils 2.12 as minimum dependencies.
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