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2023-10-18Fix ICE due to c_safe_arg_type_equiv_p not checking for error_mark nodeAndrew Pinski2-0/+13
2023-10-19PR111648: Fix wrong code-gen due to incorrect VEC_PERM_EXPR folding.Prathamesh Kulkarni1-11/+103
2023-10-18pru: Implement TARGET_INSN_COSTDimitar Dimitrov1-0/+36
2023-10-18aarch64: Replace duplicated selftestsAndrew Carlotti1-12/+12
2023-10-18cse: Workaround GCC < 5 bug in cse_insn [PR111852]Jakub Jelinek1-0/+7
2023-10-18diagnostic: add permerror variants with optJason Merrill16-40/+117
2023-10-18OpenMP: Avoid ICE with LTO and 'omp allocate'Tobias Burnus2-7/+45
2023-10-18tree-ssa-math-opts: Fix up match_uaddc_usubc [PR111845]Jakub Jelinek3-17/+94
2023-10-18nvptx: Use fatal_error when -march= is missing not an assert [PR111093]Tobias Burnus1-2/+3
2023-10-18Darwin: Check as for .build_version support and use it if available.Iain Sandoe4-2/+79
2023-10-18ifcvt: rewrite args handling to remove lookupsTamar Christina1-42/+88
2023-10-18AArch64: Rewrite simd move immediate patterns to new syntaxTamar Christina1-69/+47
2023-10-18middle-end: ifcvt: Allow any const IFN in conditional blocksTamar Christina1-5/+10
2023-10-18middle-end: Fold vec_cond into conditional ternary or binary operation when s...Tamar Christina2-0/+156
2023-10-18LoongArch: Use fcmp.caf.s instead of movgr2cf for zeroing a fccXi Ruoyao1-1/+1
2023-10-18Re-instantiate integer mask to traditional vector mask supportRichard Biener1-1/+8
2023-10-18middle-end: maintain LCSSA throughout loop peelingTamar Christina4-192/+149
2023-10-18middle-end: updated niters analysis to handle multiple exits.Tamar Christina4-64/+152
2023-10-18middle-end: Refactor vectorizer loop conditionals and separate out IV to new ...Tamar Christina8-93/+190
2023-10-18middle-end: refactor vectorizable_comparison to make the main body re-usable.Tamar Christina1-18/+46
2023-10-18RISC-V: Optimize consecutive permutation index pattern by vrgather.vi/vxJuzhe-Zhong9-0/+465
2023-10-18fortran/intrinsic.texi: Add 'intrinsic' to SIGNAL exampleTobias Burnus1-0/+1
2023-10-18Initial Panther Lake SupportHaochen Jiang12-45/+94
2023-10-18x86: Add m_CORE_HYBRID for hybrid clients tuningHaochen Jiang2-62/+52
2023-10-18Initial Clearwater Forest SupportHaochen Jiang12-3/+47
2023-10-18Support 32/64-bit vectorization for _Float16 fma related operations.liuhongt3-1/+231
2023-10-18RISC-V: Enable more tests for dynamic LMUL and bug fix[PR111832]Juzhe-Zhong2-8/+21
2023-10-18Daily bump.GCC Administrator8-1/+478
2023-10-17aarch64: Put LR save slot first in more casesRichard Sandiford5-9/+9
2023-10-17aarch64: Use vecs to store register save orderRichard Sandiford8-120/+128
2023-10-17Handle epilogues that contain jumpsRichard Sandiford3-30/+70
2023-10-17ssa_name_has_boolean_range vs signed-boolean:31 typesAndrew Pinski4-4/+43
2023-10-17c++: accepts-invalid with =delete("") [PR111840]Marek Polacek2-7/+17
2023-10-17c++: Fix compile-time-hog in cp_fold_immediate_r [PR111660]Marek Polacek3-23/+128
2023-10-17c++: mangling tweaksJason Merrill2-57/+34
2023-10-17c++: Add missing auto_diagnostic_groups to constexpr.ccNathaniel Shead1-0/+9
2023-10-17RISC-V/testsuite/pr111466.c: update test and expected outputVineet Gupta1-2/+2
2023-10-17c: error for function with external and internal linkage [PR111708]Martin Uecker3-0/+84
2023-10-17Fortran: out of bounds access with nested implied-do IO [PR111837]Harald Anlauf2-1/+19
2023-10-17fortran/intrinsic.texi: Improve SIGNAL intrinsic entryTobias Burnus1-10/+16
2023-10-17MATCH: [PR111432] Simplify `a & (x | CST)` to a when we know that (a & ~CST) ...Andrew Pinski2-0/+32
2023-10-17tree-cfg: Add count information when creating new bb in move_sese_region_to_fnAndre Vieira1-0/+3
2023-10-17PR modula2/111756: Re-building all-gcc after source changes fails to linkGaius Mulley13-505/+1382
2023-10-17tree-optimization/111846 - put simd-clone-info into SLP treeRichard Biener4-19/+36
2023-10-17wide-int-print: Don't print large numbers hexadecimally for print_dec{,s,u}Jakub Jelinek4-20/+49
2023-10-17RISC-V: Fix failed testcase when use -cmodel=medanyLehua Ding1-1/+11
2023-10-17middle-end/111818 - failed DECL_NOT_GIMPLE_REG_P setting of volatileRichard Biener2-6/+22
2023-10-17tree-optimization/111807 - ICE in verify_sra_access_forestRichard Biener2-1/+13
2023-10-16expr: don't clear SUBREG_PROMOTED_VAR_P flag for a promoted subreg [target/11...Vineet Gupta2-7/+15
2023-10-17LoongArch: Fix vec_initv32qiv16qi template to avoid ICE.Chenghui Pan2-1/+16