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We (RVV) is going to add a rounding mode operand into floating-point
instructions which have 11 operands.
Since we are going have intrinsic that is adding rounding mode argument:
https://github.com/riscv-non-isa/rvv-intrinsic-doc/pull/226
This is the patch that is adding rounding mode operand in RISC-V port:
https://gcc.gnu.org/pipermail/gcc-patches/2023-May/618573.html
You can see there are 11 operands in these patterns.
gcc/ChangeLog:
* optabs.cc (maybe_gen_insn): Add case to generate instruction
that has 11 operands.
Signed-off-by: Juzhe-Zhong <juzhe.zhong@rivai.ai>
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We are missing cases for combining of FACGE/FACGT instructions. In the testcase of the patch we generate:
foo:
fabs v3.4s, v0.4s
fabs v0.4s, v1.4s
fabs v1.4s, v2.4s
fcmgt v0.4s, v3.4s, v0.4s
fcmgt v1.4s, v3.4s, v1.4s
b g
This is because combine is rejecting the pattern due to costs:
Successfully matched this instruction:
(set (reg:V4SI 106)
(neg:V4SI (lt:V4SI (abs:V4SF (reg:V4SF 113))
(abs:V4SF (reg:V4SF 111)))))
rejecting combination of insns 8, 9 and 10
original costs 8 + 8 + 12 = 28
replacement costs 8 + 28 = 36
It is obviously recursing in the various arms of the RTX and such.
This patch teaches the aarch64 rtx costs routine that our vector comparisons are represented as a NEG of
compare operators, with the FACGE/FAGT operations in particular having ABS on each arm. With this patch we get
the much more reasonable dump:
original costs 8 + 8 + 8 = 24
replacement costs 8 + 8 = 16
and generate the optimal assembly:
foo:
mov v31.16b, v0.16b
facgt v0.4s, v0.4s, v1.4s
facgt v1.4s, v31.4s, v2.4s
b g
Bootstrapped and tested on aarch64-none-linux-gnu.
gcc/ChangeLog:
* config/aarch64/aarch64.cc (aarch64_rtx_costs, NEG case): Add costing
logic for vector modes.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/facg_1.c: New test.
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gcc/ada/
* exp_ch3.adb (Make_Allocator_For_Return): Fix typo in comment.
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String-manipulating functions should always terminate. Add justification
for the termination of Mapping function parameter, and loop variants
where needed. This is needed for GNATprove to prove termination.
gcc/ada/
* libgnat/a-strbou.ads: Add justifications for Mapping.
* libgnat/a-strfix.adb: Same.
* libgnat/a-strfix.ads: Same.
* libgnat/a-strsea.adb: Same.
* libgnat/a-strsea.ads: Same.
* libgnat/a-strsup.adb: Same and add loop variants.
* libgnat/a-strsup.ads: Same and add specification of termination.
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Changes needed to make proof go through, after some change in
GNAT and SPARK.
gcc/ada/
* libgnat/a-strsup.adb (Super_Slice): Reorder component assignment
to avoid failing predicate check related to initialization.
* libgnat/s-expmod.adb (Exp_Modular): Add intermediate assertion.
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GNATprove reports possible non-terminating loops in functions
marked as terminating. Add loop variants to prove loop termination.
gcc/ada/
* libgnat/i-c.adb: Add loop variants. Remove useless
initialization.
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Correction to previous check-in: Remove comment about
Proc_Next_... procedures, which were deleted.
gcc/ada/
* einfo-utils.ads: Remove comment.
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This package was using the Ada 83 renaming idiom for inlining
Next_Component and other Next_... procedures without inlining the
same-named functions. Using the Inline aspect avoids that sort
of horsing around.
We change all the other pragmas Inline in this package to aspects
as well, which is a more-minor improvement. Fix too-long lines
without wrapping lines.
gcc/ada/
* einfo-utils.ads, einfo-utils.adb: Get rid of the Proc_Next_...
procedures. Use Inline aspect instead of pragma Inline.
Is_Discrete_Or_Fixed_Point_Type did not have pragma Inline, but
now has the aspect; this was probably an oversight
(which illustrates why aspects are better).
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gcc/ada/
* doc/gnat_ugn/gnat_utility_programs.rst: Fix formatting
inconsistency.
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Proc_Next_Component_Or_Discriminant was duplicating the code
in Next_Component_Or_Discriminant.
gcc/ada/
* einfo-utils.adb:
(Proc_Next_Component_Or_Discriminant): Call
Next_Component_Or_Discriminant.
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Clarify that "act as scope" overlaps with "[sub]type".
gcc/ada/
* einfo.ads:
(First_Entity): Update comment explaining why this exists on all
[sub]types, as opposed to just the ones with associated entities.
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Fix all the failures caused by enabling Check_Vanishing_Fields on
entities in all cases except the case of converting to or from E_Void.
But leave Check_Vanishing_Fields disabled by default (controlled by
-gnatd_v flag), because it might be too slow even for assertions-on
mode, and we should deal with the E_Void cases eventually.
The failures are fixed either by adding calls to Reinit_Field_To_Zero,
or by changing which entities have which fields.
Note that in a series of Reinit_Field_To_Zero calls, the optional
Old_Ekind parameter is only useful on the first such call.
gcc/ada/
* atree.adb
(Check_Vanishing_Fields): Disable the check for "root/base type
only" fields. This is a bug fix -- if we're checking some subtype
S, we don't want to reach over to the root or base type and
Reinit_Field_To_Zero of that, thus modifying the field for lots of
subtypes other than S. Disable in the to/from E_Void cases. Misc
cleanup.
* gen_il-gen-gen_entities.adb: Define First_Entity, Last_Entity,
and Stored_Constraint for all type entities, because there are too
many cases where Reinit_Field_To_Zero would otherwise be needed.
In any case, it seems cleaner to have First_Entity and Last_Entity
defined in the same entity kinds.
* einfo.ads:
(First_Entity, Last_Entity, Stored_Constraint): Update comments to
reflect gen_il-gen-gen_entities.adb changes.
(Lit_Hash): Add missing "[root type only]" comment.
* exp_ch5.adb: Add Reinit_Field_To_Zero calls for vanishing
fields.
* sem_ch10.adb: Likewise.
* sem_ch6.adb: Likewise.
* sem_ch7.adb: Likewise.
* sem_ch8.adb: Likewise.
* sem_ch3.adb: Likewise. Also remove now-unnecessary
Reinit_Field_To_Zero calls.
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This plugs a small loophole in the procedure responsible for attempting to
hide entities that have been previously made public by the semantic analyzer
in package bodies.
gcc/ada/
* sem_ch7.adb (Hide_Public_Entities): Use the same condition for
subprogram bodies without specification as for those with one.
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Calls to First on No_List intentionally return Empty node, so explicit
guards against No_List are unnecessary. Code cleanup; semantics is
unaffected.
gcc/ada/
* sem_util.adb (New_Copy_Tree): Remove redundant calls to Present.
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gcc/ada/
* sem_ch8.adb (End_Scope): Simplify lookup of predecessor in
homonym chain.
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When inlining subprogram calls in GNATprove mode, the actual parameter
is wrapped in an unchecked conversion. If this actual parameter is an
aggregate OTHERS clause, then the type of unchecked conversion allows us
to resolve this clause (just like for aggregates wrapped in a qualified
expression).
Previously such aggregates were rejected, which caused spurious and
cryptic errors; now they are accepted.
gcc/ada/
* sem_aggr.adb (Resolve_Aggregate): Accept aggregates with OTHERS
appearing inside unchecked conversions.
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Generate a warning if a static predicate tests for a value that
does not belong to the parent subtype. For example, in
subtype S is Positive with Static_Predicate => S not in 0 | 11 | 222;
the 0 is ineffective because Positive already excludes that value.
Generation of this new warning is controlled by the -gnatw_s switch,
which can also be enabled via -gnatwa.
gcc/ada/
* warnsw.ads: Add a new element,
Warn_On_Ineffective_Predicate_Test, to the Opt_Warnings_Enum
enumeration type.
* warnsw.adb: Bind "-gnatw_s" to the new
Warn_On_Ineffective_Predicate_Test switch. Add the new switch to
the set of switches enabled by -gnata .
* sem_ch13.adb
(Build_Discrete_Static_Predicate): Declare new local procedure,
Warn_If_Test_Ineffective, which conditionally generates new
warning. Call this new procedure when building a new element of an
RList.
* doc/gnat_ugn/building_executable_programs_with_gnat.rst:
Document the -gnatw_s switch (and the corresponding -gnatw_S
switch).
* gnat_ugn.texi: Regenerate.
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gcc/ada/
* sem_attr.adb: Update comment referring to rule number.
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Before this patch, the front end failed to catch many illegal uses
of access attributes of task types.
This patch makes referring to the access attributes of a task type
raise an error, except in the current instance case defined in
clause 8.6 of the reference manual.
gcc/ada/
* sem_attr.adb: sem_attr.adb (Analyze_Access_Attribute): Tighten
validity check for task types.
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gcc/ada/
* doc/gnat_rm/implementation_defined_characteristics.rst: Fix
minor documentation formatting issue.
* gnat_rm.texi: Regenerate.
* gnat_ugn.texi: Regenerate.
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The compiler usually turns 2**N into Shift_Left(1,N).
This patch removes the check for "shift amount too big" in the
modular case, because Shift_Left works properly in that case
(i.e. if N is very large, it returns 0).
This removes a redundant check on most hardware; Shift_Left
takes care of large shirt amounts as necessary, even though
most hardware does not.
gcc/ada/
* exp_ch4.adb
(Expand_N_Op_Expon): Remove the too-big check. Simplify. Signed
and modular cases are combined, etc. Remove code with comment "We
only handle cases where the right type is a[sic] integer", because
the right operand must always be an integer at this point.
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We shouldn't raise Bad_Attribute if there is no error.
This patch adds a call to Check_Error_Detected to make sure that's true.
(There are other cases where we raise Bad_Attribute;
this patch doesn't try to fix them all.)
gcc/ada/
* sem_attr.adb
(Analyze_Attribute): Add a call to Check_Error_Detected.
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Pragma Warnings On/Off with a preceding toolname (which could be GNAT
or GNATprove) was ignored due an error in accessing the expression of
a pragma association in the parser. Now fixed.
gcc/ada/
* par-prag.adb (First_Arg_Is_Matching_Tool_Name): Fix access to
expression in pragma association.
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This fixes the output of -gnatRj for an extension of a tagged type which has
a variant part and also deals with the case where the parent type is private
with unknown discriminants.
gcc/ada/
* repinfo.ads (JSON output format): Document special case of
Present member of a Variant object.
* repinfo.adb (List_Structural_Record_Layout): Change the type of
Ext_Level parameter to Integer. Restrict the first recursion with
increasing levels to the fixed part and implement a second
recursion with decreasing levels for the variant part. Deal with
an extension of a type with unknown discriminants.
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Use cut operations to restore the proof of System.Value*.
gcc/ada/
* libgnat/s-valueu.adb: Use cut operations inside assertion to
restore proofs
* gcc-interface/Make-lang.in (GNAT_ADA_OBJS): Add s-spark and
s-spcuop dependencies.
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Pragma Annotate is now allowed between loop pragmas, in order to
be able to justify separate loop checks in GNATprove.
gcc/ada/
* sem_prag.adb (Check_Grouping): Allow Annotate pragmas between
loop pragmas.
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gcc/ada/
* doc/gnat_rm/implementation_defined_pragmas.rst
(Extensions_Allowed): Document string interpolation.
* gnat_rm.texi: Regenerate.
* gnat_ugn.texi: Regenerate.
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This commit updates the Linux-specific chapter to add a new section
documenting the fact that PIE is enabled by default, and provides
some information about the impact that this might have on some
projects, as well as recommendations on how to handle issues.
gcc/ada/
* doc/gnat_ugn/platform_specific_information.rst
(_PIE_Enabled_By_Default_On_Linux): New section.
* gnat-style.texi: Regenerate.
* gnat_ugn.texi: Regenerate.
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gcc/ada/
* exp_disp.adb
(Has_Dispatching_Constructor_Call): New subprogram.
(Expand_Interface_Conversion): No need to perform dynamic
interface conversion when the operand and the target type are
interface types and the target interface type is an ancestor of
the operand type. The unique exception to this rule is when the
operand has a dispatching constructor call (as documented in the
sources).
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Attribute Initialized is expanded into Valid_Scalars, which can't work
on unchecked unions, so Initialized on unchecked unions needs to be
rejected before expansion.
gcc/ada/
* sem_attr.adb (Analyze_Attribute): Reject attribute Initialized
on unchecked unions; fix grammar in comment.
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Before this patch, Set_Can_Use_Internal_Rep was called on access
to subprogram subtypes when instantiating Unchecked_Conversion
from System.Address to an access to subprogram subtype (or the
reverse). This was incorrect and caused an assertion failure.
This patch fixes that by modifying the Can_Use_Internal_Rep
attribute of the base type of the subtype instead.
gcc/ada/
* sem_ch13.adb (Validate_Unchecked_Conversion): Fix behavior on
System.Address to access to subprogram subtype conversion.
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When flag More_Ids is set on a node, then syntactic children will have
their Parent link set to the last node in the chain of Mode_Ids.
For example, parameter associations in declaration like:
procedure P (X, Y : T);
will have More_Ids set for "X", Prev_Ids set on "Y" and both will have
the same node of "T" as their child. However, "T" will have only one
parent, i.e. "Y".
This anomaly was taken into account in New_Copy_Tree, but not in
Copy_Separate_Tree. This was leading to spurious errors in check for
ghost-correctness applied to copied specs.
gcc/ada/
* atree.ads
(Is_Syntactic_Node): Refactored from New_Copy_Tree.
* atree.adb
(Is_Syntactic_Node): Likewise.
(Copy_Separate_Tree): Use Is_Syntactic_Node.
* sem_util.adb
(Has_More_Ids): Move to Atree.
(Is_Syntactic_Node): Likewise.
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This instalment of the series goes through the vector comparison patterns in the backend.
One wart are the int64x1_t comparisons that this patch doesn't touch.
Those are a bit trickier because they have define_insn_and_split mechanisms for falling back to
GP reg comparisons after reload and I don't think a simple annotation will catch those cases correctly.
Those will need more custom thinking.
As said, this patch doesn't touch those and is a decent straightforward improvement on its own.
Bootstrapped and tested on aarch64-none-linux-gnu and aarch64_be-none-elf.
gcc/ChangeLog:
PR target/99195
* config/aarch64/aarch64-simd.md (aarch64_cm<optab><mode>): Rename to...
(aarch64_cm<optab><mode><vczle><vczbe>): ... This.
(aarch64_cmtst<mode>): Rename to...
(aarch64_cmtst<mode><vczle><vczbe>): ... This.
(*aarch64_cmtst_same_<mode>): Rename to...
(*aarch64_cmtst_same_<mode><vczle><vczbe>): ... This.
(*aarch64_cmtstdi): Rename to...
(*aarch64_cmtstdi<vczle><vczbe>): ... This.
(aarch64_fac<optab><mode>): Rename to...
(aarch64_fac<optab><mode><vczle><vczbe>): ... This.
gcc/testsuite/ChangeLog:
PR target/99195
* gcc.target/aarch64/simd/pr99195_7.c: New test.
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Straightforward like previous patches in this series.
Bootstrapped and tested on aarch64-none-linux-gnu and aarch64_be-none-elf.
gcc/ChangeLog:
PR target/99195
* config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>): Rename to...
(aarch64_s<optab><mode><vczle><vczbe>): ... This.
gcc/testsuite/ChangeLog:
PR target/99195
* gcc.target/aarch64/simd/pr99195_4.c: Add testing for qabs, qneg.
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This patch is optimizing the AVL for VLS auto-vectorzation.
Given below sample code:
typedef int8_t vnx2qi __attribute__ ((vector_size (2)));
__attribute__ ((noipa)) void
f_vnx2qi (int8_t a, int8_t b, int8_t *out)
{
vnx2qi v = {a, b};
*(vnx2qi *) out = v;
}
Before this patch:
f_vnx2qi:
vsetvli a5,zero,e8,mf8,ta,ma
vmv.v.x v1,a0
vslide1down.vx v1,v1,a1
vse8.v v1,0(a2)
ret
After this patch:
f_vnx2qi:
vsetivli zero,2,e8,mf8,ta,ma
vmv.v.x v1,a0
vslide1down.vx v1,v1,a1
vse8.v v1,0(a2)
ret
Signed-off-by: Pan Li <pan2.li@intel.com>
Co-authored-by: Juzhe-Zhong <juzhe.zhong@rivai.ai>
Co-authored-by: kito-cheng <kito.cheng@sifive.com>
gcc/ChangeLog:
* config/riscv/riscv-v.cc (const_vlmax_p): New function for
deciding the mode is constant or not.
(set_len_and_policy): Optimize VLS-VLMAX code gen to vsetivli.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/vf_avl-1.c: New test.
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I've put the preparation stmt in the wrong place.
PR tree-optimization/109848
* tree-ssa-forwprop.cc (pass_forwprop::execute): Put the
TARGET_MEM_REF address preparation before the store, not
before the CTOR.
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The following puts the dg-require-effective-target properly after
the dg-do.
* gcc.dg/vect/pr108950.c: Re-order dg-require-effective-target
and dg-do.
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codegen of both VLA && VLS auto-vectorization
This patch optimizes both RVV VLA && VLS vectorization.
Consider this following case:
void __attribute__((noinline, noclone))
f (int * __restrict dst, int * __restrict op1, int * __restrict op2, int
count)
{
for (int i = 0; i < count; ++i)
dst[i] = op1[i] + op2[i];
}
VLA:
Before this patch:
ble a3,zero,.L1
srli a4,a1,2
negw a4,a4
andi a5,a4,3
sext.w a3,a3
beq a5,zero,.L3
lw a7,0(a1)
lw a6,0(a2)
andi a4,a4,2
addw a6,a6,a7
sw a6,0(a0)
beq a4,zero,.L3
lw a7,4(a1)
lw a4,4(a2)
li a6,3
addw a4,a4,a7
sw a4,4(a0)
bne a5,a6,.L3
lw a6,8(a2)
lw a4,8(a1)
addw a4,a4,a6
sw a4,8(a0)
.L3:
subw a3,a3,a5
slli a4,a3,32
csrr a6,vlenb
srli a4,a4,32
srli a6,a6,2
slli a3,a5,2
mv a5,a4
bgtu a4,a6,.L17
.L5:
csrr a6,vlenb
add a1,a1,a3
add a2,a2,a3
add a0,a0,a3
srli a7,a6,2
li a3,0
.L8:
vsetvli zero,a5,e32,m1,ta,ma
vle32.v v1,0(a1)
vle32.v v2,0(a2)
vsetvli t1,zero,e32,m1,ta,ma
add a3,a3,a7
vadd.vv v1,v1,v2
vsetvli zero,a5,e32,m1,ta,ma
vse32.v v1,0(a0)
mv a5,a4
bleu a4,a3,.L6
mv a5,a3
.L6:
sub a5,a4,a5
bleu a5,a7,.L7
mv a5,a7
.L7:
add a1,a1,a6
add a2,a2,a6
add a0,a0,a6
bne a5,zero,.L8
.L1:
ret
.L17:
mv a5,a6
j .L5
After this patch:
f:
ble a3,zero,.L1
csrr a4,vlenb
srli a4,a4,2
mv a5,a3
bgtu a3,a4,.L9
.L3:
csrr a6,vlenb
li a4,0
srli a7,a6,2
.L6:
vsetvli zero,a5,e32,m1,ta,ma
vle32.v v2,0(a1)
vle32.v v1,0(a2)
vsetvli t1,zero,e32,m1,ta,ma
add a4,a4,a7
vadd.vv v1,v1,v2
vsetvli zero,a5,e32,m1,ta,ma
vse32.v v1,0(a0)
mv a5,a3
bleu a3,a4,.L4
mv a5,a4
.L4:
sub a5,a3,a5
bleu a5,a7,.L5
mv a5,a7
.L5:
add a0,a0,a6
add a2,a2,a6
add a1,a1,a6
bne a5,zero,.L6
.L1:
ret
.L9:
mv a5,a4
j .L3
VLS:
Before this patch:
f3:
ble a3,zero,.L1
srli a5,a1,2
negw a5,a5
andi a4,a5,3
sext.w a3,a3
beq a4,zero,.L3
lw a7,0(a1)
lw a6,0(a2)
andi a5,a5,2
addw a6,a6,a7
sw a6,0(a0)
beq a5,zero,.L3
lw a7,4(a1)
lw a5,4(a2)
li a6,3
addw a5,a5,a7
sw a5,4(a0)
bne a4,a6,.L3
lw a6,8(a2)
lw a5,8(a1)
addw a5,a5,a6
sw a5,8(a0)
.L3:
subw a3,a3,a4
slli a6,a4,2
slli a5,a3,32
srli a5,a5,32
add a1,a1,a6
add a2,a2,a6
add a0,a0,a6
li a3,4
.L6:
mv a4,a5
bleu a5,a3,.L5
li a4,4
.L5:
vsetvli zero,a4,e32,m1,ta,ma
vle32.v v1,0(a1)
vle32.v v2,0(a2)
vsetivli zero,4,e32,m1,ta,ma
sub a5,a5,a4
vadd.vv v1,v1,v2
vsetvli zero,a4,e32,m1,ta,ma
vse32.v v1,0(a0)
addi a1,a1,16
addi a2,a2,16
addi a0,a0,16
bne a5,zero,.L6
.L1:
ret
After this patch:
f3:
ble a3,zero,.L1
li a4,4
.L4:
mv a5,a3
bleu a3,a4,.L3
li a5,4
.L3:
vsetvli zero,a5,e32,m1,ta,ma
vle32.v v2,0(a1)
vle32.v v1,0(a2)
vsetivli zero,4,e32,m1,ta,ma
sub a3,a3,a5
vadd.vv v1,v1,v2
vsetvli zero,a5,e32,m1,ta,ma
vse32.v v1,0(a0)
addi a2,a2,16
addi a0,a0,16
addi a1,a1,16
bne a3,zero,.L4
.L1:
ret
Signed-off-by: Juzhe-Zhong <juzhe.zhong@rivai.ai>
gcc/ChangeLog:
* config/riscv/riscv.cc
(riscv_vectorize_preferred_vector_alignment): New function.
(TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): New target hook.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/binop/shift-rv32gcv.c: Adapt testcase.
* gcc.target/riscv/rvv/autovec/align-1.c: New test.
* gcc.target/riscv/rvv/autovec/align-2.c: New test.
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This adds a simple pattern to match.pd for `signbit(x) ? x : -x`
into abs<x>. This can be done for all types even ones that honor
signed zeros and NaNs because both signbit and - are considered
only looking at/touching the sign bit of those types and does
not trap either.
OK? Bootstrapped and tested on x86_64-linux-gnu with no regressions.
PR tree-optimization/109829
gcc/ChangeLog:
* match.pd: Add pattern for `signbit(x) !=/== 0 ? x : -x`.
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/abs-3.c: New test.
* gcc.dg/tree-ssa/abs-4.c: New test.
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Revert my previous change that faked handling of V4HI and V2SImodes
in ix86_widen_mult_cost and rather return arbitrary high value
for unsupported modes. This should prevent cost estimator from
selecting non-existent vector widen multiply operation.
gcc/ChangeLog:
PR target/109807
* config/i386/i386.cc: Revert the 2023-05-11 change.
(ix86_widen_mult_cost): Return high value instead of
ICEing for unsupported modes.
gcc/testsuite/ChangeLog:
PR target/109807
* gcc.target/i386/pr109825.c: New test.
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The small and medium PIC code models generate profiling calls that
always load the address of __fentry__() via the GOT, even if
-mdirect-extern-access is in effect.
This deviates from the behavior with respect to other external
references, and results in a longer opcode that relies on linker
relaxation to eliminate the GOT load. In this particular case, the
transformation replaces an indirect 'CALL *__fentry__@GOTPCREL(%rip)'
with either 'CALL __fentry__; NOP' or 'NOP; CALL __fentry__', where the
NOP is a 1 byte NOP that preserves the 6 byte length of the sequence.
This is problematic for the Linux kernel, which generally relies on
-mdirect-extern-access and hidden visibility to eliminate GOT based
symbol references in code generated with -fpie/-fpic, without having to
depend on linker relaxation.
The Linux kernel relies on code patching to replace these opcodes with
NOPs at runtime, and this is complicated code that we'd prefer not to
complicate even more by adding support for patching both 5 and 6 byte
sequences as well as parsing the instruction stream to decide which
variant of CALL+NOP we are dealing with.
So let's honour -mdirect-extern-access, and only load the address of
__fentry__ via the GOT if direct references to external symbols are not
permitted.
Note that the GOT reference in question is in fact a data reference: we
explicitly load the address of __fentry__ from the GOT, which amounts to
eager binding, rather than emitting a PLT call that could bind eagerly,
lazily or directly at link time.
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
gcc/ChangeLog:
* config/i386/i386.cc (x86_function_profiler): Take
ix86_direct_extern_access into account when generating calls
to __fentry__()
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This patch refactor the pattern A or B or C or D, to the switch case for
easy add/remove new types, as well as human reading friendly.
Before this patch:
return A || B || C || D;
After this patch:
switch (type)
{
case A:
case B:
case C:
case D:
return true;
default:
return false;
}
Signed-off-by: Pan Li <pan2.li@intel.com>
gcc/ChangeLog:
* config/riscv/riscv-vector-builtins.cc (required_extensions_p):
Refactor the or pattern to switch cases.
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gcc/ChangeLog:
* config/aarch64/aarch64.cc (aarch64_expand_vector_init_fallback): Rename
aarch64_expand_vector_init to this, and remove interleaving case.
Recursively call aarch64_expand_vector_init_fallback, instead of
aarch64_expand_vector_init.
(aarch64_unzip_vector_init): New function.
(aarch64_expand_vector_init): Likewise.
gcc/testsuite/ChangeLog:
* gcc.target/aarch64/ldp_stp_16.c (cons2_8_float): Adjust for new
code-gen.
* gcc.target/aarch64/sve/acle/general/dupq_5.c: Likewise.
* gcc.target/aarch64/sve/acle/general/dupq_6.c: Likewise.
* gcc.target/aarch64/interleave-init-1.c: Rename to ...
* gcc.target/aarch64/vec-init-18.c: ... this.
* gcc.target/aarch64/vec-init-19.c: New test.
* gcc.target/aarch64/vec-init-20.c: Likewise.
* gcc.target/aarch64/vec-init-21.c: Likewise.
* gcc.target/aarch64/vec-init-22-size.c: Likewise.
* gcc.target/aarch64/vec-init-22-speed.c: Likewise.
* gcc.target/aarch64/vec-init-22.h: New header.
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It will broken when release mode.
gcc/ChangeLog:
* config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns):
Pull out function call from the gcc_assert.
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Convert vlmul and policy to human readable string, some example below:
Before:
[VALID,Demand field={1(VL),0(DEMAND_NONZERO_AVL),1(SEW),0(DEMAND_GE_SEW),1(LMUL),0(RATIO),0(TAIL_POLICY),0(MASK_POLICY)}
AVL=(reg:DI 0 zero)
SEW=16,VLMUL=3,RATIO=2,TAIL_POLICY=1,MASK_POLICY=1]
^ ^ ^
After:
[VALID,Demand field={1(VL),0(DEMAND_NONZERO_AVL),1(SEW),0(DEMAND_GE_SEW),1(LMUL),0(RATIO),0(TAIL_POLICY),0(MASK_POLICY)}
AVL=(reg:DI 0 zero)
SEW=16,VLMUL=m8,RATIO=2,TAIL_POLICY=agnostic,MASK_POLICY=agnostic]
^^ ^^^^^^^^ ^^^^^^^^
gcc/ChangeLog:
* config/riscv/riscv-vsetvl.cc (vlmul_to_str): New.
(policy_to_str): New.
(vector_insn_info::dump): Use vlmul_to_str and policy_to_str.
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After r14-673-gc0dd80e4c4c3, there was a check in the match
patterns which was checking the type is unsigned but
instead of using the type, the patch used the expression.
This adds the needed TREE_TYPE so get the correct answer and don't ICE.
Committed as obvious after a bootstrap/test on x86_64-linux-gnu.
PR tree-optimization/109834
gcc/ChangeLog:
* match.pd (popcount(bswap(x))->popcount(x)): Fix up unsigned type checking.
(popcount(rotate(x,y))->popcount(x)): Likewise.
gcc/testsuite/ChangeLog:
* gcc.c-torture/compile/pr109834-1.c: New test.
* gcc.dg/tree-ssa/pr109834-1.c: New test.
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PR fortran/109662
gcc/testsuite/ChangeLog:
* gfortran.dg/pr109662-a.f90: Add a section to verify that
a short namelist read does not modify the variable.
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