aboutsummaryrefslogtreecommitdiff
path: root/gcc
AgeCommit message (Expand)AuthorFilesLines
2023-12-08RISC-V: Add vectorized strlen.Robin Dapp5-12/+83
2023-12-08aarch64: Some tweaks to the early-ra passRichard Sandiford2-20/+184
2023-12-08Revert "arm: vld1q_types_x2 ACLE intrinsics"Richard Earnshaw7-247/+0
2023-12-08Revert "arm: vld1q_types_x3 ACLE intrinsics"Richard Earnshaw7-236/+3
2023-12-08Revert "arm: vld1q_types_x4 ACLE intrinsics"Richard Earnshaw7-236/+0
2023-12-08Revert "arm: vst1_types_x2 ACLE intrinsics"Richard Earnshaw7-231/+0
2023-12-08Revert "arm: vst1_types_x3 ACLE intrinsics"Richard Earnshaw7-202/+7
2023-12-08Revert "arm: vst1_types_x4 ACLE intrinsics"Richard Earnshaw7-200/+7
2023-12-08Revert "arm: vst1q_types_x2 ACLE intrinsics"Richard Earnshaw8-232/+3
2023-12-08Revert "arm: vst1q_types_x3 ACLE intrinsics"Richard Earnshaw7-217/+0
2023-12-08Revert "arm: vst1q_types_x4 ACLE intrinsics"Richard Earnshaw7-219/+1
2023-12-08Revert "arm: vld1_types_x2 ACLE intrinsics"Richard Earnshaw7-254/+20
2023-12-08Revert "arm: vld1_types_x3 ACLE intrinsics"Richard Earnshaw7-231/+22
2023-12-08Revert "arm: vld1_types_x4 ACLE intrinsics"Richard Earnshaw7-231/+22
2023-12-08OpenMP/Fortran: Implement omp allocators/allocate for ptr/allocatablesTobias Burnus33-109/+696
2023-12-08tree-optimization/112909 - uninit diagnostic with abnormal copyRichard Biener2-11/+64
2023-12-08Revert "testsuite: require avx_runtime for some tests"Marc Poulhiès3-6/+5
2023-12-08LoongArch: Fix ICE and use simplify_gen_subreg instead of gen_rtx_SUBREG dire...Jiahao Xu3-33/+108
2023-12-08LoongArch: Fix lsx-vshuf.c and lasx-xvshuf_b.c tests fail on LA664 [PR112611]Jiahao Xu2-341/+164
2023-12-08LoongArch: Vectorized loop unrolling is disable for divf/sqrtf/rsqrtf when -m...Jiahao Xu1-2/+34
2023-12-08LoongArch: New options -mrecip and -mrecip= with ffast-math.Jiahao Xu24-10/+711
2023-12-08LoongArch: Redefine pattern for xvfrecip/vfrecip instructions.Jiahao Xu4-8/+32
2023-12-08LoongArch: Use standard pattern name for xvfrsqrt/vfrsqrt instructions.Jiahao Xu7-23/+96
2023-12-08LoongArch: Add support for LoongArch V1.1 approximate instructions.Jiahao Xu18-3/+365
2023-12-08Shrink out-of-SSA dumpRichard Biener1-3/+0
2023-12-08RISC-V: Fix ICE for incorrect mode attr in V_F2DI_CONVERT_BRIDGEPan Li2-1/+8
2023-12-08LoongArch: Add support for xorsign.Jiahao Xu10-8/+260
2023-12-08lower-bitint: Avoid merging non-mergeable stmt with cast and mergeable stmt [...Jakub Jelinek2-5/+30
2023-12-08vr-values: Avoid ICEs on large _BitInt cast to floating point [PR112901]Jakub Jelinek2-0/+19
2023-12-08haifa-sched: Avoid overflows in extend_h_i_d [PR112411]Jakub Jelinek1-1/+1
2023-12-08LoongArch: Remove the definition of ISA_BASE_LA64V110 from the code.Lulu Cheng9-45/+19
2023-12-08LoongArch: Switch loongarch-def from C to C++ to make it possible.Xi Ruoyao8-258/+390
2023-12-08Add IntegerRange for -param=min-nondebug-insn-uid= and fix vector growing in ...Jakub Jelinek3-2/+5
2023-12-08i386: Mark Xeon Phi ISAs as deprecatedHaochen Jiang96-79/+175
2023-12-08RISC-V: Remove redundant check of better_main_loop_than_p in COST modelJuzhe-Zhong1-3/+0
2023-12-08tree-optimization/112774: extend the SCEV CHREC tree with a nonwrapping flagHao Liu8-9/+73
2023-12-07[PATCH 1/5][V3][ifcvt] optimize x=c ? (y op z) : y by RISC-V Zicond like insnsFei Gao2-0/+753
2023-12-07analyzer: fix ICE for 2 bits before the start of base region [PR112889]David Malcolm2-5/+22
2023-12-08Daily bump.GCC Administrator6-1/+1064
2023-12-08RISC-V: Support interleave vector with different step sequenceJuzhe-Zhong6-12/+211
2023-12-07aarch64: Add an early RA for strided registersRichard Sandiford23-60/+4113
2023-12-07arm: vld1_types_x4 ACLE intrinsicsEzra Sitorus7-22/+231
2023-12-07arm: vld1_types_x3 ACLE intrinsicsEzra Sitorus7-22/+231
2023-12-07arm: vld1_types_x2 ACLE intrinsicsEzra Sitorus7-20/+254
2023-12-07arm: vst1q_types_x4 ACLE intrinsicsEzra Sitorus7-1/+219
2023-12-07arm: vst1q_types_x3 ACLE intrinsicsEzra Sitorus7-0/+217
2023-12-07arm: vst1q_types_x2 ACLE intrinsicsEzra Sitorus8-3/+232
2023-12-07arm: vst1_types_x4 ACLE intrinsicsEzra Sitorus7-7/+200
2023-12-07arm: vst1_types_x3 ACLE intrinsicsEzra Sitorus7-7/+202
2023-12-07arm: vst1_types_x2 ACLE intrinsicsEzra Sitorus7-0/+231