aboutsummaryrefslogtreecommitdiff
path: root/gcc
AgeCommit message (Collapse)AuthorFilesLines
2020-10-22[Ada] Ada_2020: ongoing work for aggregates for bounded containersEd Schonberg2-95/+176
gcc/ada/ * sem_aggr.adb: (Resolve_Container_Aggregate): For an indexed container, verify that expressions and component associations are not both present. * exp_aggr.adb: Code reorganization, additional comments. (Expand_Container_Aggregate): Use Aggregate_Size for Iterated_ Component_Associations for indexed aggregates. If present, the default value of the formal in the constructor function is used when the size of the aggregate cannot be determined statically.
2020-10-22[Ada] Fix oversight in Eval_Attribute for Bit_PositionEric Botcazou1-1/+1
gcc/ada/ * sem_attr.adb (Eval_Attribute): Fix oversight for Bit_Position.
2020-10-22[Ada] AI12-0307: uniform resolution rules for aggregatesEd Schonberg4-1/+37
gcc/ada/ * sem_util.ads, sem_util.adb (Check_Ambiguous_Aggregate): When a subprogram call is found to be ambiguous, check whether ambiguity is caused by an aggregate actual. and indicate that it should carry a type qualification. * sem_ch4.adb (Traverse_Hoonyms, Try_Primitive_Operation): Call it. * sem_res.adb (Report_Ambiguous_Argument): Call it.
2020-10-22[Ada] Cleanup repeated code in checks for unused WITH clausesPiotr Trojanek1-51/+43
gcc/ada/ * sem_warn.adb (Check_One_Unit): Avoid repeated calls by using a local variable Lunit; remove local constant Eitem, which was identical to Lunit.
2020-10-22use wraplf for low-precision elementary functions on x86*-vxworks tooAlexandre Oliva1-0/+3
The earlier patch that introduced the wraplf variants missed the x86*-vxworks* ports. This fixes them. for gcc/ada/ChangeLog * Makefile.rtl (LIBGNAT_TARGET_PAIRS) <x86*-vxworks*>: Select nolibm and wraplf variants like other vxworks ports.
2020-10-22enable sincos optimization on mingw-w64Alexandre Oliva1-0/+6
The sincos transformation does not take place on all platforms, because the libc_has_function target hook disables it by default. Current mingw-w64's math library supports sincos, sincosl and sincosf, in 32- and 64-bit modes. I suppose this has been this way for long. This patch enables the sincos optimization on this platform. for gcc/ChangeLog * config/i386/mingw-w64.h (TARGET_LIBC_HAS_FUNCTION): Enable sincos optimization.
2020-10-22c++: Handle RANGE_EXPR index in init_subob_ctx [PR97328]Patrick Palka3-2/+39
In the testcase below, we're ICEing during constexpr evaluation of the CONSTRUCTOR {.data={{}, [1 ... 7]={}}} of type 'vector'. The interesting thing about this CONSTRUCTOR is that it has a RANGE_EXPR index for an element initializer which doesn't satisfy reduced_constant_expression_p (because the field 't' is uninitialized). This is a problem because init_subob_ctx currently punts on setting up a sub-aggregate initialization context when given a RANGE_EXPR index, so we later trip over the asserts in verify_ctor_sanity when recursing into cxx_eval_bare_aggregate on this element initializer. Fix this by making init_subob_ctx set up an appropriate initialization context when supplied a RANGE_EXPR index. gcc/cp/ChangeLog: PR c++/97328 * constexpr.c (init_subob_ctx): Don't punt on RANGE_EXPR indexes, instead build a sub-aggregate initialization context with no subobject. gcc/testsuite/ChangeLog: PR c++/97328 * g++.dg/cpp2a/constexpr-init19.C: New test. * g++.dg/cpp2a/constexpr-init20.C: New test.
2020-10-22c++: constexpr evaluation and bare EMPTY_CLASS_EXPR [PR96575]Patrick Palka2-8/+25
In the testcase below, folding of the initializer for 'ret' inside the instantiated f<lambda>::lambda ends up yielding an initializer for which potential_constant_expression returns false. This causes finish_function to mark the lambda as non-constexpr, which ultimately causes us to reject 'f(g)' as a call to a non-constexpr function. The initializer for 'ret' inside f<lambda>::lambda, prior to folding, is the CALL_EXPR <lambda(S)>::operator() (&cb, ({}, <<< Unknown tree: empty_class_expr >>>;)) where the second argument is a COMPOUND_EXPR whose second operand is an EMPTY_CLASS_EXPR that was formed by build_class_a. cp_fully_fold_init is able to only partially fold this initializer: it gets rid of the side-effectless COMPOUND_EXPR to obtain <lambda(S)>::operator() (&cb, <<< Unknown tree: empty_class_expr >>>) as the final initializer for 'ret'. This initializer no longer satifies potential_constant_expression due to the bare EMPTY_CLASS_EXPR which is not wrapped in a COMPOUND_EXPR. (cp_fully_fold_init first tries maybe_constant_value on the original CALL_EXPR, but constexpr evaluation punts upon seeing __builtin_is_constant_evaluated, since manifestly_const_eval is false.) To fix this, it seems we could either make cp_fold preserve the COMPOUND_EXPR trees produced by build_call_a, or we could improve the constexpr machinery to treat EMPTY_CLASS_EXPR trees as first-class citizens. Assuming it's safe to continue folding away these COMPOUND_EXPRs, the second approach seems cleaner, so this patch implements the second approach. gcc/cp/ChangeLog: PR c++/96575 * constexpr.c (cxx_eval_constant_expression) <case EMPTY_CLASS_EXPR>: Lower it to a CONSTRUCTOR. (potential_constant_expression_1) <case COMPOUND_EXPR>: Remove now-redundant handling of COMPOUND_EXPR with EMPTY_CLASS_EXPR second operand. <case EMPTY_CLASS_EXPR>: Return true instead of false. gcc/testsuite/ChangeLog: PR c++/96575 * g++.dg/cpp1z/constexpr-96575.C: New test.
2020-10-22c++: Check DECL_TEMPLATE_PARM_P in duplicate_decls [PR97511]Patrick Palka2-0/+7
This makes duplicate_decls differentiate a TYPE_DECL for an alias template from a TYPE_DECL for one of its template parameters. The recently added assert in template_parm_to_arg revealed this latent issue because merging of the two TYPE_DECLs cleared the DECL_TEMPLATE_PARM_P flag. With this patch, we now also correctly diagnose the name shadowing in the below testcase (as required by [temp.local]/6). gcc/cp/ChangeLog: PR c++/97511 * decl.c (duplicate_decls): Return NULL_TREE if DECL_TEMPLATE_PARM_P differ. gcc/testsuite/ChangeLog: PR c++/97511 * g++.dg/template/shadow3.C: New test.
2020-10-22[RS6000] VSX_MM_SUFFIXAlan Modra1-3/+3
gcc.target/powerpc/vsx_mask-count-runnable.c and others Assembler messages: Error: unrecognized opcode: `vcntmb<VSX_MM_SUFFIX>' * config/rs6000/vsx.md (vec_cntmb_<mode>, vec_extract_<mode>), (vec_expand_<mode>): Replace <VSX_MM_SUFFIX> with <wd>.
2020-10-22Refactor vect_analyze_slp_instance a bitRichard Biener1-47/+38
In preparation for a larger change this refactors vect_analyze_slp_instance so it doesn't need to know a vector type early. 2020-10-22 Richard Biener <rguenther@suse.de> * tree-vect-slp.c (vect_analyze_slp_instance): Refactor so computing a vector type early is not needed, for store group splitting compute a new vector type based on the desired group size.
2020-10-22middle-end/97521 - fix VECTOR_CST expansionRichard Biener2-1/+31
This fixes expansion of VECTOR_BOOLEAN_TYPE_P VECTOR_CSTs which when using an integer mode are not always "mask-mode" but may be using an integer mode when there's no supported vector mode. The patch makes sure to only go the mask-mode expansion if the elements do not line up to cover the full integer mode (when they do and the mode was an actual mask-mode there's no actual difference in both expansions). 2020-10-22 Richard Biener <rguenther@suse.de> PR middle-end/97521 * expr.c (expand_expr_real_1): Be more careful when expanding a VECTOR_BOOLEAN_TYPE_P VECTOR_CSTs. * gcc.target/i386/pr97521.c: New testcase.
2020-10-22ipa-modref-tree.c: fix selftest leaksDavid Malcolm1-0/+5
"make selftest-valgrind" was reporting: 40 bytes in 1 blocks are definitely lost in loss record 25 of 735 at 0x483AE7D: operator new(unsigned long) (vg_replace_malloc.c:344) by 0xFA0CEA: selftest::test_insert_search_collapse() (ipa-modref-tree.c:40) by 0xFA2F9B: selftest::ipa_modref_tree_c_tests() (ipa-modref-tree.c:164) by 0x256E3AB: selftest::run_tests() (selftest-run-tests.c:93) by 0x1366A8B: toplev::run_self_tests() (toplev.c:2385) by 0x1366C47: toplev::main(int, char**) (toplev.c:2467) by 0x263203F: main (main.c:39) 40 bytes in 1 blocks are definitely lost in loss record 26 of 735 at 0x483AE7D: operator new(unsigned long) (vg_replace_malloc.c:344) by 0xFA264A: selftest::test_merge() (ipa-modref-tree.c:123) by 0xFA2FA0: selftest::ipa_modref_tree_c_tests() (ipa-modref-tree.c:165) by 0x256E3AB: selftest::run_tests() (selftest-run-tests.c:93) by 0x1366A8B: toplev::run_self_tests() (toplev.c:2385) by 0x1366C47: toplev::main(int, char**) (toplev.c:2467) by 0x263203F: main (main.c:39) 40 bytes in 1 blocks are definitely lost in loss record 27 of 735 at 0x483AE7D: operator new(unsigned long) (vg_replace_malloc.c:344) by 0xFA279E: selftest::test_merge() (ipa-modref-tree.c:130) by 0xFA2FA0: selftest::ipa_modref_tree_c_tests() (ipa-modref-tree.c:165) by 0x256E3AB: selftest::run_tests() (selftest-run-tests.c:93) by 0x1366A8B: toplev::run_self_tests() (toplev.c:2385) by 0x1366C47: toplev::main(int, char**) (toplev.c:2467) by 0x263203F: main (main.c:39) With this patch, the output is clean. gcc/ChangeLog: * ipa-modref-tree.c (selftest::test_insert_search_collapse): Fix leak. (selftest::test_merge): Fix leaks.
2020-10-22Fix PR97502Andreas Krebbel2-1/+38
The S/390 backend does not define vec_cmp expanders so far. We relied solely on expanding vcond. With commit 502d63b6d various testcases started to ICE now. This patch just adds the missing expanders to prevent the ICE. However, there are still a couple of performance-related testcase regressions with the vcond lowering which have to be fixed independently. gcc/ChangeLog: PR target/97502 * config/s390/vector.md ("vec_cmp<VI_HW:mode><VI_HW:mode>") ("vec_cmpu<VI_HW:mode><VI_HW:mode>"): New expanders. gcc/testsuite/ChangeLog: * gcc.dg/pr97502.c: New test.
2020-10-22Fix PR97439Andreas Krebbel2-0/+29
decimal_real_maxval misses to set the sign flag in the REAL_VALUE_TYPE. gcc/ChangeLog: PR rtl-optimization/97439 * dfp.c (decimal_real_maxval): Set the sign flag in the generated number. gcc/testsuite/ChangeLog: * gcc.dg/dfp/pr97439.c: New test.
2020-10-22analyzer: fix ICE when handling callback exceeds enode limit [PR97514]David Malcolm2-2/+21
gcc/analyzer/ChangeLog: PR analyzer/97514 * engine.cc (exploded_graph::add_function_entry): Handle failure to create an enode, rather than asserting. gcc/testsuite/ChangeLog: PR analyzer/97514 * gcc.dg/analyzer/pr97514.c: New test.
2020-10-22analyzer: add some C++ test coverageDavid Malcolm3-0/+61
gcc/testsuite/ChangeLog: * g++.dg/analyzer/ctor-dtor-1.C: New test. * g++.dg/analyzer/dyncast-1.C: New test. * g++.dg/analyzer/vfunc-1.C: New test.
2020-10-22analyzer: fix ICE on dtor [PR97489]David Malcolm2-0/+11
gcc/analyzer/ChangeLog: PR analyzer/97489 * engine.cc (exploded_graph::add_function_entry): Assert that we have a function body. (exploded_graph::on_escaped_function): Reject fndecls that don't have a function body. gcc/testsuite/ChangeLog: PR analyzer/97489 * g++.dg/analyzer/pr97489.C: New test.
2020-10-22Daily bump.GCC Administrator7-1/+1113
2020-10-22Implement no_stack_protector attribute.Martin Liska7-41/+154
gcc/ChangeLog: 2020-05-18 Martin Liska <mliska@suse.cz> PR c/94722 * cfgexpand.c (stack_protect_decl_phase): Guard with lookup_attribute("no_stack_protector") at various places. (expand_used_vars): Likewise here. * doc/extend.texi: Document no_stack_protector attribute. gcc/ada/ChangeLog: 2020-05-18 Martin Liska <mliska@suse.cz> PR c/94722 * gcc-interface/utils.c (handle_no_stack_protect_attribute): New. (handle_stack_protect_attribute): Add error message for a no_stack_protector function. gcc/c-family/ChangeLog: 2020-05-18 Martin Liska <mliska@suse.cz> PR c/94722 * c-attribs.c (handle_no_stack_protect_function_attribute): New. (handle_stack_protect_attribute): Add error message for a no_stack_protector function. gcc/testsuite/ChangeLog: 2020-05-18 Martin Liska <mliska@suse.cz> PR c/94722 * g++.dg/no-stack-protector-attr-2.C: New test. * g++.dg/no-stack-protector-attr-3.C: New test. * g++.dg/no-stack-protector-attr.C: New test.
2020-10-22Come up with stack_protector enum.Martin Liska4-12/+13
gcc/ChangeLog: 2020-05-15 Martin Liska <mliska@suse.cz> * cfgexpand.c: Move the enum to ... * coretypes.h (enum stack_protector): ... here. * function.c (assign_parm_adjust_stack_rtl): Use the stack_protector enum. gcc/c-family/ChangeLog: 2020-05-15 Martin Liska <mliska@suse.cz> * c-cppbuiltin.c (c_cpp_builtins): Use the stack_protector enum.
2020-10-22RISC-V: Extend syntax for the multilib-generatorKito Cheng1-7/+102
- Support expansion operator (*) in the multilib config string. - Motivation of this patch is reduce the complexity when we deal multilib with sub-extension, expand the combinations by hand would be very painful and error prone, no one deserve to experience this[1] again! [1] https://github.com/sifive/freedom-tools/blob/f4d7facafb27d16125768c90ff1790c674e4be7a/Makefile#L348 gcc/ChangeLog: * config/riscv/multilib-generator: Add TODO, import itertools and functools.reduce. Handle expantion operator. (LONG_EXT_PREFIXES): New. (arch_canonicalize): Update comment and improve python3 debuggability/compatibility. (add_underline_prefix): New. (_expand_combination): Ditto. (unique): Ditto. (expand_combination): Ditto.
2020-10-22phiopt: Optimize x ? __builtin_clz (x) : 32 in GIMPLE fallout [PR97503]Jakub Jelinek1-8/+8
> this broke sparc-sun-solaris2.11 bootstrap > > /vol/gcc/src/hg/master/local/gcc/tree-ssa-phiopt.c: In function 'bool cond_removal_in_popcount_clz_ctz_pattern(basic_block, basic_block, edge, edge, gimple*, tree, tree)': > /vol/gcc/src/hg/master/local/gcc/tree-ssa-phiopt.c:1858:27: error: variable 'mode' set but not used [-Werror=unused-but-set-variable] > 1858 | scalar_int_mode mode = SCALAR_INT_TYPE_MODE (TREE_TYPE (arg)); > | ^~~~ > > > and doubtlessly several other targets that use the defaults.h definition of > > #define CTZ_DEFINED_VALUE_AT_ZERO(MODE, VALUE) 0 Ugh, seems many of those macros do not evaluate the first argument. This got broken by the change to direct_internal_fn_supported_p, previously it used mode also in the optab test. 2020-10-22 Jakub Jelinek <jakub@redhat.com> * tree-ssa-phiopt.c (cond_removal_in_popcount_clz_ctz_pattern): For CLZ and CTZ tests, use type temporary instead of mode.
2020-10-22x86: Allow configuring with --with-arch_64=x86-64-v[234]Jakub Jelinek1-2/+15
> + {"x86-64", PROCESSOR_K8, CPU_K8, PTA_X86_64_BASELINE, 0, P_NONE}, > + {"x86-64-v2", PROCESSOR_K8, CPU_GENERIC, PTA_X86_64_V2 | PTA_NO_TUNE, > + 0, P_NONE}, > + {"x86-64-v3", PROCESSOR_K8, CPU_GENERIC, PTA_X86_64_V3 | PTA_NO_TUNE, > + 0, P_NONE}, > + {"x86-64-v4", PROCESSOR_K8, CPU_GENERIC, PTA_X86_64_V4 | PTA_NO_TUNE, > + 0, P_NONE}, > {"eden-x2", PROCESSOR_K8, CPU_K8, > PTA_64BIT | PTA_MMX | PTA_SSE | PTA_SSE2 | PTA_SSE3 | PTA_FXSR, > 0, P_NONE}, I have noticed that one can't configure gcc to default to these. I've also found various other 32-bit or 64-bit -march= arguments for which it wasn't possible to configure gcc to default to those. The x86-64-v* the patch only allows in --with-arch_64=, because otherwise it fails build miserably - as ./xgcc -B ./ -S -march=x86-64-v2 -m32 test.c cc1: error: ‘x86-64-v2’ architecture level is only defined for the x86-64 psABI when building 32-bit multilibs. Even if multilibs are disallowed, I think the compiler still supports -m32 and so --with-arch_64= seems to be the only option in which we can support that. 2020-10-22 Jakub Jelinek <jakub@redhat.com> * config.gcc (x86_archs): Add samuel-2, nehemiah, c7 and esther. (x86_64_archs): Add eden-x2, nano, nano-1000, nano-2000, nano-3000, nano-x2, eden-x4, nano-x4, x86-64-v2, x86-64-v3 and x86-64-v4. (i[34567]86-*-* | x86_64-*-*): Only allow x86-64-v* as argument to --with-arch_64=.
2020-10-22Use Aux_Long_Float for all real types on LynxOSAlexandre Oliva1-0/+3
Its libc does not offer *f or *l elementary functions, so rely on the C double ones only. for gcc/ada/ChangeLog * Makefile.rtl (LIBGNAT_TARGET_PAIRS) <lynxos178>: Rely on Aux_Long_Float for all real types.
2020-10-22vxworks float EFs not precise enough -> use long floatAlexandre Oliva3-0/+182
Some acats-4 tests that check the precision of Float elementary functions fail with vxworks 7.2's implementations of single-precision math functions. This patch arranges for us to bypass the single-precision functions, and use the Aux_Long_Float implementation, based on the double-typed calls from the C library, for Float and Short_Float. for gcc/ada/ChangeLog * Makefile.rtl (LIBGNAT_TARGET_PAIRS): Use Long Float-based variant of Aux_Short_Float and Aux_Float on vxworks targets. * libgnat/a-nashfl__wraplf.ads: New. * libgnat/a-nuaufl__wraplf.ads: New.
2020-10-22Use Aux_Long_Long_Float wraplf for sparc*-sun-solaris tooRainer Orth1-0/+1
Like aarch64-* and ppc*-linux-gnu, sparc*-sun-solaris has Long_Long_Float mapped to double rather than long double, so the intrinsics in the default version of a-nallfl.ads have mismatching types. Adopt the wraplf workaround for it as well. for gcc/ada/ChangeLog * Makefile.rtl (LIBGNAT_TARGET_PAIRS) <sparc*-sun-solaris>: Use wraplf version of a-nallfl.
2020-10-22aarch64-* and ppc*-linux-gnu long long float/long double mismatchAlexandre Oliva2-0/+93
Some platforms have failed to build because long long float is mapped to double rather than long double, and then the attempts to import intrinsics for long double in Aux_Long_Long_Float raise warnings turned into errors. This patch is a work around for the mismatch, arranging for Aux_Long_Long_Float to map to Aux_Long_Float. for gcc/ada/ChangeLog * Makefile.rtl (LIBGNAT_TARGET_PAIRS): Use a-nallfl__wraplf.ads on aarch64-* and ppc*-linux-gnu targets. * libgnat/a-nallfl__wraplf.ads: New.
2020-10-21syscall: only compile ptrace varargs shim on LinuxNikhil Benesch1-1/+1
Only compile the __go_ptrace varargs shim on Linux to avoid compilation failures on some other platforms. The C ptrace function is not entirely portable (e.g., NetBSD has `int data` instead of `void* data`), and so far Linux is the only platform that needs the varargs shim. Additionally, make the types in the ptrace and raw_ptrace function declarations match. This makes it more clear that the only difference between the two is that calls via the former are allowed to block while calls via the latter are not. Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/263517
2020-10-22Free stale summaries in ipa-pure-constJan Hubicka1-0/+3
* ipa-pure-const.c (funct_state_summary_t::insert): Free stale summaries.
2020-10-22Move nested function info out of cgraph_nodeJan Hubicka11-89/+213
this patch moves nested function information out of symbol table (to a summary). This saves memory (especially at WPA time) and also makes nested function support more contained. gcc/ChangeLog: 2020-10-22 Jan Hubicka <hubicka@ucw.cz> * cgraph.c: Include tree-nested.h (cgraph_node::create): Call maybe_record_nested_function. (cgraph_node::remove): Do not remove function from nested function infos. (cgraph_node::dump): Update. (cgraph_node::unnest): Move to tree-nested.c (cgraph_node::verify_node): Update. (cgraph_c_finalize): Call nested_function_info::release. * cgraph.h (struct symtab_node): Remove nested function info. * cgraphclones.c (cgraph_node::create_clone): Do not clone nested function info. * cgraphunit.c (cgraph_node::analyze): Update. (cgraph_node::expand): Do not worry about nested functions; they are lowered. (symbol_table::finalize_compilation_unit): Call nested_function_info::release. * gimplify.c: Include tree-nested.h (unshare_body): Update. (unvisit_body): Update. * omp-offload.c (omp_discover_implicit_declare_target): Update. * tree-nested.c: Include alloc-pool.h, tree-nested.h, symbol-summary.h (nested_function_sum): New static variable. (nested_function_info::get): New member function. (nested_function_info::get_create): New member function. (unnest_function): New function. (nested_function_info::~nested_function_info): New member function. (nested_function_info::release): New function. (maybe_record_nested_function): New function. (lookup_element_for_decl): Update. (check_for_nested_with_variably_modified): Update. (create_nesting_tree): Update. (unnest_nesting_tree_1): Update. (gimplify_all_functions): Update. (lower_nested_functions): Update. * tree-nested.h (class nested_function_info): New class. (maybe_record_nested_function): Declare. (unnest_function): Declare. (first_nested_function): New inline function. (next_nested_function): New inline function. (nested_function_origin): New inline function. gcc/ada/ChangeLog: 2020-10-22 Jan Hubicka <hubicka@ucw.cz> * gcc-interface/trans.c: Include tree-nested.h (walk_nesting_tree): Update for new nested function info. gcc/c-family/ChangeLog: 2020-10-22 Jan Hubicka <hubicka@ucw.cz> * c-gimplify.c: Include tree-nested.h (c_genericize): Update for new nested function info. gcc/d/ChangeLog: 2020-10-22 Jan Hubicka <hubicka@ucw.cz> * decl.cc: Include tree-nested.h (get_symbol_decl): Update for new nested function info.
2020-10-22Simplify vec_select of a subreg of X to just a vec_select of X.liuhongt2-0/+71
gcc/ChangeLog PR rtl-optimization/97249 * simplify-rtx.c (simplify_binary_operation_1): Simplify vec_select of a subreg of X to a vec_select of X. gcc/testsuite/ChangeLog * gcc.target/i386/pr97249-1.c: New test.
2020-10-22Refactor implementation of *_bcst{_1,_2,_3} patterns.liuhongt7-336/+102
Add new predicate bcst_mem_operand and corresponding constraint "Br" to merge "$(pattern)_bcst{_1,_2,_3}" into "$(pattern)", also delete those separate "*_bcst{_1,_2,_3}" patterns. gcc/ChangeLog: PR target/87767 * config/i386/constraints.md ("Br"): New special memory constraint. * config/i386/i386-expand.c (ix86_binary_operator_ok): Both source operand cannot be in memory or bcst_memory_operand. * config/i386/i386.c (ix86_print_operand): Print bcst_mem_operand. * config/i386/i386.h (VALID_BCST_MODE_P): New. * config/i386/predicates.md (bcst_mem_operand): New predicate for AVX512 embedding broadcast memory operand. (bcst_vector_operand): New predicate, vector_operand or bcst_mem_operand. * config/i386/sse.md (*<plusminus_insn><mode>3<mask_name><round_name>): Extend predicate and constraints to handle bcst_mem_operand. (*mul<mode>3<mask_name><round_name>): Ditto. (<sse>_div<mode>3<mask_name><round_name>): Ditto. (<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>): Ditto. (<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>): Ditto. (<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>): Ditto. (<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>): Ditto. (*<plusminus_insn><mode>3): Ditto. (avx512dq_mul<mode>3<mask_name>): Ditto. (*<sse4_1_avx2>_mul<mode>3<mask_name>): Ditto. (*andnot<mode>3): Ditto. (<mask_codefor><code><mode>3<mask_name>): Ditto. (*sub<mode>3<mask_name>_bcst): Removed. (*add<mode>3<mask_name>_bcst): Ditto. (*mul<mode>3<mask_name>_bcst): Ditto. (*<avx512>_div<mode>3<mask_name>_bcst): Ditto. (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_1): Ditto. (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_2): Ditto. (*<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name>_bcst_3): Ditto. (*<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_1): Ditto. (*<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_2): Ditto. (*<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name>_bcst_3): Ditto. (*<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_1): Ditto. (*<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_2): Ditto. (*<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name>_bcst_3): Ditto. (*<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_1): Ditto. (*<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_2): Ditto. (*<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name>_bcst_3): Ditto. (*sub<mode>3_bcst): Ditto. (*add<mode>3_bcst): Ditto. (*avx512dq_mul<mode>3<mask_name>_bcst): Ditto. (*avx512f_mul<mode>3<mask_name>_bcst): Ditto. (*andnot<mode>3_bcst): Ditto. (*<code><mode>3_bcst): Ditto. * config/i386/subst.md (bcst_round_constraint): New subst attribute. (bcst_round_nimm_predicate): Ditto. (bcst_mask_prefix3): Ditto. (bcst_mask_prefix4): Ditto.
2020-10-22Extend special_memory_constraint.liuhongt5-13/+37
For operand with special_memory_constraint, there could be a wrapper for memory_operand. Extract mem for operand for conditional judgement like MEM_P, also for record_address_regs. gcc/ChangeLog: PR target/87767 * ira-costs.c (record_operand_costs): Extract memory operand from recog_data.operand[i] for record_address_regs. (record_reg_classes): Extract memory operand from OP for conditional judgement MEM_P. * ira.c (ira_setup_alts): Ditto. * lra-constraints.c (extract_mem_from_operand): New function. (satisfies_memory_constraint_p): Extract memory operand from OP for decompose_mem_address, return false when there's no memory operand inside OP. (process_alt_operands): Remove MEM_P (op) since it would be judged in satisfies_memory_constraint_p. * recog.c (asm_operand_ok): Extract memory operand from OP for judgement of memory_operand (OP, VOIDmode). (constrain_operands): Don't unwrapper unary operator when there's memory operand inside. * rtl.h (extract_mem_from_operand): New decl.
2020-10-22arm: Auto-vectorization for MVE: vmin/vmaxDennis Zhang5-34/+121
This patch enables MVE vmin/vmax instructions for auto-vectorization. MVE target is included in expander smin<mode>3, umin<mode>3, smax<mode>3 and umax<mode>3 for vectorization. Related insns for vmin/vmax in mve.md are modified to use smin, umin, smax and umax expressions instead of unspec to support the expanders. gcc/ChangeLog: 2020-10-22 Dennis Zhang <dennis.zhang@arm.com> * config/arm/mve.md (mve_vmaxq_<supf><mode>): Replace with ... (mve_vmaxq_s<mode>, mve_vmaxq_u<mode>): ... these new insns to use smax/umax instead of VMAXQ. (mve_vminq_<supf><mode>): Replace with ... (mve_vminq_s<mode>, mve_vminq_u<mode>): ... these new insns to use smin/umin instead of VMINQ. (mve_vmaxnmq_f<mode>): Use smax instead of VMAXNMQ_F. (mve_vminnmq_f<mode>): Use smin instead of VMINNMQ_F. * config/arm/vec-common.md (smin<mode>3): Use the new mode macros ARM_HAVE_<MODE>_ARITH. (umin<mode>3, smax<mode>3, umax<mode>3): Likewise. gcc/testsuite/ChangeLog: * gcc.target/arm/simd/mve-vminmax_1.c: New test.
2020-10-21Handle a_2= &b properly in range calculations.Andrew MacLeod2-9/+34
when processing assignments, we were using the type of b instead of type of &b when computing a range. This was usually filtered out by FRE. turning it off exposed it. gcc/ PR tree-optimization/97520 * gimple-range.cc (range_of_non_trivial_assignment): Handle x = &a by returning a non-zero range. gcc/testsuite/ * gcc.dg/pr97520.c: New.
2020-10-22arm: Auto-vectorization for MVE: vmulDennis Zhang6-22/+95
This patch enables MVE vmul instructions for auto-vectorization. It includes MVE in expander mul<mode>3 to enable vectorization for MVE. Related MVE vmul insns are modified to support the expander by using expression 'mult' instead of unspec. The mul<mode>3 for vectorization in vec-common.md uses mode iterator VDQWH instead of VALLW to cover all supported modes. The macros ARM_HAVE_NEON_<MODE>_ARITH are used to select supported modes for different targets. The redundant mul<mode>3 in neon.md is removed. gcc/ChangeLog: 2020-10-22 Dennis Zhang <dennis.zhang@arm.com> * config/arm/mve.md (mve_vmulq<mode>): New entry for vmul instruction using expression 'mult'. (mve_vmulq_f<mode>): Use mult instead of VMULQ_F. * config/arm/neon.md (mul<mode>3): Removed. * config/arm/vec-common.md (mul<mode>3): Use the new mode macros ARM_HAVE_<MODE>_ARITH. Use mode iterator VDQWH instead of VALLW. gcc/testsuite/ChangeLog: * gcc.target/arm/simd/mve-vmul_1.c: New test.
2020-10-21Check for undefined before not returning a constant valueAndrew MacLeod2-4/+40
Don't return UNDEFINED for a range in an unreachable block if the global value evaluates to a constant. Return that constant instead. PR tree-optimization/97515 * value-query.cc (range_query::value_of_expr): If the result is UNDEFINED, check to see if the global value is a constant. (range_query::value_on_edge): Ditto.
2020-10-21syscall: import upstream code for BSD sockets and sysctlsNikhil Benesch1-1/+1
Import some missing upstream code for BSD sockets and sysctls and adapt it for gccgo. Updates golang/go#38538. Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/261137
2020-10-22Strenghten bound for bulitin_constant_p hint.Jan Hubicka1-24/+47
this patch makes builtin_constant_p hint to combine with other loop hints we already support. gcc/ChangeLog: 2020-10-22 Jan Hubicka <hubicka@ucw.cz> PR ipa/97445 * ipa-inline.c (inline_insns_single): Add hint2 parameter. (inline_insns_auto): Add hint2 parameter. (can_inline_edge_by_limits_p): Update. (want_inline_small_function_p): Update. (wrapper_heuristics_may_apply): Update.
2020-10-21testsuite: Enable p9-lxvx-stxvx testcases and fold-vec-extractDavid Edelsohn6-11/+15
This patch enables the p9-lxvx-stxvx testcases with appropriate requirements. It also adjusts the expected matching instructions in the fold-vec-extract testcases for BE. gcc/testsuite/ChangeLog: * gcc.target/powerpc/fold-vec-extract-float.p9.c: rldicl and subfic only for target LE. * gcc.target/powerpc/fold-vec-extract-longlong.p9.c: xori only for target LE. Adjust mfvsrd and add mfvsrld for BE. * gcc.target/powerpc/fold-vec-extract-short.p9.c: vextuhrx for LE. vextuhlx for BE. * gcc.target/powerpc/p9-lxvx-stxvx-1.c: Remove target. * gcc.target/powerpc/p9-lxvx-stxvx-2.c: Remove target. * gcc.target/powerpc/p9-lxvx-stxvx-3.c: Remove target. Require float128
2020-10-21rs6000: MMA type causes an ICE in ranger pass due to incompatible typesRichard Biener2-4/+20
PR97360 shows a problem in how we create our PXI and POI modes that cause an ICE in the ranger pass. The problem seems to be that the extra call to build_distinct_type_copy() also creates new TYPE_{MIN,MAX}_VALUEs that are not compatible/the same as the base type itself. The simple "fix" is to actually remove the unneeded build_distinct_type_copy(), since according to richi, the types returned from make_unsigned_type() are already distinct. gcc/ 2020-10-21 Richard Biener <rguenther@suse.de> PR target/97360 * config/rs6000/rs6000-call.c (rs6000_init_builtins): Remove call to build_distinct_type_copy(). gcc/testsuite/ 2020-10-21 Martin Liska <mliska@suse.cz> PR target/97360 * gcc.target/powerpc/pr97360.c: New test. Co-authored-by: Andrew MacLeod <amacleod@redhat.com> Co-authored-by: Martin Liska <mliska@suse.cz>
2020-10-21Inline functions with builtin_constant_p more agressively.Jan Hubicka4-5/+117
This patch implements heuristics that increases inline limits (by the hints mechanism) for inline functions that use builtin_constant_p on parameter. Those are very likely intended to be always inlined and simplify after inlining. The PR is about a function that we used to inline with --param inline-insns-single=200 but with new default of 70 for -O2 we no longer do so. Hints are currently configured to bump the bound up twice, so we get limit of 140 that is still not enough to inline the particular testcase but it should help in general. I can implement a stronger bump if that seems useful (maybe it is). The example is bit operation written as a decision chain with 64 conditions. This blows up the limit on number of conditions we track per funtion (which is 30) and thus the size/time estimates are not working that well. gcc/ChangeLog: PR ipa/97445 * ipa-fnsummary.c (ipa_dump_hints): Add INLINE_HINT_builtin_constant_p. (ipa_fn_summary::~ipa_fn_summary): Free builtin_constant_p_parms. (ipa_fn_summary_t::duplicate): Duplicate builtin_constant_p_parms. (ipa_dump_fn_summary): Dump builtin_constant_p_parms. (add_builtin_constant_p_parm): New function (set_cond_stmt_execution_predicate): Update builtin_constant_p_parms. (ipa_call_context::estimate_size_and_time): Set INLINE_HINT_builtin_constant_p.. (ipa_merge_fn_summary_after_inlining): Merge builtin_constant_p_parms. (inline_read_section): Read builtin_constant_p_parms. (ipa_fn_summary_write): Write builtin_constant_p_parms. * ipa-fnsummary.h (enum ipa_hints_vals): Add INLINE_HINT_builtin_constant_p. * ipa-inline.c (want_inline_small_function_p): Use INLINE_HINT_builtin_constant_p. (edge_badness): Use INLINE_HINT_builtin_constant_p. gcc/testsuite/ChangeLog: PR ipa/97445 * gcc.dg/ipa/inlinehint-5.c: New test.
2020-10-21Remove interfering default #undefs from vx-common.hDouglas Rupp1-2/+0
undef'ing LIB_SPEC and especially LINK_SPEC here is unneccesary and inteferes with the definition of LINK_SPEC for the bi-arch'd ppc*-vx7r2 target which uses the linux64 LINK_SPEC 2020-10-21 Douglas Rupp <rupp@adacore.com> gcc/ * config/vx-common.h (LINK_SPEC, LIB_SPEC): Remove #undef.
2020-10-21Introduce vxworks7r2 support for ppc and ppc64Douglas Rupp2-81/+173
This change introduces support for the most recent versions of VxWorks on PowerPC targets, for both 32 and 64 bit thanks to a bi-arch setup. The system compilers are essentially configured as Linux toolchains with only a few specificities and we replicate that model here. The most visible specificities are the use of secureplt by default, the pre-definition of some macros that the system headers still rely on (_VX_CPU and _VX_CPU_FAMILY, for example), and of course some variations related to the so VxWorks typical kernel vs RTP mode distinction. In addition to the introduction of config.gcc and libgcc configuration chunks, much inspired by the linux ones, the change - Reworks rs6000/vxworks.h file to feature bits common to the Vx6 and Vx7 port then a separate section for each, where the Vx7 part is very short as we rely on the Linux definitions for most things. - Adjusts the CPU macro predefinitions in CPP_SPEC to resort to "_VX_CPU" instead of "CPU" for Vx7, to better match the more recent system headers expectations, - Adds a cpu definition case for e6500. - Changes to the use SUB3TARGET_OVERRIDE_OPTIONS instead of SUBSUBTARGET_OVERRIDE_OPTIONS for specifics, so we don't override the Linux's version of the latter for vx7. 2020-10-20 Douglas Rupp <rupp@adacore.com> gcc/ * config.gcc (powerpc*-wrs-vxworks7r*): New case. * config/rs6000/vxworks.h: Rework to handle VxWorks7. Refactor as common bits + vx6 vs vx7 ones. For the latter, rely essentially on the Linux configuration and adjust CPU to _VX_CPU in CPP_SPEC. Add a case for e6500. Use SUB3TARGET_OVERRIDE_OPTIONS for specifics to preserve the Linux SUBSUBTARGET_OVERRIDE_OPTIONS for vx7. libgcc/ * config.host (powerpc*-wrs-vxworks7*): New case. * configure.ac: Handle powerpc*-*-vxworks7* as powerpc*-*-linux* for ppc-fp_type. * configure: Regenerate. Co-authored-by: Olivier Hainque <hainque@adacore.com>
2020-10-21testsuite: enable and fix swaps-p8 testcasesDavid Edelsohn60-67/+95
This patch enables swaps-p8 and a few other testcases on non-powerpc64le systems. It also cleans up the target requirements for various testcases. gcc/testsuite/ChangeLog: * gcc.target/powerpc/p9-extract-1.c: Require lp64. * gcc.target/powerpc/p9-extract-2.c: Require lp64. * gcc.target/powerpc/p9-extract-3.c: Require lp64. * gcc.target/powerpc/p9-permute.c: Remove target. * gcc.target/powerpc/pr63335.c: Remove target. * gcc.target/powerpc/pr87507.c: Remove target. * gcc.target/powerpc/swaps-p8-1.c: Require LE and P8. * gcc.target/powerpc/swaps-p8-10.c: Remove target. Require P8. * gcc.target/powerpc/swaps-p8-11.c: Remove target. Require P8. * gcc.target/powerpc/swaps-p8-12.c: Require LE and P8. * gcc.target/powerpc/swaps-p8-13.c: Remove target. Require P8. * gcc.target/powerpc/swaps-p8-14.c: Remove target. Require P8. * gcc.target/powerpc/swaps-p8-15.c: Remove target. Require P8. * gcc.target/powerpc/swaps-p8-16.c: Remove target. Require P8. * gcc.target/powerpc/swaps-p8-17.c: Require P8. * gcc.target/powerpc/swaps-p8-18.c: Remove target. Require P8. * gcc.target/powerpc/swaps-p8-19.c: Remove target. Require P8. * gcc.target/powerpc/swaps-p8-2.c: Require LE and P8. * gcc.target/powerpc/swaps-p8-20.c: Remove target. * gcc.target/powerpc/swaps-p8-21.c: Remove target. Require Altivec. * gcc.target/powerpc/swaps-p8-22.c: Remove target. Require P8. * gcc.target/powerpc/swaps-p8-23.c: Require LE and P8. * gcc.target/powerpc/swaps-p8-24.c: Remove target. Require P8. * gcc.target/powerpc/swaps-p8-25.c: Require LE and P8. * gcc.target/powerpc/swaps-p8-26.c: Remove target. Require P8. * gcc.target/powerpc/swaps-p8-27.c: Remove target. Require P8. * gcc.target/powerpc/swaps-p8-28.c: Remove target. * gcc.target/powerpc/swaps-p8-29.c: Remove target. * gcc.target/powerpc/swaps-p8-3.c: Require LE and P8. * gcc.target/powerpc/swaps-p8-30.c: Remove target. * gcc.target/powerpc/swaps-p8-31.c: Remove target. * gcc.target/powerpc/swaps-p8-32.c: Remove target. * gcc.target/powerpc/swaps-p8-33.c: Remove target. * gcc.target/powerpc/swaps-p8-34.c: Remove target. * gcc.target/powerpc/swaps-p8-35.c: Remove target. * gcc.target/powerpc/swaps-p8-36.c: Remove target. * gcc.target/powerpc/swaps-p8-37.c: Remove target. * gcc.target/powerpc/swaps-p8-38.c: Remove target. * gcc.target/powerpc/swaps-p8-39.c: Remove target. * gcc.target/powerpc/swaps-p8-4.c: Require LE and P8. * gcc.target/powerpc/swaps-p8-40.c: Remove target. * gcc.target/powerpc/swaps-p8-41.c: Remove target. * gcc.target/powerpc/swaps-p8-42.c: Remove target. * gcc.target/powerpc/swaps-p8-43.c: Remove target. * gcc.target/powerpc/swaps-p8-44.c: Remove target. * gcc.target/powerpc/swaps-p8-45.c: Remove target. * gcc.target/powerpc/swaps-p8-46.c: Require LE. * gcc.target/powerpc/swaps-p8-5.c: Require LE and P8. * gcc.target/powerpc/swaps-p8-6.c: Remove target. Require P8. * gcc.target/powerpc/swaps-p8-7.c: Remove target. Require P8. * gcc.target/powerpc/swaps-p8-8.c: Remove target. Require P8. * gcc.target/powerpc/swaps-p8-9.c: Remove target. Require P8. * gcc.target/powerpc/vec-cmp.c: Require LP64. * gcc.target/powerpc/vec-cmpne.c: Remove target. * gcc.target/powerpc/vec-mul.c: Remove target. * gcc.target/powerpc/vec-set-char.c: Require LP64. * gcc.target/powerpc/vec-set-int.c: Require LP64. * gcc.target/powerpc/vec-set-short.c: Require LP64. * gcc.target/powerpc/vec-xxpermdi.c: Remove target. Require VSX. * gcc.target/powerpc/vsxcopy.c: Remove target. Require VSX.
2020-10-21Fortran: class.c - update vtable commentTobias Burnus1-0/+2
gcc/fortran/ PR fortran/45516 * class.c: Add _deallocate to the vtable documentation comment.
2020-10-21tree-optimization/97500 - avoid SLP backedges for inductionsRichard Biener2-0/+41
Inductions are not vectorized as cycle but materialized from SCEV data. Filling in backedge SLP nodes confuses this process. 2020-10-21 Richard Biener <rguenther@suse.de> PR tree-optimization/97500 * tree-vect-slp.c (vect_analyze_slp_backedges): Do not fill backedges for inductions. * gfortran.dg/pr97500.f90: New testcase.
2020-10-21Simplify trivial VEC_COND_EXPR in expander.liuhongt2-0/+26
gcc/ChangeLog: PR target/97506 * config/i386/i386-expand.c (ix86_expand_sse_movcc): Move op_true to dest directly when op_true equals op_false. gcc/testsuite/ChangeLog: PR target/97506 * gcc.target/i386/pr97506.c: New test.
2020-10-21phiopt: Optimize x ? __builtin_clz (x) : 32 in GIMPLE [PR97503]Jakub Jelinek2-24/+95
While we have at the RTL level noce_try_ifelse_collapse combined with simplify_cond_clz_ctz, that optimization doesn't always trigger because e.g. on powerpc there is an define_insn to compare a reg against zero and copy that register to another one and so we end up with a different pseudo in the simplify_cond_clz_ctz test and punt. For targets that define C?Z_DEFINED_VALUE_AT_ZERO to 2 for certain modes, we can optimize it already in phiopt though, just need to ensure that we transform the __builtin_c?z* calls into .C?Z ifns because my recent VRP changes codified that the builtin calls are always undefined at zero, while ifns honor C?Z_DEFINED_VALUE_AT_ZERO equal to 2. And, in phiopt we already have popcount handling that does pretty much the same thing, except for always using a zero value rather than the one set by C?Z_DEFINED_VALUE_AT_ZERO. So, this patch extends that function to handle not just popcount, but also clz and ctz. 2020-10-21 Jakub Jelinek <jakub@redhat.com> PR tree-optimization/97503 * tree-ssa-phiopt.c: Include internal-fn.h. (cond_removal_in_popcount_pattern): Rename to ... (cond_removal_in_popcount_clz_ctz_pattern): ... this. Handle not just popcount, but also clz and ctz if it has C?Z_DEFINED_VALUE_AT_ZERO 2. * gcc.dg/tree-ssa/pr97503.c: New test.
generated by cgit v1.1 at 2025-04-14 01:45:53 +0000