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2023-01-04rs6000: Raise error for __vector_{quad,pair} uses without MMA enabled [PR106736]Kewen Lin8-2/+140
As PR106736 shows, it's unexpected to use __vector_quad and __vector_pair types without MMA support, it would cause ICE when expanding the corresponding assignment. We can't guard these built-in types registering under MMA support as Peter pointed out in that PR, because the registering is global, it doesn't work for target pragma/attribute support with MMA enabled. The existing verify_type_context mentioned in [2] can help to make the diagnostics invalid built-in type uses better, but as Richard pointed out in [4], it can't deal with all cases. As the discussions in [1][3], this patch is to check the invalid use of built-in types __vector_quad and __vector_pair in mov pattern of OOmode and XOmode, on the currently being expanded gimple assignment statement. It still puts an assertion in else arm rather than just makes it go through, it's to ensure we can catch any other possible unexpected cases in time if there are. [1] https://gcc.gnu.org/pipermail/gcc/2022-December/240218.html [2] https://gcc.gnu.org/pipermail/gcc/2022-December/240220.html [3] https://gcc.gnu.org/pipermail/gcc/2022-December/240223.html [4] https://gcc.gnu.org/pipermail/gcc-patches/2022-December/608083.html PR target/106736 gcc/ChangeLog: * config/rs6000/mma.md (define_expand movoo): Call function rs6000_opaque_type_invalid_use_p to check and emit error message for the invalid use of opaque type. (define_expand movxo): Likewise. * config/rs6000/rs6000-protos.h (rs6000_opaque_type_invalid_use_p): New function declaration. (currently_expanding_gimple_stmt): New extern declaration. * config/rs6000/rs6000.c (rs6000_opaque_type_invalid_use_p): New function. gcc/testsuite/ChangeLog: * gcc.target/powerpc/pr106736-1.c: New test. * gcc.target/powerpc/pr106736-2.c: Likewise. * gcc.target/powerpc/pr106736-3.c: Likewise. * gcc.target/powerpc/pr106736-4.c: Likewise. * gcc.target/powerpc/pr106736-5.c: Likewise.
2023-01-05Daily bump.GCC Administrator1-1/+1
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2022-12-31Daily bump.GCC Administrator1-1/+1
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2022-12-24Skip guality tests on hppa-hpux.John David Anglin3-0/+12
The guality check command hangs. This causes TCL errors in other tests and slows testsuite execution. 2022-11-13 John David Anglin <danglin@gcc.gnu.org> gcc/testsuite/ChangeLog: * g++.dg/guality/guality.exp: Skip on hppa*-*-hpux*. * gcc.dg/guality/guality.exp: Likewise. * gfortran.dg/guality/guality.exp: Likewise.
2022-12-24Daily bump.GCC Administrator1-1/+1
2022-12-23Daily bump.GCC Administrator2-1/+22
2022-12-22lto: support --jobserver-style=fifo for recent GNU makeMartin Liska2-2/+17
gcc/ChangeLog: * opts-jobserver.h: Add one member. * opts-common.c (jobserver_info::jobserver_info): Parse FIFO format of --jobserver-auth. (cherry picked from commit 53e3b2bf16a486c15c20991c6095f7be09012b55)
2022-12-22Factor out jobserver_active_p.Martin Liska4-61/+114
gcc/ChangeLog: * gcc.c (driver::detect_jobserver): Remove and move to jobserver.h. * lto-wrapper.c (jobserver_active_p): Likewise. (run_gcc): Likewise. * opts-jobserver.h: New file. * opts-common.c (jobserver_info::jobserver_info): New function. (cherry picked from commit 1270ccda70ca09f7d4fe76b5156dca8992bd77a6)
2022-12-22Daily bump.GCC Administrator1-1/+1
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2022-12-18Fortran: ICE on recursive derived types with allocatable components [PR107872]Paul Thomas2-1/+42
gcc/fortran/ChangeLog: PR fortran/107872 * resolve.c (derived_inaccessible): Skip over allocatable components to prevent an infinite loop. gcc/testsuite/ChangeLog: PR fortran/107872 * gfortran.dg/pr107872.f90: New test. (cherry picked from commit 01254aa2eb766c7584fd047568d7277d4d65d067)
2022-12-18Daily bump.GCC Administrator1-1/+1
2022-12-17Daily bump.GCC Administrator3-1/+25
2022-12-16c++: quadratic constexpr behavior for left-assoc logical exprs [PR102780]Patrick Palka2-5/+50
In the testcase below the two left fold expressions each expand into a constant logical expression with 1024 terms, for which potential_const_expr takes more than a minute to return true. This happens because p_c_e_1 performs trial evaluation of the first operand of a &&/|| in order to determine whether to consider the potentiality of the second operand. And because the expanded expression is left-associated, this trial evaluation causes p_c_e_1 to be quadratic in the number of terms of the expression. This patch fixes this quadratic behavior by making p_c_e_1 preemptively compute potentiality of the second operand of a &&/||, and perform trial evaluation of the first operand only if the second operand isn't potentially constant. We must be careful to avoid emitting bogus diagnostics during the preemptive computation; to that end, we perform this shortcut only when tf_error is cleared, and when tf_error is set we now first check potentiality of the whole expression quietly and replay the check noisily for diagnostics. Apart from fixing the quadraticness for left-associated logical exprs, this change also reduces compile time for the libstdc++ testcase 20_util/variant/87619.cc by about 15% even though our <variant> uses right folds instead of left folds. Likewise for the testcase in the PR, for which compile time is reduced by 30%. The reason for these speedups is that p_c_e_1 no longer performs expensive trial evaluation of each term of large constant logical expressions when determining their potentiality. PR c++/102780 PR c++/108138 gcc/cp/ChangeLog: * constexpr.c (potential_constant_expression_1) <case TRUTH_*_EXPR>: When tf_error isn't set, preemptively check potentiality of the second operand before performing trial evaluation of the first operand. (potential_constant_expression_1): When tf_error is set, first check potentiality quietly and return true if successful, otherwise proceed noisily to give errors. gcc/testsuite/ChangeLog: * g++.dg/cpp1z/fold13.C: New test. (cherry picked from commit 9927ecbb42d5be48fa933adc26f8601fab5007ca)
2022-12-16Daily bump.GCC Administrator3-1/+19
2022-12-15AArch64: Add UNSPECV_PATCHABLE_AREA [PR98776]Sebastian Pop6-17/+70
Currently patchable area is at the wrong place on AArch64. It is placed immediately after function label, before .cfi_startproc. This patch adds UNSPECV_PATCHABLE_AREA for pseudo patchable area instruction and modifies aarch64_print_patchable_function_entry to avoid placing patchable area before .cfi_startproc. gcc/ PR target/98776 * config/aarch64/aarch64-protos.h (aarch64_output_patchable_area): Declared. * config/aarch64/aarch64.c (aarch64_print_patchable_function_entry): Emit an UNSPECV_PATCHABLE_AREA pseudo instruction. (aarch64_output_patchable_area): New. * config/aarch64/aarch64.md (UNSPECV_PATCHABLE_AREA): New. (patchable_area): Define. gcc/testsuite/ PR target/98776 * gcc.target/aarch64/pr98776.c: New. * gcc.target/aarch64/pr92424-2.c: Adjust pattern. * gcc.target/aarch64/pr92424-3.c: Adjust pattern.
2022-12-15Daily bump.GCC Administrator1-1/+1
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2022-12-11d: Fix internal compiler error: in visit, at d/imports.cc:72 (PR108050)Iain Buclaw6-2/+34
The visitor for lowering IMPORTED_DECLs did not have an override for dealing with importing OverloadSet symbols. This has now been implemented in the code generator. PR d/108050 gcc/d/ChangeLog: * decl.cc (DeclVisitor::visit (Import *)): Handle build_import_decl returning a TREE_LIST. * imports.cc (ImportVisitor::visit (OverloadSet *)): New override. gcc/testsuite/ChangeLog: * gdc.dg/imports/pr108050/mod1.d: New. * gdc.dg/imports/pr108050/mod2.d: New. * gdc.dg/imports/pr108050/package.d: New. * gdc.dg/pr108050.d: New test. (cherry picked from commit d9d8c9674ad3ad3aa38419d24b1aaaffe31f5d3f)
2022-12-11Daily bump.GCC Administrator1-1/+1
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2022-12-01Fix unrecognizable insn due to illegal immediate_operand (const_int 255) of ↵liuhongt2-1/+9
QImode. For __builtin_ia32_vec_set_v16qi (a, -1, 2) with !flag_signed_char. it's transformed to __builtin_ia32_vec_set_v16qi (_4, 255, 2) in the gimple, and expanded to (const_int 255) in the rtl. But for immediate_operand, it expects (const_int 255) to be signed extended to (const_int -1). The mismatch caused an unrecognizable insn error. The patch converts (const_int 255) to (const_int -1) in the backend expander. gcc/ChangeLog: PR target/107863 * config/i386/i386-expand.c (ix86_expand_vec_set_builtin): Convert op1 to target mode whenever mode mismatch. gcc/testsuite/ChangeLog: * gcc.target/i386/pr107863.c: New test.
2022-12-01Daily bump.GCC Administrator4-1/+27
2022-11-30d: Fix ICE on named continue label in an unrolled loop [PR107592]Iain Buclaw2-2/+37
Continue labels in an unrolled loop require a unique label per iteration. Previously this used the Statement body node for each unrolled iteration to generate a new entry in the label hash table. This does not work when the continue label has an identifier, as said named label is pointing to the outer UnrolledLoopStatement node. What would happen is that during the lowering of `continue label', an automatic label associated with the unrolled loop would be generated, and a jump to that label inserted, but because it was never pushed by the visitor for the loop itself, it subsequently never gets emitted. To fix, correctly use the UnrolledLoopStatement as the key to look up and store the break/continue label pair, but remove the continue label from the value entry after every loop to force a new label to be generated by the next call to `push_continue_label' PR d/107592 gcc/d/ChangeLog: * toir.cc (IRVisitor::push_unrolled_continue_label): New method. (IRVisitor::pop_unrolled_continue_label): New method. (IRVisitor::visit (UnrolledLoopStatement *)): Use them instead of push_continue_label and pop_continue_label. gcc/testsuite/ChangeLog: * gdc.dg/pr107592.d: New test. (cherry picked from commit 031d3f095520f0e1ee03e29b7ad5067c2a3f96e0)
2022-11-30Fix addvdi3 and subvdi3 patternsJohn David Anglin1-18/+22
While most PA 2.0 instructions support both 32 and 64-bit traps and conditions, the addi and subi instructions only support 32-bit traps and conditions. Thus, we need to force immediate operands to register operands on the 64-bit target and use the add/sub instructions which can trap on 64-bit signed overflow. 2022-11-30 John David Anglin <danglin@gcc.gnu.org> gcc/ChangeLog: * config/pa/pa.md (addvdi3): Force operand 2 to a register. Remove "addi,tsv,*" instruction from unamed pattern. (subvdi3): Force operand 1 to a register. Remove "subi,tsv" instruction from from unamed pattern.
2022-11-30Daily bump.GCC Administrator2-1/+10
2022-11-28gcc: fix PR rtl-optimization/107482Max Filippov1-2/+2
gcc/ PR rtl-optimization/107482 * ira-color.c (assign_hard_reg): Only call update_costs_from_copies when retry_p is false. (cherry picked from commit e581490f0cfa80c58d2b648d71a44a597fbe3008)
2022-11-29Daily bump.GCC Administrator1-1/+1
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