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2022-10-24analyzer: handle (NULL == &VAR) [PR107345]David Malcolm2-3/+29
2022-10-24analyzer: simplify sm_state_map lookupDavid Malcolm3-92/+48
2022-10-24analyzer: handle "pipe" and "pipe2" [PR106300]David Malcolm11-9/+420
2022-10-24tree: add build_string_literal overloadsJason Merrill6-38/+21
2022-10-24x86: fix VENDOR_MAX enum valueMartin Liska1-1/+3
2022-10-24c++: ICE with invalid structured bindings [PR107276]Marek Polacek3-2/+15
2022-10-24c, c++: Fix up excess precision handling of scalar_to_vector conversion [PR10...Jakub Jelinek4-5/+38
2022-10-24[AArch64] Improve immediate expansion [PR106583]Wilco Dijkstra2-225/+301
2022-10-24c++: Fix up constexpr handling of char/signed char/short pre/post inc/decreme...Jakub Jelinek2-0/+27
2022-10-24c-family: Implicitly return zero from main even on freestandingArsen Arsenović9-18/+41
2022-10-24[PR tree-optimization/107355] Handle NANs in abs range-op entry.Aldy Hernandez2-0/+22
2022-10-24OpenMP: Fix reverse offload GOMP_TARGET_REV IFN corner cases [PR107236]Tobias Burnus3-7/+24
2022-10-24RISC-V: Support --target-help for -mcpu/-mtuneKito Cheng3-10/+80
2022-10-24Check HONOR_NANS instead of flag_finite_math_only in frange:verify_range.Aldy Hernandez1-8/+25
2022-10-24lto: Always quote path to touchTorbjörn SVENSSON1-2/+2
2022-10-24RISC-V: Support (set (mem) (const_poly_int))Ju-Zhe Zhong1-0/+12
2022-10-24RISC-V: Replace CONSTEXPR with constexprJu-Zhe Zhong4-11/+11
2022-10-24RISC-V: Remove unused TI/TF vector modes.Ju-Zhe Zhong1-4/+0
2022-10-24RISC-V: Fix REG_CLASS_CONTENTS.Ju-Zhe Zhong1-1/+1
2022-10-24Daily bump.GCC Administrator1-1/+1
2022-10-23Daily bump.GCC Administrator2-1/+24
2022-10-22Fix uninitialized variable warnings.Michael Eager1-5/+14
2022-10-22Update selftest such that [-Inf, +Inf] is always VARYING for -ffinite-math-only.Aldy Hernandez1-2/+5
2022-10-22xtensa: Make register A0 allocable for the CALL0 ABITakayuki 'January June' Suwa1-4/+10
2022-10-22Daily bump.GCC Administrator5-1/+469
2022-10-21Fortran: Add missing TKR initialization to class variables [PR100097, PR100098]José Rui Faustino de Sousa5-1/+139
2022-10-21i386: Fix up BFmode comparisons in conditional moves [PR107322]Jakub Jelinek2-0/+70
2022-10-21c++: Don't shortcut TREE_CONSTANT vector type CONSTRUCTORs in cxx_eval_consta...Jakub Jelinek2-8/+25
2022-10-21Merge branch 'master' into devel/sphinxMartin Liska206-1267/+10893
2022-10-21Enable AMD znver4 support and add instruction reservationsTejas Joshi17-70/+1035
2022-10-21Add 'gcc.dg/tree-ssa/pr107195-3.c' [PR107195]Thomas Schwinge1-0/+112
2022-10-21tree-optimization/107323 - loop distribution partition ordering issueRichard Biener2-14/+64
2022-10-21RISC-V: Add type attribute for atomic instructions.Monk Chiang2-6/+11
2022-10-21match.pd: Fix up gcc.dg/pr54346.c on i686-linux [PR54346]Jakub Jelinek2-2/+11
2022-10-21c++: Fix up mangling ICE with void{} [PR106863]Jakub Jelinek2-1/+24
2022-10-21RISC-V: Add RVV vsetvl/vsetvlmax intrinsics and tests.Ju-Zhe Zhong13-2/+1300
2022-10-21RISC-V: Add RVV intrinsic basic framework.Ju-Zhe Zhong6-81/+1065
2022-10-21i386: Auto vectorize sdot_prod, udot_prod with VNNIINT8 instruction.Haochen Jiang3-11/+153
2022-10-21Support Intel AVX-VNNI-INT8Kong Lingling34-34/+758
2022-10-21Support Intel AVX-IFMAHongyu Wang43-82/+563
2022-10-21Daily bump.GCC Administrator6-1/+297
2022-10-20Fortran: error recovery with references of bad array constructors [PR105633]Harald Anlauf2-3/+15
2022-10-20[PR c++/106654] Handle non-irange ranges in get_range_global for default defs.Aldy Hernandez1-1/+1
2022-10-20Add op[12]_range for UNORDERED_LT entries in range-op.Aldy Hernandez1-0/+64
2022-10-20testsuite: Sanitize fails for SP FPU on ArmTorbjörn SVENSSON28-64/+345
2022-10-20c++: constraint matching, TEMPLATE_ID_EXPR, current instPatrick Palka2-6/+32
2022-10-20ipa-visibility: Optimize TLS access [PR99619]Artem Klimov9-1/+145
2022-10-20A false UNORDERED_<cond> means neither operand can be a NAN.Aldy Hernandez1-10/+41
2022-10-20c++ modules: handle CONCEPT_DECL in node_template_info [PR102963]Patrick Palka3-0/+15
2022-10-20vect: Fix vectype when widening container type in bitfield pattern [PR107326]Andre Vieira3-4/+72
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