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2016-12-02Makefile.in (PREPROCESSOR_DEFINES): Add a level of indirection for several ↵Tadek Kijkowski4-4/+62
include directories that may be relative... * Makefile.in (PREPROCESSOR_DEFINES): Add a level of indirection for several include directories that may be relative to sysroot. * config/i386/x-mingw32 (gplus_includedir): Define. (gplus_tool_includedir, gplus_backward_include_dir): Likewise. (native_system_includedir): Likewise. * config/i386/mingw32.h (STANDARD_STARTFILE_PREFIX_1): Do not override if TARGET_SYSTEM_ROOT is defined. (NATIVE_SYSTEM_HEADER_DIR): Likewise. From-SVN: r243196
2016-12-02re PR target/70322 (STV doesn't optimize andn)Jakub Jelinek7-3/+83
PR target/70322 * config/i386/i386.c (dimode_scalar_to_vector_candidate_p): Handle NOT. (dimode_scalar_chain::compute_convert_gain): Likewise. (dimode_scalar_chain::convert_insn): Likewise. * config/i386/i386.md (*one_cmpldi2_doubleword): New define_insn_and_split. (one_cmpl<mode>2): Use SWIM1248x iterator instead of SWIM. * gcc.target/i386/pr70322-1.c: New test. * gcc.target/i386/pr70322-2.c: New test. * gcc.target/i386/pr70322-3.c: New test. From-SVN: r243195
2016-12-02re PR target/78614 (ICE error: invalid rtl sharing found in the insn ↵Jakub Jelinek5-14/+35
(verify_rtx_sharing) gcc/emit-rtl.c:2743) PR target/78614 * rtl.c (copy_rtx): Don't clear used flag here. (shallow_copy_rtx_stat): Clear used flag here unless code the rtx is shareable. * simplify-rtx.c (simplify_replace_fn_rtx): When copying rtx with 'E' in format, copy all vectors. * emit-rtl.c (copy_insn_1): Don't clear used flag here. * valtrack.c (cleanup_auto_inc_dec): Likewise. * config/rs6000/rs6000.c (rs6000_frame_related): Likewise. From-SVN: r243194
2016-12-02Added support for ARMV8-M Security Extension cmse_nonsecure_caller intrinsicAndre Vieira6-0/+82
gcc/ChangeLog: 2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * config/arm/arm-builtins.c (arm_builtins): Define ARM_BUILTIN_CMSE_NONSECURE_CALLER. (bdesc_2arg): Add line for cmse_nonsecure_caller. (arm_init_builtins): Handle cmse_nonsecure_caller. (arm_expand_builtin): Likewise. * config/arm/arm_cmse.h (cmse_nonsecure_caller): New. gcc/testsuite/ChangeLog: 2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * gcc.target/arm/cmse/cmse-1.c: Add test for cmse_nonsecure_caller. Co-Authored-By: Thomas Preud'homme <thomas.preudhomme@arm.com> From-SVN: r243193
2016-12-02ARMv8-M Security Extension's cmse_nonsecure_call: use __gnu_cmse_nonsecure_callAndre Vieira46-6/+2099
gcc/ChangeLog: 2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * config/arm/arm.c (detect_cmse_nonsecure_call): New. (cmse_nonsecure_call_clear_caller_saved): New. (arm_reorg): Use cmse_nonsecure_call_clear_caller_saved. (arm_function_ok_for_sibcall): Disable sibcalls for cmse_nonsecure_call. * config/arm/arm-protos.h (detect_cmse_nonsecure_call): New. * config/arm/arm.md (call): Handle cmse_nonsecure_entry. (call_value): Likewise. (nonsecure_call_internal): New. (nonsecure_call_value_internal): New. * config/arm/thumb1.md (*nonsecure_call_reg_thumb1_v5): New. (*nonsecure_call_value_reg_thumb1_v5): New. * config/arm/thumb2.md (*nonsecure_call_reg_thumb2): New. (*nonsecure_call_value_reg_thumb2): New. * config/arm/unspecs.md (UNSPEC_NONSECURE_MEM): New. libgcc/ChangeLog: 2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * config/arm/cmse_nonsecure_call.S: New. * config/arm/t-arm: Compile cmse_nonsecure_call.S gcc/testsuite/ChangeLog: 2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * gcc.target/arm/cmse/cmse.exp: Run tests in mainline dir. * gcc.target/arm/cmse/cmse-9.c: Added some extra tests. * gcc.target/arm/cmse/cmse-14.c: New. * gcc.target/arm/cmse/baseline/bitfield-4.c: New. * gcc.target/arm/cmse/baseline/bitfield-5.c: New. * gcc.target/arm/cmse/baseline/bitfield-6.c: New. * gcc.target/arm/cmse/baseline/bitfield-7.c: New. * gcc.target/arm/cmse/baseline/bitfield-8.c: New. * gcc.target/arm/cmse/baseline/bitfield-9.c: New. * gcc.target/arm/cmse/baseline/bitfield-and-union-1.c: New. * gcc.target/arm/cmse/baseline/cmse-11.c: New. * gcc.target/arm/cmse/baseline/cmse-13.c: New. * gcc.target/arm/cmse/baseline/cmse-6.c: New. * gcc.target/arm/cmse/baseline/union-1.c: New. * gcc.target/arm/cmse/baseline/union-2.c: New. * gcc.target/arm/cmse/mainline/bitfield-4.c: New. * gcc.target/arm/cmse/mainline/bitfield-5.c: New. * gcc.target/arm/cmse/mainline/bitfield-6.c: New. * gcc.target/arm/cmse/mainline/bitfield-7.c: New. * gcc.target/arm/cmse/mainline/bitfield-8.c: New. * gcc.target/arm/cmse/mainline/bitfield-9.c: New. * gcc.target/arm/cmse/mainline/bitfield-and-union-1.c: New. * gcc.target/arm/cmse/mainline/union-1.c: New. * gcc.target/arm/cmse/mainline/union-2.c: New. * gcc.target/arm/cmse/mainline/hard-sp/cmse-13.c: New. * gcc.target/arm/cmse/mainline/hard-sp/cmse-7.c: New. * gcc.target/arm/cmse/mainline/hard-sp/cmse-8.c: New. * gcc.target/arm/cmse/mainline/hard/cmse-13.c: New. * gcc.target/arm/cmse/mainline/hard/cmse-7.c: New. * gcc.target/arm/cmse/mainline/hard/cmse-8.c: New. * gcc.target/arm/cmse/mainline/soft/cmse-13.c: New. * gcc.target/arm/cmse/mainline/soft/cmse-7.c: New. * gcc.target/arm/cmse/mainline/soft/cmse-8.c: New. * gcc.target/arm/cmse/mainline/softfp-sp/cmse-7.c: New. * gcc.target/arm/cmse/mainline/softfp-sp/cmse-8.c: New. * gcc.target/arm/cmse/mainline/softfp/cmse-13.c: New. * gcc.target/arm/cmse/mainline/softfp/cmse-7.c: New. * gcc.target/arm/cmse/mainline/softfp/cmse-8.c: New. Co-Authored-By: Thomas Preud'homme <thomas.preudhomme@arm.com> From-SVN: r243192
2016-12-02Handling ARMv8-M Security Extension's cmse_nonsecure_call attributeAndre Vieira7-2/+190
gcc/ChangeLog: 2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * config/arm/arm.c (gimplify.h): New include. (arm_handle_cmse_nonsecure_call): New. (arm_attribute_table): Added cmse_nonsecure_call. (arm_comp_type_attributes): Deny compatibility of function types with without the cmse_nonsecure_call attribute. * doc/extend.texi (ARM ARMv8-M Security Extensions): New attribute. gcc/testsuite/ChangeLog: 2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * gcc.target/arm/cmse/cmse-3.c: Add tests. * gcc.target/arm/cmse/cmse-4.c: Add tests. * gcc.target/arm/cmse/cmse-15.c: New. Co-Authored-By: Thomas Preud'homme <thomas.preudhomme@arm.com> From-SVN: r243191
2016-12-02ARMv8-M Security Extension's cmse_nonsecure_entry: clear registersAndre Vieira17-6/+948
gcc/ChangeLog: 2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * config/arm/arm.c (output_return_instruction): Clear registers. (thumb2_expand_return): Likewise. (thumb1_expand_epilogue): Likewise. (thumb_exit): Likewise. (arm_expand_epilogue): Likewise. (cmse_nonsecure_entry_clear_before_return): New. (comp_not_to_clear_mask_str_un): New. (compute_not_to_clear_mask): New. * config/arm/thumb1.md (*epilogue_insns): Change length attribute. * config/arm/thumb2.md (*thumb2_return): Disable for cmse_nonsecure_entry functions. (*thumb2_cmse_entry_return): Duplicate thumb2_return pattern for cmse_nonsecure_entry functions. gcc/testsuite/ChangeLog: 2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * gcc.target/arm/cmse/cmse.exp: Test different multilibs separate. * gcc.target/arm/cmse/struct-1.c: New. * gcc.target/arm/cmse/bitfield-1.c: New. * gcc.target/arm/cmse/bitfield-2.c: New. * gcc.target/arm/cmse/bitfield-3.c: New. * gcc.target/arm/cmse/baseline/cmse-2.c: New. * gcc.target/arm/cmse/baseline/softfp.c: New. * gcc.target/arm/cmse/mainline/soft/cmse-5.c: New. * gcc.target/arm/cmse/mainline/hard/cmse-5.c: New. * gcc.target/arm/cmse/mainline/hard-sp/cmse-5.c: New. * gcc.target/arm/cmse/mainline/softfp/cmse-5.c: New. * gcc.target/arm/cmse/mainline/softfp-sp/cmse-5.c: New. Co-Authored-By: Thomas Preud'homme <thomas.preudhomme@arm.com> From-SVN: r243190
2016-12-02ARMv8-M Security Extension's cmse_nonsecure_entry: __acle_se label and bxnsAndre Vieira8-20/+148
return gcc/ChangeLog: 2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * config/arm/arm.c (use_return_insn): Change to return with bxns when cmse_nonsecure_entry. (output_return_instruction): Likewise. (arm_output_function_prologue): Likewise. (thumb_pop): Likewise. (thumb_exit): Likewise. (thumb2_expand_return): Assert that entry functions always have simple returns. (arm_expand_epilogue): Handle entry functions. (arm_function_ok_for_sibcall): Disable sibcall for entry functions. (arm_asm_declare_function_name): New. * config/arm/arm-protos.h (arm_asm_declare_function_name): New. * config/arm/elf.h (ASM_DECLARE_FUNCTION_NAME): Redefine to use arm_asm_declare_function_name. gcc/testsuite/ChangeLog: 2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * gcc.target/arm/cmse/cmse-4.c: New. * gcc.target/arm/cmse/cmse-9.c: New. * gcc.target/arm/cmse/cmse-10.c: New. Co-Authored-By: Thomas Preud'homme <thomas.preudhomme@arm.com> From-SVN: r243189
2016-12-02Handling ARMv8-M Security Extension's cmse_nonsecure_entry attributeAndre Vieira6-0/+173
gcc/ChangeLog: 2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * config/arm/arm.c (arm_handle_cmse_nonsecure_entry): New. (arm_attribute_table): Added cmse_nonsecure_entry (arm_compute_func_type): Handle cmse_nonsecure_entry. (cmse_func_args_or_return_in_stack): New. (arm_handle_cmse_nonsecure_entry): New. * config/arm/arm.h (ARM_FT_CMSE_ENTRY): New macro define. (IS_CMSE_ENTRY): Likewise. * doc/extend.texi (ARM ARMv8-M Security Extensions): New attribute. gcc/testsuite/ChangeLog: 2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * gcc.target/arm/cmse/cmse-3.c: New. Co-Authored-By: Thomas Preud'homme <thomas.preudhomme@arm.com> From-SVN: r243188
2016-12-02Add support for ARMv8-M's Secure Extensions flag and intrinsicsAndre Vieira17-5/+429
gcc/ChangeLog: 2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * config.gcc (extra_headers): Added arm_cmse.h. * config/arm/arm-arches.def (ARM_ARCH): (armv8-m): Add FL2_CMSE. (armv8-m.main): Likewise. (armv8-m.main+dsp): Likewise. * config/arm/arm-c.c (arm_cpu_builtins): Added __ARM_FEATURE_CMSE macro. * config/arm/arm-flags.h: Define FL2_CMSE. * config/arm.c (arm_arch_cmse): New. (arm_option_override): New error for unsupported cmse target. * config/arm/arm.h (arm_arch_cmse): New. * config/arm/arm.opt (mcmse): New. * config/arm/arm_cmse.h: New file. * doc/invoke.texi (ARM Options): Add -mcmse. * doc/sourcebuild.texi (arm_cmse_ok): Add new effective target. * doc/extend.texi: Add ARMv8-M Security Extensions entry. gcc/testsuite/ChangeLog: 2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * gcc.target/arm/cmse/cmse.exp: New. * gcc.target/arm/cmse/cmse-1.c: New. * gcc.target/arm/cmse/cmse-12.c: New. * lib/target-supports.exp (check_effective_target_arm_cmse_ok): New. libgcc/ChangeLog: 2016-12-02 Andre Vieira <andre.simoesdiasvieira@arm.com> Thomas Preud'homme <thomas.preudhomme@arm.com> * config/arm/t-arm (HAVE_CMSE): New. * config/arm/cmse.c: New. Co-Authored-By: Thomas Preud'homme <thomas.preudhomme@arm.com> From-SVN: r243187
2016-12-02avr.c: Fix coding rule glitches.Georg-Johann Lay2-183/+184
* config/avr/avr.c: Fix coding rule glitches. From-SVN: r243186
2016-12-02c-parser.c (c_parser_pragma): Error when PRAGMA_OACC_{ENTER_DATA...Cesar Philippidis8-41/+199
gcc/c/ * c-parser.c (c_parser_pragma): Error when PRAGMA_OACC_{ENTER_DATA, EXIT_DATA,WAIT} are not used in compound statements. (c_parser_oacc_enter_exit_data): Update diagnostics. gcc/cp/ * parser.c (cp_parser_oacc_enter_exit_data): Update diagnostics. (cp_parser_pragma): Error when PRAGMA_OACC_{ENTER_DATA, EXIT_DATA,WAIT} are not used in compound statements. gcc/testsuite/ * c-c++-common/goacc/data-2.c: Adjust test. * c-c++-common/goacc/executeables-1.c: New test. * g++.dg/goacc/data-1.C: Adjust test. Co-Authored-By: James Norris <jnorris@codesourcery.com> From-SVN: r243185
2016-12-02[hsa] Exclude parallel outlines from hsa_callable_functions_pMartin Jambor2-1/+9
2016-12-09 Martin Jambor <mjambor@suse.cz> * hsa.c (hsa_callable_function_p): Return false for artificial functions. From-SVN: r243184
2016-12-02[Patch 2/2 PR78561] Recalculate constant pool size before emitting itJames Greenhalgh3-0/+39
gcc/ PR rtl-optimization/78561 * varasm.c (recompute_pool_offsets): New. (output_constant_pool): Call it. gcc/testsuite/ PR rtl-optimization/78561 * gcc.target/aarch64/pr78561.c: New. From-SVN: r243183
2016-12-02[Patch 1/2 PR78561] Rename get_pool_size to get_pool_size_upper_boundJames Greenhalgh4-13/+34
gcc/ PR rtl-optimization/78561 * config/rs6000/rs6000.c (rs6000_reg_live_or_pic_offset_p) Rename get_pool_size to get_pool_size_upper_bound. (rs6000_stack_info): Likewise. (rs6000_emit_prologue): Likewise. (rs6000_elf_declare_function_name): Likewise. (rs6000_set_up_by_prologue): Likewise. (rs6000_can_eliminate): Likewise, reformat spaces to tabs. * output.h (get_pool_size): Rename to... (get_pool_size_upper_bound): ...This. * varasm.c (get_pool_size): Rename to... (get_pool_size_upper_bound): ...This. From-SVN: r243182
2016-12-02match.pd: Add new pattern: (cond (cmp (convert?Bin Cheng5-0/+206
* match.pd: Add new pattern: (cond (cmp (convert? x) c1) (op x c2) c3) -> (op (minmax x c1) c2). gcc/testsuite * gcc.dg/fold-bopcond-1.c: New test. * gcc.dg/fold-bopcond-2.c: New test. From-SVN: r243180
2016-12-02call.c (add_function_candidate): Also exclude inherited ctors that take a ↵Jason Merrill2-18/+8
type reference-related to the derived... * call.c (add_function_candidate): Also exclude inherited ctors that take a type reference-related to the derived class. From-SVN: r243178
2016-12-02diagnostic.c (diagnostic_report_diagnostic): Remove extraneous braces.Nathan Sidwell2-3/+6
* diagnostic.c (diagnostic_report_diagnostic): Remove extraneous braces. From-SVN: r243177
2016-12-02S/390: Fix setmem-long test.Dominik Vogt2-2/+6
Adding a " in the scan-assembler pattern is necessary because of a recent change in print-rtl.c. gcc/testsuite/ChangeLog: 2016-12-02 Dominik Vogt <vogt@linux.vnet.ibm.com> * gcc.target/s390/md/setmem_long-1.c: Fix test. From-SVN: r243176
2016-12-02re PR middle-end/78328 (wrong wording for unbounded alloc case in ↵Aldy Hernandez3-0/+19
-Walloca-larger-than note) PR middle-end/78328 * gimple-ssa-warn-alloca.c (alloca_call_type): Handle VR_ANTI_RANGE. From-SVN: r243174
2016-12-02S/390: Fix RTL sharing when generating reg note.Andreas Krebbel2-1/+6
gcc/ChangeLog: 2016-12-02 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * config/s390/s390.c (s390_save_gprs_to_fprs): Fix RTL sharing problem. From-SVN: r243173
2016-12-02avr-arch.h (avr_mcu_t): Remove field.Georg-Johann Lay6-285/+291
* config/avr/avr-arch.h (avr_mcu_t) [n_flash]: Remove field. * config/avr/avr-devices.c (AVR_MCU): Remove N_FLASH macro argument. * config/avr/avr-mcus.def (AVR_MCU): Remove initializer for n_flash. * config/avr/avr.c (avr_set_core_architecture) [avr_n_flash]: Use avr_mcu_types.flash_size to compute default value. * config/avr/gen-avr-mmcu-specs.c (print_mcu) [cc1_n_flash]: Use mcu->flash_size to compute value for spec. From-SVN: r243171
2016-12-02invoke.texi (AVR Options): Point to absdata.Georg-Johann Lay3-1/+35
* doc/invoke.texi (AVR Options) [-mabsdata]: Point to absdata. * doc/extend.texi (AVR Variable Attributes) [progmem]: Hint about linker description to avoid progmem altogether. [absdata]: Point to -mabsdata option. From-SVN: r243170
2016-12-02re PR rtl-optimization/78547 (ICE: in loc_cmp, at var-tracking.c:3417 with ↵Jakub Jelinek5-0/+59
-Os -g -mstringop-strategy=libcall -freorder-blocks-algorithm=simple) PR rtl-optimization/78547 * emit-rtl.c (unshare_all_rtl): Make sure DECL_RTL and DECL_INCOMING_RTL is not shared. * config/i386/i386.c (convert_scalars_to_vectors): If any insns have been converted, adjust all parameter's DEC_RTL and DECL_INCOMING_RTL back from V1TImode to TImode if the parameters have TImode. * gcc.dg/pr78547.c: New test. From-SVN: r243165
2016-12-02re PR rtl-optimization/78575 (ICE: in trunc_int_for_mode, at explow.c:55 ↵Jakub Jelinek4-18/+49
with -O2 -g) PR rtl-optimization/78575 * config/i386/i386.c (timode_scalar_chain::fix_debug_reg_uses): Use DF infrastructure to wrap all V1TImode reg uses into TImode subreg if not already wrapped in a subreg. Make sure df_insn_rescan does not affect further iterations. * gcc.dg/pr78575.c: New test. From-SVN: r243164
2016-12-02Fix runtime error: left shift of negative value (PRMartin Liska3-7/+33
PR ipa/78555 * sreal.c (sreal::to_int): Make absolute value before shifting. (sreal::operator/): Likewise. (sreal_verify_negative_division): New test. (void sreal_c_tests): Call the new test. * sreal.h (sreal::normalize_up): Use new SREAL_ABS and SREAL_SIGN macros. (sreal::normalize_down): Likewise. From-SVN: r243163
2016-12-02Do not simplify "(and (reg) (const bit)" to if_then_else.Dominik Vogt2-0/+17
combine_simplify_rtx() tries to replace rtx expressions with just two possible values with an experession that uses if_then_else: (if_then_else (condition) (value1) (value2)) If the original expression is e.g. (and (reg) (const_int 2)) where the constant is the mask for a single bit, the replacement results in a more complex expression than before: (if_then_else (ne (zero_extract (reg) (1) (31))) (2) (0)) Similar replacements are done for (signextend (and ...)) (zeroextend (and ...)) Suppress the replacement this special case in if_then_else_cond(). gcc/ChangeLog: 2016-12-02 Dominik Vogt <vogt@linux.vnet.ibm.com> * combine.c (combine_simplify_rtx): Suppress replacement of "(and (reg) (const_int bit))" with "if_then_else". From-SVN: r243162
2016-12-02S/390: Fix litpool-r3-1.c.Dominik Vogt2-1/+5
gcc/testsuite/ChangeLog: 2016-12-02 Dominik Vogt <vogt@linux.vnet.ibm.com> * gcc.target/s390/litpool-r3-1.c: Fix label number test. From-SVN: r243161
2016-12-02PR target/77822: S390: Validate argument range of {zero,sign}_extract.Dominik Vogt6-7/+369
With some undefined code, combine generates patterns where the arguments to *_extract are out of range, e.b. a negative bit position. If the s390 backend accepts these, they lead to not just undefined behaviour but invalid assembly instructions (argument out of the allowed range). So this patch makes sure that the rtl expressions with out of range arguments are rejected. gcc/ChangeLog: 2016-12-02 Dominik Vogt <vogt@linux.vnet.ibm.com> PR target/77822 * config/s390/s390.md ("extzv") ("*extzv<mode><clobbercc_or_nocc>") ("*extzvdi<clobbercc_or_nocc>_lshiftrt") ("*<risbg_n>_ior_and_sr_ze") ("*extract1bitdi<clobbercc_or_nocc>") ("*insv<mode><clobbercc_or_nocc>", "*insv_rnsbg_noshift") ("*insv_rnsbg_srl", "*insv<mode>_mem_reg") ("*insvdi_mem_reghigh", "*insvdi_reg_imm"): Use EXTRACT_ARGS_IN_RANGE to validate the arguments of zero_extract and sign_extract. gcc/testsuite/ChangeLog: 2016-12-02 Dominik Vogt <vogt@linux.vnet.ibm.com> PR target/77822 * gcc.target/s390/s390.exp: Support .C tests. * gcc.target/s390/pr77822-2.c: New test. * gcc.target/s390/pr77822-1.C: New test. From-SVN: r243160
2016-12-02PR target/77822: Add helper macro EXTRACT_ARGS_IN_RANGE to system.h.Dominik Vogt2-0/+15
The macro can be used to validate the arguments of zero_extract and sign_extract to fix this problem: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=77822 gcc/ChangeLog: 2016-12-02 Dominik Vogt <vogt@linux.vnet.ibm.com> PR target/77822 * rtl.h (EXTRACT_ARGS_IN_RANGE): New. From-SVN: r243159
2016-12-02S/390: Define vectorization_cost hookAndreas Krebbel4-0/+65
Define the vectorization_cost hook. The only change right now compared to the default implementation is the reduced costs for unaligned loads/stores. This is supposed to prevent unnecessary loop peeling performed to reach better alignments. Further tuning of this hook is required. -Andreas- gcc/ChangeLog: 2016-12-02 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * gcc/config/s390/s390.c (s390_builtin_vectorization_cost): New function. (TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST): Define target macro. gcc/testsuite/ChangeLog: 2016-12-02 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * gcc.target/s390/vector/vec-nopeel-1.c: New test. From-SVN: r243158
2016-12-02S/390: Add vector pack/unpack patterns.Andreas Krebbel3-10/+203
gcc/ChangeLog: 2016-12-02 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * config/s390/vector.md (vec_halfhalf): New mode iterator. ("vec_pack_trunc_<mode>", "vec_pack_ssat_<mode>") ("vec_pack_usat_<mode>", "vec_unpacks_hi_v16qi") ("vec_unpacks_low_v16qi", "vec_unpacku_hi_v16qi") ("vec_unpacku_low_v16qi", "vec_unpacks_hi_v8hi") ("vec_unpacks_lo_v8hi", "vec_unpacku_hi_v8hi") ("vec_unpacku_lo_v8hi", "vec_unpacks_hi_v4si") ("vec_unpacks_lo_v4si", "vec_unpacku_hi_v4si") ("vec_unpacku_lo_v4si"): New pattern definitions. * config/s390/vx-builtins.md: Move VI_HW_HSD mode iterator to vector.md. From-SVN: r243157
2016-12-02Add testcase missing in last commit.Andreas Krebbel1-0/+203
gcc/testsuite/ChangeLog: 2016-12-02 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * gcc.target/s390/zvector/vec-cmp-2.c: New test. From-SVN: r243156
2016-12-02S/390: Merge compare of compare resultsAndreas Krebbel5-0/+69
With this patch EQ and NE compares on CC mode reader patterns are folded. This allows using the result of the vec_all_* and vec_any_* builtins directly in a conditional jump instruction as in the attached testcase. gcc/ChangeLog: 2016-12-02 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * config/s390/s390-protos.h (s390_reverse_condition): New prototype. * config/s390/s390.c (s390_canonicalize_comparison): Fold compares of CC mode values. (s390_reverse_condition): New function. * config/s390/s390.h (REVERSE_CC_MODE, REVERSE_CONDITION): Define target macros. gcc/testsuite/ChangeLog: 2016-12-02 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * gcc.target/s390/zvector/vec-cmp-2.c: New test. From-SVN: r243155
2016-12-02S/390: Fix vector all/any cc modes.Andreas Krebbel8-176/+388
This fixes a problem with the vector compares producing CC mode results. The instructions produce condition code modes which can be either interpreted to check an ALL elements or an ANY element result. As the modes where used before they could not be inverted by the middle-end by inverting the comparison code (e.g. eq to ne). The result usually was just wrong. In fact inverting a comparison code on an CCVALL mode would require to also change the mode to CCVANY but this cannot be done easily in the middle-end. With this patch the meaning of an ALL cc mode only refers to the not-inverted comparison code (e.g. eq, gt, ge). With that change inverting the comparison code matches a not operation on the condition code mask again. Bootstrapped and regression tested on s390 and s390x. Bye, -Andreas- gcc/testsuite/ChangeLog: 2016-12-02 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * gcc.target/s390/vector/vec-scalar-cmp-1.c: Fix and harden the pattern checks. * gcc.target/s390/zvector/vec-cmp-1.c: New test. gcc/ChangeLog: 2016-12-02 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * config/s390/s390-modes.def (CCVEQANY, CCVH, CCVHANY, CCVHU) (CCVHUANY): Remove modes. (CCVIH, CCVIHU, CCVIALL, CCVIANY, CCVFALL, CCVFANY): Add modes and documentation. * config/s390/s390.c (s390_match_ccmode_set): Rename cc modes. (s390_expand_vec_compare_scalar): Pick one of the cc consumer modes. (s390_branch_condition_mask): Adjust to use the new cc consumer modes. The new modes allow for proper reversal in the middle-end. (s390_expand_vec_compare_cc): Determine the proper cc producer and consumer modes for a comparison. * config/s390/s390.md: Rename CCVH to CCVIH and CCVHU to CCVIHU throughout the file. * config/s390/vx-builtins.md: Likewise. From-SVN: r243154
2016-12-02Add support for ASan odr_indicator.Maxim Ostapenko6-8/+129
config/ * bootstrap-asan.mk: Replace LSAN_OPTIONS=detect_leaks=0 with ASAN_OPTIONS=detect_leaks=0:use_odr_indicator=1. gcc/ * asan.c (asan_global_struct): Refactor. (create_odr_indicator): New function. (asan_needs_odr_indicator_p): Likewise. (is_odr_indicator): Likewise. (asan_add_global): Introduce odr_indicator_ptr. Pass it into global's constructor. (asan_protect_global): Do not protect odr indicators. gcc/c-family/ * c-attribs.c (asan odr indicator): New attribute. (handle_asan_odr_indicator_attribute): New function. gcc/testsuite/ * c-c++-common/asan/no-redundant-odr-indicators-1.c: New test. From-SVN: r243153
2016-12-01* tree-ssa-threadedge.cJeff Law2-3/+10
(record_temporary_equivalences_from_stmts_at_dest): Avoid temporary propagation of operands if there are no operands. From-SVN: r243152
2016-12-02Daily bump.GCC Administrator1-1/+1
From-SVN: r243150
2016-12-02re PR tree-optimization/78586 (Wrong code caused by printf-return-value)Jakub Jelinek2-18/+20
PR tree-optimization/78586 * gimple-ssa-sprintf.c (format_integer): Don't handle NOP_EXPR, CONVERT_EXPR or COMPONENT_REF here. Formatting fix. For SSA_NAME_DEF_STMT with NOP_EXPR only change argtype if the rhs1's type is INTEGER_TYPE or POINTER_TYPE. From-SVN: r243145
2016-12-01re PR fortran/77505 (Negative character length not treated as LEN=0)Elizebeth Punnoose5-0/+61
2016-12-01 Elizebeth Punnoose <elizebeth.punnoose@hpe.com> PR fortran/77505 * trans-array.c (trans_array_constructor): Treat negative character length as LEN = 0. 2016-12-01 Elizebeth Punnoose <elizebeth.punnoose@hpe.com> PR fortran/77505 * gfortran.dg/char_length_20.f90: New test. * gfortran.dg/char_length_21.f90: Ditto. From-SVN: r243143
2016-12-01re PR target/78577 (Fix define_insn operand types for vexturhlx, vexturhrx, ↵Kelvin Nilsen2-4/+12
vextuwlx, and vextuwrx patterns) gcc/ChangeLog: 2016-12-01 Kelvin Nilsen <kelvin@gcc.gnu.org> PR target/78577 * config/rs6000/vsx.md (vextuhlx): Revise mode of operand 2. (vextuhrx): Likewise. (vextuwlx): Likewise. (vextuwrx): Likewise. From-SVN: r243141
2016-12-01* es.po: Update.Joseph Myers2-259/+73
From-SVN: r243139
2016-12-01call.c (add_function_candidate): Exclude inherited copy/move ctors.Jason Merrill4-14/+42
* call.c (add_function_candidate): Exclude inherited copy/move ctors. From-SVN: r243138
2016-12-01fix PR numberJason Merrill1-1/+1
From-SVN: r243137
2016-12-01dwarf2out.c: fix jit issue with early_dwarf_finishedDavid Malcolm2-0/+8
All of the jit testcases that generate debuginfo appear to have been failing since r240228 on their 2nd in-process iteration on this assertion in set_early_dwarf's ctor: gcc_assert (! early_dwarf_finished); Root cause is that the global is never reset at the end of compilation, which this patch fixes in the obvious way. gcc/ChangeLog: * dwarf2out.c (dwarf2out_c_finalize): Reset early_dwarf and early_dwarf_finished. From-SVN: r243136
2016-12-01sparc.opt (mlra): New target option.Eric Botcazou4-28/+52
* config/sparc/sparc.opt (mlra): New target option. * config/sparc/sparc.c (TARGET_LRA_P): Define to... (sparc_lra_p): ...this. New function. (D_MODES, DF_MODES): Add missing cast. * config/sparc/sparc.md (*movsi_lo_sum, *movsi_high): Do not provide these insns when flag_pic. (sethi_di_medlow, losum_di_medlow, seth44, setm44, setl44, sethh, setlm, sethm, setlo, embmedany_sethi, embmedany_losum, embmedany_brsum, embmedany_textuhi, embmedany_texthi, embmedany_textulo, embmedany_textlo): Likewise. (sethi_di_medlow_embmedany_pic): Provide it only when flag_pic. Co-Authored-By: David S. Miller <davem@davemloft.net> From-SVN: r243135
2016-12-01re PR fortran/78279 (ICE in identical_array_ref, at fortran/dependency.c:104)Steven G. Kargl4-1/+24
2016-12-01 Steven G. Kargl <kargl@gcc.gnu.org> PR fortran/78279 * dependency.c (identical_array_ref): Convert gcc_assert to conditional and gfc_internal_error. 2016-12-01 Steven G. Kargl <kargl@gcc.gnu.org> PR fortran/78279 * gfortran.dg/pr78279.f90: New test. From-SVN: r243131
2016-12-01compiler: add slice initializers to the GC root listIan Lance Taylor5-5/+128
As of https://golang.org/cl/32917 we can put slice initializers in the .data section. The program can still change the values in those slices. That means that if the slice elements can contain pointers, we need to register the entire initializer as a GC root. This would be straightforward except that we only have a Bexpression for the slice initializer, not an Expression. So introduce a Backend_expression type that wraps a Bexpression as an Expression. The test case for this is https://golang.org/cl/33790. Reviewed-on: https://go-review.googlesource.com/33792 From-SVN: r243129
2016-12-01re PR debug/66149 (ICE: tree check: expected field_decl, have template_decl ↵David Edelsohn2-0/+7
in int_bit_position, at tree.h:5012 with -std=c++14 -gstabs) PR debug/66419 PR c++/78235 * dbxout.c (dbxout_type_fields): Skip TEMPLATE_DECLs. From-SVN: r243126
2016-12-01vec.h (vec<T, [...]): Guard call to memset if len-oldlen != 0.Richard Biener2-2/+13
2016-12-01 Richard Biener <rguenther@suse.de> Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> * vec.h (vec<T, A, vl_embed>::quick_grow_cleared): Guard call to memset if len-oldlen != 0. (vec<T, va_heap, vl_ptr>::safe_grow_cleared): Likewise. Co-Authored-By: Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> From-SVN: r243125
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