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2021-04-16Fortran: Add missing TKR initialization [PR100094]José Rui Faustino de Sousa2-0/+51
gcc/fortran/ChangeLog: PR fortran/100094 * trans-array.c (gfc_trans_deferred_array): Add code to initialize pointers and allocatables with correct TKR parameters. gcc/testsuite/ChangeLog: PR fortran/100094 * gfortran.dg/PR100094.f90: New test.
2021-04-16testsuite/arm: Fix scan-assembler-times in pr96770.c with movt/movwChristophe Lyon1-5/+7
The previous change to this testcase missed the fact that the data may be accessed via an anchor, depending on the optimization level, leading to false failures. This patch restricts matching to upper16:lower16 followed by non-spaces, followed by +4 (in f4) or +320 (in f5). Using '.*' instead of '[^ \]' would match accross the whole assembly file, which is not what we want, hence the limitation with spaces. 2021-04-16 Christophe Lyon <christophe.lyon@linaro.org> gcc/testsuite/ PR target/96770 * gcc.target/arm/pure-code/pr96770.c: Fix scan-assembler-times with movt/movw.
2021-04-16aarch64: Don't emit -Wpsabi note when ABI was never affected [PR91710]Jakub Jelinek2-9/+30
As the following testcase shows, we emit a -Wpsabi note about argument passing change since GCC 9, but in reality the ABI didn't change. The alignment is 8 bits in GCC < 9 and 32 bits in GCC >= 9 and the aarch64_function_arg_alignment returns in that case: return MIN (MAX (alignment, PARM_BOUNDARY), STACK_BOUNDARY); so when both the old and new alignment are smaller or equal to PARM_BOUNDARY (or both are larger than STACK_BOUNDARY, just in theory), even when the new one is bigger, it doesn't change the argument passing. So, the following patch changes aarch64_function_arg_alignment to tell the callers the exact old alignmentm so that they can test it if needed. The other aarch64_function_arg_alignment callers either check the alignment for equality against 16-byte alignment (when old alignment was smaller than that and the new one is 16-byte, we want to emit -Wpsabi in all the cases) or the va_arg case which I think is ok now too. 2021-04-16 Jakub Jelinek <jakub@redhat.com> PR target/91710 * config/aarch64/aarch64.c (aarch64_function_arg_alignment): Change abi_break argument from bool * to unsigned *, store there the pre-GCC 9 alignment. (aarch64_layout_arg, aarch64_gimplify_va_arg_expr): Adjust callers. (aarch64_function_arg_regno_p): Likewise. Only emit -Wpsabi note if the old and new alignment after applying MIN/MAX to it is different. * gcc.target/aarch64/pr91710.c: New test.
2021-04-16Fortran: Fix ICE due to referencing a NULL pointer [PR100018]José Rui Faustino de Sousa2-0/+12
gcc/fortran/ChangeLog: PR fortran/100018 * resolve.c: Add association check before de-referencing pointer. gcc/testsuite/ChangeLog: PR fortran/100018 * gfortran.dg/PR10018.f90: New test.
2021-04-16SVE: Fix wrong sve predicate split (PR100048)Tamar Christina4-5/+45
The attached testcase generates the following paradoxical subregs when creating the predicates. (insn 22 21 23 2 (set (reg:VNx8BI 100) (subreg:VNx8BI (reg:VNx2BI 103) 0)) (expr_list:REG_EQUAL (const_vector:VNx8BI [ (const_int 1 [0x1]) (const_int 0 [0]) (const_int 1 [0x1]) (const_int 0 [0]) repeated x5 ]) (nil))) and (insn 15 14 16 2 (set (reg:VNx8BI 96) (subreg:VNx8BI (reg:VNx2BI 99) 0)) (expr_list:REG_EQUAL (const_vector:VNx8BI [ (const_int 1 [0x1]) (const_int 0 [0]) repeated x7 ]) (nil))) This causes CSE to incorrectly think that the two predicates are equal because some of the significant bits get ignored due to the subreg. The attached patch instead makes it so it always looks at all 16-bits of the predicate, but in turn means we need to generate a TRN that matches the expected result mode. In effect in RTL we keep the mode as VNx16BI but during codegen re-interpret them as the mode the predicate instruction wanted: (insn 10 9 11 2 (set (reg:VNx8BI 96) (subreg:VNx8BI (reg:VNx16BI 99) 0)) (expr_list:REG_EQUAL (const_vector:VNx8BI [ (const_int 1 [0x1]) (const_int 0 [0]) repeated x7 ]) (nil))) Which needed correction to the TRN pattern. A new TRN1_CONV unspec is introduced which allows one to keep the arguments as VNx16BI but encode the instruction as a type of the last operand. (insn 9 8 10 2 (set (reg:VNx16BI 99) (unspec:VNx16BI [ (reg:VNx16BI 97) (reg:VNx16BI 98) (reg:VNx2BI 100) ] UNSPEC_TRN1_CONV)) (nil)) This allows us remove all the paradoxical subregs and end up with (insn 16 15 17 2 (set (reg:VNx8BI 101) (subreg:VNx8BI (reg:VNx16BI 104) 0)) (expr_list:REG_EQUAL (const_vector:VNx8BI [ (const_int 1 [0x1]) (const_int 0 [0]) (const_int 1 [0x1]) (const_int 0 [0]) repeated x5 ]) (nil))) gcc/ChangeLog: PR target/100048 * config/aarch64/aarch64-sve.md (@aarch64_sve_trn1_conv<mode>): New. * config/aarch64/aarch64.c (aarch64_expand_sve_const_pred_trn): Use new TRN optab. * config/aarch64/iterators.md (UNSPEC_TRN1_CONV): New. gcc/testsuite/ChangeLog: PR target/100048 * gcc.target/aarch64/sve/pr100048.c: New test.
2021-04-16c++: Fix empty base stores in cxx_eval_store_expression [PR100111]Jakub Jelinek2-0/+15
In r11-6895 handling of empty bases has been fixed such that non-lval stores of empty classes are not added when the type of *valp doesn't match the type of the initializer, but as this testcase shows it is done only when *valp is non-NULL. If it is NULL, we still shouldn't add empty class constructors if the type of the constructor elt *valp points to doesn't match. 2021-04-16 Jakub Jelinek <jakub@redhat.com> PR c++/100111 * constexpr.c (cxx_eval_store_expression): Don't add CONSTRUCTORs for empty classes into *valp when types don't match even when *valp is NULL. * g++.dg/cpp0x/constexpr-100111.C: New test.
2021-04-16doc: Update Power builtin documentation in user's manualBill Schmidt1-1968/+232
The standard for many Power vector interfaces is now the recently published Power Vector Intrinsic Programming Reference. Reference that document for the relevant interfaces, and remove redundant information from the GCC user's manual. 2021-04-16 Bill Schmidt <wschmidt@linux.ibm.com> gcc/ * doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions): Revise this section and its subsections.
2021-04-16c++: ICE with bogus late return type [PR99803]Marek Polacek4-6/+15
Here we ICE when compiling this code in C++20, because we're trying to slam a 'typename' after the ->. The cp_parser_template_id call just before the spot I'm changing parsed A::template A<int> as a BASELINK that contains a constructor, but make_typename_type crashes on that. This patch makes make_typename_type more robust instead of checking for is_overloaded_fn prior calling it. gcc/cp/ChangeLog: PR c++/99803 * decl.c (make_typename_type): Give an error and return when name is is_overloaded_fn. * parser.c (cp_parser_class_name): Don't check is_overloaded_fn before calling make_typename_type. gcc/testsuite/ChangeLog: PR c++/99803 * g++.dg/cpp2a/typename14.C: Don't expect particular error messages. * g++.dg/cpp2a/typename19.C: New test.
2021-04-16testsuite: Move gimplefe-4[0|1] tests.Robin Dapp2-0/+0
The gimplefe-40.c and gimplefe-41.c test cases require vect_* effective targets even though they reside in gcc.dg. By default e.g. DEFAULT_VECTCFLAGS which is used to add target-specific machine or build flags is only applied in the ./vect subdirectory. Move these tests there. gcc/testsuite/ChangeLog: * gcc.dg/gimplefe-40.c: Moved to... * gcc.dg/vect/gimplefe-40.c: ...here. * gcc.dg/gimplefe-41.c: Moved to... * gcc.dg/vect/gimplefe-41.c: ...here.
2021-04-16PR fortran/63797 - Bogus ambiguous reference to 'sqrt'Harald Anlauf2-0/+71
The interface of an intrinsic procedure is automatically explicit. Do not write it to the module file to prevent wrong ambiguities on USE. gcc/fortran/ChangeLog: PR fortran/63797 * module.c (write_symtree): Do not write interface of intrinsic procedure to module file for F2003 and newer. gcc/testsuite/ChangeLog: PR fortran/63797 * gfortran.dg/pr63797.f90: New test. Co-authored-by: Paul Thomas <pault@gcc.gnu.org>
2021-04-16testsuite: Fix pr83403-{1,2}.c on IBM ZStefan Schulze Frielinghaus2-0/+2
For z10 and newer inner loops are completely unrolled which means store motion is not applied. Reverting max-completely-peeled-insns to the default value fixes these testcases. gcc/testsuite/ChangeLog: * gcc.dg/tree-ssa/pr83403-1.c: Revert max-completely-peeled-insns to the default value on IBM Z. * gcc.dg/tree-ssa/pr83403-2.c: Likewise.
2021-04-16c++: partially initialized constexpr array [PR99700]Patrick Palka2-2/+49
Here, reduced_constant_expression_p is incorrectly returning true for a partially initialized array CONSTRUCTOR (in C++20 mode) because when the CONSTRUCTOR_NO_CLEARING flag is set, the predicate doesn't check that the CONSTRUCTOR spans the entire array like it does for class CONSTRUCTORS. This patch adds a dedicated loop for the array case that simultaneously verifies the CONSTRUCTOR spans the entire array and is made up of valid constant expressions. gcc/cp/ChangeLog: PR c++/99700 * constexpr.c (reduced_constant_expression_p): For array CONSTRUCTORs, use a dedicated loop that additionally verifies the CONSTRUCTOR spans the entire array. gcc/testsuite/ChangeLog: PR c++/99700 * g++.dg/cpp2a/constexpr-init21.C: New test.
2021-04-16aarch64: Fix up 2 other combine opt regressions vs. GCC8 [PR100075]Jakub Jelinek2-0/+48
The testcase used to be compiled at -O2 by GCC8 and earlier to: f1: neg w1, w0, asr 16 and w1, w1, 65535 orr w0, w1, w0, lsl 16 ret f2: neg w1, w0 extr w0, w1, w0, 16 ret but since GCC9 (r9-3594 for f1 and r9-6926 for f2) we compile it into: f1: mov w1, w0 sbfx x0, x1, 16, 16 neg w0, w0 bfi w0, w1, 16, 16 ret f2: neg w1, w0 sbfx x0, x0, 16, 16 bfi w0, w1, 16, 16 ret instead, i.e. one insn longer each. With this patch we get: f1: mov w1, w0 neg w0, w1, asr 16 bfi w0, w1, 16, 16 ret f2: neg w1, w0 extr w0, w1, w0, 16 ret i.e. identical f2 and same number of insns as in GCC8 in f1. The combiner unfortunately doesn't try splitters when doing 2 -> 1 combination, so it can't be implemented as combine splitters, but it could be implemented as define_insn_and_split if desirable. 2021-04-16 Jakub Jelinek <jakub@redhat.com> PR target/100075 * config/aarch64/aarch64.md (*neg_asr_si2_extr, *extrsi5_insn_di): New define_insn patterns. * gcc.target/aarch64/pr100075.c: New test.
2021-04-16Mark untyped calls and handle them specially [PR98689]Richard Sandiford5-2/+32
This patch fixes a regression introduced by the rtl-ssa patches. It was seen on HPPA but it might be latent elsewhere. The problem is that the traditional way of expanding an untyped_call is to emit sequences like: (call (mem (symbol_ref "foo"))) (set (reg pseudo1) (reg result1)) ... (set (reg pseudon) (reg resultn)) The ABI specifies that result1..resultn are clobbered by the call but nothing in the RTL indicates that result1..resultn are the results of the call. Normally, using a clobbered value gives undefined results, but in this case the results are well-defined and matter for correctness. This seems like a niche case, so I think it would be better to mark it explicitly rather than try to detect it heuristically. Note that in expand_builtin_apply we already have an rtx_insn *, so it doesn't matter whether we call emit_call_insn or emit_insn. Calling emit_insn seems more natural now that the gen_* call has been split out. It also matches later code in the function. gcc/ PR rtl-optimization/98689 * reg-notes.def (UNTYPED_CALL): New note. * combine.c (distribute_notes): Handle it. * emit-rtl.c (try_split): Likewise. * rtlanal.c (rtx_properties::try_to_add_insn): Likewise. Assume that calls with the note implicitly set all return value registers. * builtins.c (expand_builtin_apply): Add a REG_UNTYPED_CALL to untyped_calls.
2021-04-16rtlanal: Don't assume that calls write to a global SP [PR99596]Richard Sandiford2-5/+33
This patch is a GCC 11 regression caused by the rtl-ssa code. Normally we treat calls as containing a potential set of a global register, but DF makes a sensible exception for the stack pointer: if (i == STACK_POINTER_REGNUM) /* The stack ptr is used (honorarily) by a CALL insn. */ df_ref_record (DF_REF_BASE, collection_rec, regno_reg_rtx[i], NULL, bb, insn_info, DF_REF_REG_USE, DF_REF_CALL_STACK_USAGE | flags); else if (global_regs[i]) { /* Calls to const functions cannot access any global registers and calls to pure functions cannot set them. All other calls may reference any of the global registers, so they are recorded as used. */ The only DF definition of SP was therefore the one in the entry block. However, the rtlanal.c rtx_properties code (wrongly) assumed that calls also clobbered the global SP. This led to multiple definitions of SP when we only expected one. This patch tightens the rtlanal.c handling of global registers to match the DF approach. gcc/ PR rtl-optimization/99596 * rtlanal.c (rtx_properties::try_to_add_insn): Don't add global register accesses for const calls. Assume that pure functions can only read from global registers. Ignore cases in which the stack pointer has been marked global. gcc/testsuite/ PR rtl-optimization/99596 * gcc.target/arm/pr99596.c: New test.
2021-04-16arm: Fix some testsuite fallout from r11-8168 [PR100067]Richard Earnshaw4-4/+4
Commit r11-8168 changed the word ordering of a warning in order to make the text more consistent. Unfortunately, it neglected to update some filters in the testsuite that are intended to strip such warnings when we try to partially override the user-supplied command-line options. This patch rectifies this and also fixes some patterns that were incorrectly specified in the first place. gcc/testsuite: PR target/100067 * g++.target/arm/arm.exp (dg_runtest_extra_prunes): Update prune template. * gcc.target/arm/arm.exp (dg_runtest_extra_prunes): Likewise. * g++.target/arm/mve.exp (dg_runtest_extra_prunes): Likewise. Fix missing quotes around switch names. * gcc.target/arm/mve/mve.exp: (dg_runtest_extra_prunes): Likewise.
2021-04-16vectorizer: Remove dead scalar .COND_* calls from vectorized loops [PR99767]Jakub Jelinek2-1/+31
The following testcase ICEs because disabling of DCE means there are dead stmts in the loop (though, in theory they could become dead only shortly before if-conv through some optimization), ifcvt which goes through all stmts in the loop if-converts them into .COND_DIV etc. internal fn calls in the copy of the loop meant for vectorization only, the loop is successfully vectorized but the particular .COND_* call is not because it isn't a live statement and the scalar .COND_* remains in the IL until expansion where it ICEs because these ifns only support vectors and not scalars. These ifns are similar to .MASK_{LOAD,STORE} in this behavior. One possible fix could be to expand scalar versions of them during expansion, basically undoing what if-conv did to create them, i.e. expand them as the lhs = else; if (mask) { lhs = statement; } or so. For .MASK_LOAD we have code to replace them in vect_transform_loop already though (not needed for .MASK_STORE, as stores should be always live and thus always vectorized), so this patch instead replaces .COND_* similarly to .MASK_LOAD in that loop, with the small difference that lhs = .MASK_LOAD (...); is replaced by lhs = 0; while lhs = .COND_* (..., else_arg); is replaced by lhs = else_arg. The statement must be dead, otherwise it would be vectorized, so I think it is not a big deal we don't turn it back into multiple basic blocks etc. (and it might be not possible to do that at that point). 2021-04-16 Jakub Jelinek <jakub@redhat.com> PR target/99767 * tree-vect-loop.c (vect_transform_loop): Don't remove just dead scalar .MASK_LOAD calls, but also dead .COND_* calls - replace them by their last argument. * gcc.target/aarch64/pr99767.c: New test.
2021-04-16c++: Fix up C++23 [] <...> requires primary -> type {} parsing [PR99850]Jakub Jelinek2-0/+20
The requires clause parsing has code to suggest users wrapping non-primary expressions in (), so if it e.g. parses a primary expression and sees it is followed by ++, --, ., ( or -> among other things it will try to reparse it as assignment expression or what and if that works suggests wrapping it inside of parens. When it is requires-clause that is after <typename T> etc. it already has an exception from that as ( can occur in valid C++20 expression there - starting the parameters of the lambda. In C++23 another case can occur, as the parameters with the ()s can be omitted, requires C can be followed immediately by -> which starts a trailing return type. Even in that case, we don't want to parse that as C->... 2021-04-16 Jakub Jelinek <jakub@redhat.com> PR c++/99850 * parser.c (cp_parser_constraint_requires_parens) <case CPP_DEREF>: If lambda_p, return pce_ok instead of pce_maybe_postfix. * g++.dg/cpp23/lambda-specifiers2.C: New test.
2021-04-16c++: Fix up handling of structured bindings in extract_locals_r [PR99833]Jakub Jelinek3-1/+50
The following testcase ICEs in tsubst_decomp_names because the assumptions that the structured binding artificial var is followed in DECL_CHAIN by the corresponding structured binding vars is violated. I've tracked it to extract_locals* which is done for the constexpr IF_STMT. extract_locals_r when it sees a DECL_EXPR adds that decl into a hash set so that such decls aren't returned from extract_locals*, but in the case of a structured binding that just means the artificial var and not the vars corresponding to structured binding identifiers. The following patch fixes it by pushing not just the artificial var for structured bindings but also the other vars. 2021-04-16 Jakub Jelinek <jakub@redhat.com> PR c++/99833 * pt.c (extract_locals_r): When handling DECL_EXPR of a structured binding, add to data.internal also all corresponding structured binding decls. * g++.dg/cpp1z/pr99833.C: New test. * g++.dg/cpp2a/pr99833.C: New test.
2021-04-16testsuite: Fix unroll-and-jam.c on IBM ZStefan Schulze Frielinghaus1-0/+1
For z10 and newer inner loops are completely unrolled which leaves no inner loops to jam which renders this testcase to fail. Reverting max-completely-peel-times to the default value fixes this testcase. gcc/testsuite/ChangeLog: * gcc.dg/unroll-and-jam.c: Revert max-completely-peel-times to the default value on IBM Z.
2021-04-16c++: C++20 class NTTP trailing zero-init [PR100079]Jason Merrill10-52/+117
The new testcase was breaking because constexpr evaluation was simplifying Bar{Baz<42>{}} to Bar{empty}, but then we weren't treating them as equivalent. Poking at this revealed that the code for eliding trailing zero-initialization in class non-type template argument mangling was pretty broken, including the test, mangle71. I dealt with the FIXME to support RANGE_EXPR, and fixed the confusion between a list-initialized temporary mangled as written (i.e. in the signature of a function template) and a template parameter object mangled as the value representation of the object. I'm distinguishing between these using COMPOUND_LITERAL_P. A later patch will adjust the use of COMPOUND_LITERAL_P to be more useful for this distinction, but it works now for distinguishing these cases in mangling. gcc/cp/ChangeLog: PR c++/100079 * cp-tree.h (first_field): Declare. * mangle.c (range_expr_nelts): New. (write_expression): Improve class NTTP mangling. * pt.c (get_template_parm_object): Clear TREE_HAS_CONSTRUCTOR. * tree.c (zero_init_expr_p): Improve class NTTP handling. * decl.c: Adjust comment. gcc/testsuite/ChangeLog: PR c++/100079 * g++.dg/abi/mangle71.C: Fix expected mangling. * g++.dg/abi/mangle77.C: New test. * g++.dg/cpp2a/nontype-class-union1.C: Likewise. * g++.dg/cpp2a/nontype-class-equiv1.C: Removed. * g++.dg/cpp2a/nontype-class44.C: New test.
2021-04-16Daily bump.GCC Administrator7-1/+183
2021-04-15Propagate type attribute when merging extern declarations at local scope.Martin Sebor7-5/+377
Resolves: PR c/99420 - bogus -Warray-parameter on a function redeclaration in function scope PR c/99972 - missing -Wunused-result on a call to a locally redeclared warn_unused_result function gcc/c/ChangeLog: PR c/99420 PR c/99972 * c-decl.c (pushdecl): Always propagate type attribute. gcc/testsuite/ChangeLog: PR c/99420 PR c/99972 * gcc.dg/Warray-parameter-9.c: New test. * gcc.dg/Wnonnull-6.c: New test. * gcc.dg/Wreturn-type3.c: New test. * gcc.dg/Wunused-result.c: New test. * gcc.dg/attr-noreturn.c: New test. * gcc.dg/attr-returns-nonnull.c: New test.
2021-04-15gcc.dg/pr84877.c: Xfail for cris-*-*Hans-Peter Nilsson1-1/+1
Unfortunately it appears that this PR is on nobody's radar. Xfailing it to get an arguably artificial zero regression state (since T0=2007-01-05) helps my autotester. Caveat: the pass/fail state of this test, as long as stack alignment isn't adjusted, is dependent on the alignment of the stack at the entry of main, so depending on the target, e.g. the size and number of environment variables at invocation time can affect the result (including simulator runs where environment variables are propagated to the target). gcc/testsuite: PR middle-end/84877 * gcc.dg/pr84877.c: Xfail for cris-*-*.
2021-04-15c++: constexpr and volatile member function [PR80456]Jason Merrill2-1/+17
When calling a static member function we still need to evaluate an explicit object argument. But we don't want to force a load of the entire object if the argument is volatile, so we take its address. If as a result it no longer has any side-effects, we don't need to evaluate it after all. gcc/cp/ChangeLog: PR c++/80456 * call.c (build_new_method_call_1): Check again for side-effects with a volatile object. gcc/testsuite/ChangeLog: PR c++/80456 * g++.dg/cpp0x/constexpr-volatile3.C: New test.
2021-04-15PR middle-end/89230 - Bogus uninited usage warning with printfMartin Sebor2-0/+79
gcc/testsuite/ChangeLog: * gcc.dg/uninit-pr89230-1.c: New test. * gcc.dg/uninit-pr89230-2.c: Same.
2021-04-15c++: noexcept error recursion [PR100101]Jason Merrill3-5/+37
Here instantiating the noexcept-specifier for bar<void>() means instantiating A<void>::value, which complains about the conversion from 0 to int* in the default argument of foo. Since my patch for PR99583, printing the error context involves looking at C<void>::type, which again wants to instantiate A<void>::value, which breaks. For now at least, let's break this recursion by avoiding looking into the noexcept-specifier in find_typenames, and limit that to just the uses_parameter_packs case that PR99583 cares about. gcc/cp/ChangeLog: PR c++/100101 PR c++/99583 * pt.c (find_parameter_packs_r) [FUNCTION_TYPE]: Walk into TYPE_RAISES_EXCEPTIONS here. * tree.c (cp_walk_subtrees): Not here. gcc/testsuite/ChangeLog: PR c++/100101 * g++.dg/cpp0x/noexcept67.C: New test.
2021-04-15c++: lambda in default type template-argument [PR100091]Jason Merrill2-0/+9
My patch for 99478 relied on local_variables_forbidden_p for distinguishing between a template parameter and its default argument, but that flag wasn't set for a default type template-argument. gcc/cp/ChangeLog: PR c++/100091 PR c++/99478 * parser.c (cp_parser_default_type_template_argument): Set parser->local_variables_forbidden_p. gcc/testsuite/ChangeLog: PR c++/100091 * g++.dg/cpp2a/lambda-uneval15.C: New test.
2021-04-15Make SVE ACLE tests work with --with-cpuRichard Sandiford4-2/+10
This patch follows on from a previous one and adds -mtune=generic to the SVE ACLE assembler tests. These tests are pure assembly tests (execution tests are elsewhere) and they already require dg-additional-options to be used to add new options. We therefore don't need aarch64-with-arch-dg-options. gcc/testsuite/ * g++.target/aarch64/sve/acle/aarch64-sve-acle-asm.exp: Add -mtune=generic to the SVE flags. * g++.target/aarch64/sve2/acle/aarch64-sve2-acle-asm.exp: Likewise. * gcc.target/aarch64/sve/acle/aarch64-sve-acle-asm.exp: Likewise. * gcc.target/aarch64/sve2/acle/aarch64-sve2-acle-asm.exp: Likewise.
2021-04-15Make SVE tests work with --with-cpuRichard Sandiford4-29/+76
A lot of the SVE assembly tests are for generic-tuned SVE codegen and so can fail when run on a toolchain configured with --with-cpu. This could easily be solved by forcing -mtune=generic, like we already do for -moverride=tune=none. However, the testsuite also has some useful execution tests that it would be better to run with as few flag changes as possible. Also, the flags in $sve_flags are printed as part of the test results, so each change to $sve_flags results in a change to the test summaries. This patch instead intercepts dg-options and tailors the list of additional options based on what the test is trying to do. It also gets rid of DEFAULT_CFLAGS, which are never useful for these tests. gcc/testsuite/ * lib/gcc-defs.exp (aarch64-arch-dg-options): New procedure. (aarch64-with-arch-dg-options): Likewise. * g++.target/aarch64/sve/aarch64-sve.exp: Run the tests inside aarch64-with-arch-dg-options. Move the default architecture flags to the final dg-runtest argument. * gcc.target/aarch64/sve/aarch64-sve.exp: Likewise. Dispense with DEFAULT_CFLAGS. * gcc.target/aarch64/sve2/aarch64-sve2.exp: Likewise.
2021-04-15docs: remove itemx for a paramMartin Liska1-1/+0
gcc/ChangeLog: * doc/invoke.texi: Other params don't use it, remove it.
2021-04-15testsuite: enable pr86058.c also on i?86-*-* [PR100073]Jakub Jelinek1-2/+2
The test also works with -m32 or -mx32 the same as it does for -m64, therefore it should be enabled for i?86-*-* x86_64-*-* targets, x86_64-*-* alone is never right. 2021-04-15 Jakub Jelinek <jakub@redhat.com> PR testsuite/100073 * gcc.dg/pr86058.c: Enable also on i?86-*-*.
2021-04-15Deprecate gimple-builder.h APIRichard Biener1-0/+2
This adds a deprecation note to the undocumented gimple-builder.h API only used by asan and sancov. 2021-04-15 Richard Biener <rguenther@suse.de> * gimple-builder.h: Add deprecation note.
2021-04-15c++: Tweak merging of vector attributes that affect type identity [PR98852]Richard Sandiford5-2/+219
<arm_neon.h> types are distinct from GNU vector types in at least their mangling. However, there used to be nothing explicit in the VECTOR_TYPE itself to indicate the difference: we simply treated them as distinct TYPE_MAIN_VARIANTs. This caused problems like the ones reported in PR95726. The fix for that PR was to add type attributes to the <arm_neon.h> types, in order to maintain the distinction between them and GNU vectors. However, this in turn caused PR98852, where cp_common_type would merge the type attributes from the two source types and attach the result to the common type. For example: unsigned vector with no attribute + signed vector with attribute X would get converted to: unsigned vector with attribute X That isn't what we want in this case, since X describes the mangling of the original type. But even if we dropped the mangling from X and worked it out from context, we would still have a situation in which the common type was provably distinct from both of the source types: it would take its <arm_neon.h>-ness from one side and its signedness from the other. I guess there are other cases where the common type doesn't match either side, but I'm not sure it's the obvious behaviour here. It's also different from GCC 10.1 and earlier, where the unsigned vector “won” in its original form. This patch instead merges only the attributes that don't affect type identity. For now I've restricted it to vector types, since we're so close to GCC 11, but it might make sense to use this elsewhere. I've tried to audit the C and target-specific attributes to look for other types that might be affected by this, but I couldn't see any. The closest was s390_vector_bool, but the handler for that attribute changes the type node and drops the attribute itself (*no_add_attrs = true). gcc/ PR c++/98852 * attribs.h (restrict_type_identity_attributes_to): Declare. * attribs.c (restrict_type_identity_attributes_to): New function. gcc/cp/ PR c++/98852 * typeck.c (merge_type_attributes_from): New function. (cp_common_type): Use it for vector types.
2021-04-15c: Don't drop vector attributes that affect type identity [PR98852]Richard Sandiford4-2/+193
<arm_neon.h> types are distinct from GNU vector types in at least their mangling. However, there used to be nothing explicit in the VECTOR_TYPE itself to indicate the difference: we simply treated them as distinct TYPE_MAIN_VARIANTs. This caused problems like the ones reported in PR95726. The fix for that PR was to add type attributes to the <arm_neon.h> types, in order to maintain the distinction between them and GNU vectors. However, this in turn caused PR98852, where c_common_type would unconditionally drop the attributes on the source types. This meant that: <arm_neon.h> vector + <arm_neon.h> vector had a GNU vector type rather than an <arm_neon.h> vector type. See https://gcc.gnu.org/bugzilla/show_bug.cgi?id=96377#c2 for Jakub's analysis of the history of this c_common_type code. TBH I'm not sure which case the build_type_attribute_variant code is handling, but I think we should at least avoid dropping attributes that affect type identity. I've tried to audit the C and target-specific attributes to look for other types that might be affected by this, but I couldn't see any. We are only dealing with: gcc_assert (code1 == VECTOR_TYPE || code1 == COMPLEX_TYPE || code1 == FIXED_POINT_TYPE || code1 == REAL_TYPE || code1 == INTEGER_TYPE); which excludes most affects_type_identity attributes. The closest was s390_vector_bool, but the handler for that attribute changes the type node and drops the attribute itself (*no_add_attrs = true). I put the main list handling into a separate function (remove_attributes_matching) because a later patch will need it for something else. gcc/ PR c/98852 * attribs.h (affects_type_identity_attributes): Declare. * attribs.c (remove_attributes_matching): New function. (affects_type_identity_attributes): Likewise. gcc/c/ PR c/98852 * c-typeck.c (c_common_type): Do not drop attributes that affect type identity. gcc/testsuite/ PR c/98852 * gcc.target/aarch64/advsimd-intrinsics/pr98852.c: New test.
2021-04-15Fix handling of clones in lto_wpa_write_files [PR98599]Jan Hubicka1-1/+1
2021-04-15 Jan Hubicka <hubicka@ucw.cz> PR lto/98599 * lto.c (lto_wpa_write_files): Fix handling of clones.
2021-04-15aarch64: Fix several *<LOGICAL:optab>_ashl<mode>3 related regressions [PR100056]Jakub Jelinek2-0/+111
Before combiner added 2 to 2 combinations, the following testcase functions have been all compiled into 2 instructions, zero/sign extensions or and followed by orr with lsl, e.g. for the first function Trying 7 -> 8: 7: r96:SI=r94:SI<<0xb 8: r95:SI=r96:SI|r94:SI REG_DEAD r96:SI REG_DEAD r94:SI Successfully matched this instruction: (set (reg:SI 95) (ior:SI (ashift:SI (reg/v:SI 94 [ i ]) (const_int 11 [0xb])) (reg/v:SI 94 [ i ]))) is the important successful try_combine and so we end up with and w0, w0, 255 orr w0, w0, w0, lsl 11 in the body. With 2 to 2 combination, before that can trigger, another successful combination: Trying 2 -> 7: 2: r94:SI=zero_extend(x0:QI) REG_DEAD x0:QI 7: r96:SI=r94:SI<<0xb is replaced with: (set (reg/v:SI 94 [ i ]) (zero_extend:SI (reg:QI 0 x0 [ i ]))) and (set (reg:SI 96) (and:SI (ashift:SI (reg:SI 0 x0 [ i ]) (const_int 11 [0xb])) (const_int 522240 [0x7f800]))) and in the end results in 3 instructions in the body: and w1, w0, 255 ubfiz w0, w0, 11, 8 orr w0, w0, w1 The following combine splitters help undo that when combiner tries to combine 3 instructions - the zero/sign extend or and, the other insn from the 2 to 2 combination ([us]bfiz) and the logical op, the CPUs don't have an insn to do everything in one op, but we can split it back into the zero/sign extend or and followed by logical with lsl. 2021-04-15 Jakub Jelinek <jakub@redhat.com> PR target/100056 * config/aarch64/aarch64.md (*<LOGICAL:optab>_<SHIFT:optab><mode>3): Add combine splitters for *<LOGICAL:optab>_ashl<mode>3 with ZERO_EXTEND, SIGN_EXTEND or AND. * gcc.target/aarch64/pr100056.c: New test.
2021-04-15Fortran: Fix class reallocate on assignment [PR99307].Paul Thomas5-169/+177
2021-04-15 Paul Thomas <pault@gcc.gnu.org> gcc/fortran PR fortran/99307 * symbol.c: Remove trailing white space. * trans-array.c (gfc_trans_create_temp_array): Create a class temporary for class expressions and assign the new descriptor to the data field. (build_class_array_ref): If the class expr can be extracted, then use that for 'decl'. Class function results are reliably handled this way. Call gfc_find_and_cut_at_last_class_ref to eliminate largely redundant code. Remove dead code and recast the rest of the code to extract 'decl' for remaining cases. Call gfc_build_spanned_array_ref. (gfc_alloc_allocatable_for_assignment): Use class descriptor element length for 'elemsize1'. Eliminate repeat set of dtype for class expressions. * trans-expr.c (gfc_find_and_cut_at_last_class_ref): Include additional code from build_class_array_ref, and use optional gfc_typespec pointer argument. (gfc_trans_scalar_assign): Make use of pre and post blocks for all class expressions. * trans.c (get_array_span): For unlimited polymorphic exprs multiply the span by the value of the _len field. (gfc_build_spanned_array_ref): New function. (gfc_build_array_ref): Call gfc_build_spanned_array_ref and eliminate repeated code. * trans.h: Add arg to gfc_find_and_cut_at_last_class_ref and add prototype for gfc_build_spanned_array_ref.
2021-04-15re PR tree-optimization/93210 (Sub-optimal code optimization on ↵Stefan Schulze Frielinghaus1-1/+1
struct/combound constexpr (gcc vs. clang)) Regarding test gcc.dg/pr93210.c, on different targets GIMPLE code may slightly differ which is why the scan-tree-dump-times directive may fail. For example, for a RETURN_EXPR on x86_64 we have return 0x11100f0e0d0c0a090807060504030201; whereas on IBM Z the first operand is a RESULT_DECL like <retval> = 0x102030405060708090a0c0d0e0f1011; return <retval>; gcc/testsuite/ChangeLog: * gcc.dg/pr93210.c: Adapt regex in order to also support a RESULT_DECL as an operand for a RETURN_EXPR.
2021-04-15Daily bump.GCC Administrator6-1/+269
2021-04-14Check for matching CONST_VECTOR encodings [PR99929]Richard Sandiford9-0/+73
PR99929 is one of those “how did we get away with this for so long” bugs: the equality routines weren't checking whether two variable-length CONST_VECTORs had the same encoding. This meant that: { 1, 0, 0, 0, 0, 0, ... } would appear to be equal to: { 1, 0, 1, 0, 1, 0, ... } since both are represented using the elements { 1, 0 }. gcc/ PR rtl-optimization/99929 * rtl.h (same_vector_encodings_p): New function. * cse.c (exp_equiv_p): Check that CONST_VECTORs have the same encoding. * cselib.c (rtx_equal_for_cselib_1): Likewise. * jump.c (rtx_renumbered_equal_p): Likewise. * lra-constraints.c (operands_match_p): Likewise. * reload.c (operands_match_p): Likewise. * rtl.c (rtx_equal_p_cb, rtx_equal_p): Likewise. gcc/testsuite/ * gcc.target/aarch64/sve/pr99929_1.c: New file. * gcc.target/aarch64/sve/pr99929_2.c: Likewise.
2021-04-14Better const_vector printingRichard Sandiford1-1/+31
Looking at PR99929 showed that we weren't dumping enough information about variable-length CONST_VECTORs. Something like: (const_vector:VNx4SI [(const_int 1) (const_int 0)]) could be either: (a) 1, 0, 1, 0, repeating (b) 1 followed by all zeros This patch adds more information to the dumps. There are four cases: (a) above: (const_vector:VNx4SI repeat [ (const_int 1) (const_int 0) ]) (b) above: (const_vector:VNx4SI [ (const_int 1) repeat [ (const_int 0) ] ]) a single stepped sequence: (const_vector:VNx4SI [ (const_int 0) stepped [ (const_int 1) (const_int 2) ] ]) interleaved stepped sequences: (const_vector:VNx4SI [ (const_int 0) (const_int 40) stepped (interleave 2) [ (const_int 1) (const_int 41) (const_int 2) (const_int 42) ] ]) There are probably better syntaxes, but hopefully this is at least an improvement on the status quo. gcc/ * print-rtl.c (rtx_writer::print_rtx_operand_codes_E_and_V): Print more information about variable-length CONST_VECTORs.
2021-04-14c++: premature overload resolution redux [PR100078]Jason Merrill2-0/+15
My patch for PR93085 didn't consider that a default template argument can also make a template dependent. gcc/cp/ChangeLog: PR c++/100078 PR c++/93085 * pt.c (uses_outer_template_parms): Also look at default template argument. gcc/testsuite/ChangeLog: PR c++/100078 * g++.dg/template/dependent-tmpl2.C: New test.
2021-04-14c++: non-static member, array bound, sizeof [PR93314]Jason Merrill2-0/+24
N2253 allowed referring to non-static data members without an object in unevaluated operands like that of sizeof, but in a constant-expression context like an array bound or template argument within such an unevaluated operand we do actually need a value, so that permission cannot apply. gcc/cp/ChangeLog: PR c++/93314 * semantics.c (finish_id_expression_1): Clear cp_unevaluated_operand for a non-static data member in a constant-expression. gcc/testsuite/ChangeLog: PR c++/93314 * g++.dg/parse/uneval1.C: New test.
2021-04-14[PR100066] Check paradoxical subreg when splitting hard reg live rangeVladimir N. Makarov2-4/+21
When splitting live range of a hard reg, LRA actually split multi-register containing the hard reg. So we need to check the biggest used mode of the hard reg on paradoxical subregister when the natural and the biggest mode are ordered. gcc/ChangeLog: PR rtl-optimization/100066 * lra-constraints.c (split_reg): Check paradoxical_subreg_p for ordered modes when choosing splitting mode for hard reg. gcc/testsuite/ChangeLog: PR rtl-optimization/100066 * gcc.target/i386/pr100066.c: New.
2021-04-14PR testsuite/100073 - test case gcc.dg/pr86058.c fails on arm, powerpc64Martin Sebor1-4/+5
gcc/testsuite/ChangeLog: * gcc.dg/pr86058.c: Limit to just x86_64.
2021-04-14aarch64: Handle more SVE vector constants [PR99246]Richard Sandiford2-0/+71
PR99246 is about a case in which we failed to handle a CONST_VECTOR with NELTS_PER_PATTERN==2, i.e. a vector with a “foreground” sequence of N vectors followed by a repeating “background” sequence of N vectors. At the moment, it's difficult to produce these vectors directly, but I'm hoping that for GCC 12 we'll do more folding, which will in turn make this easier to test and easier to optimise. Until then, the patch simply relies on the testcase in the PR. gcc/ PR target/99246 * config/aarch64/aarch64.c (aarch64_expand_sve_const_vector_sel): New function. (aarch64_expand_sve_const_vector): Use it for nelts_per_pattern==2. gcc/testsuite/ PR target/99246 * gcc.target/aarch64/sve/acle/general/pr99246.c: New test.
2021-04-14IBM Z: Fix error checking for immediate builtin operandsAndreas Krebbel4-35/+156
This fixes the error checking for two of the vector builtins which accept irregular (e.g. non-contigiuous) ranges of values. gcc/ChangeLog: * config/s390/s390-builtins.def (O_M5, O_M12, ...): Add new macros for mask operand types. (s390_vec_permi_s64, s390_vec_permi_b64, s390_vec_permi_u64) (s390_vec_permi_dbl, s390_vpdi): Use the M5 type for the immediate operand. (s390_vec_msum_u128, s390_vmslg): Use the M12 type for the immediate operand. * config/s390/s390.c (s390_const_operand_ok): Check the new operand types and generate a list of valid values. gcc/testsuite/ChangeLog: * gcc.target/s390/zvector/imm-range-error-1.c: New test. * gcc.target/s390/zvector/vec_msum_u128-1.c: New test.
2021-04-14d: Add TARGET_D_REGISTER_OS_TARGET_INFOIain Buclaw4-0/+16
This allows target platforms that have D support files to defined their own target-specific information keys. gcc/ChangeLog: * doc/tm.texi: Regenerate. * doc/tm.texi.in (D language and ABI): Add @hook for TARGET_D_REGISTER_OS_TARGET_INFO. gcc/d/ChangeLog: * d-target.cc (Target::_init): Call new targetdm hook to register OS specific target info keys. * d-target.def (d_register_os_target_info): New hook.
2021-04-14c++: Fix deduction with reference NTTP [PR83476]Patrick Palka3-2/+29
In the testcase ref11.C below, during deduction for the call f(a), uses_deducible_template_parms returns false for the dependent specialization A<V> because the generic template argument V here is wrapped in an implicit INDIRECT_REF (formed from template_parm_to_arg). Since uses_deducible_template_parms returns false, unify_one_argument exits early without ever attempting to deduce 'n' for 'V'. This patch fixes this by making deducible_expression look through such implicit INDIRECT_REFs. gcc/cp/ChangeLog: PR c++/83476 PR c++/99885 * pt.c (deducible_expression): Look through implicit INDIRECT_REFs as well. gcc/testsuite/ChangeLog: PR c++/83476 PR c++/99885 * g++.dg/cpp1z/class-deduction85.C: New test. * g++.dg/template/ref11.C: New test.