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This patch adds a helper routine that constructs rtxes
for constant shift amounts, given the mode of the value
being shifted. As well as helping with the SVE patches, this
is one step towards allowing CONST_INTs to have a real mode.
One long-standing problem has been to decide what the mode
of a shift count should be for arbitrary rtxes (as opposed to those
directly tied to a target pattern). Realistic choices would be
the mode of the shifted elements, word_mode, QImode, a 64-bit mode,
or the same mode as the shift optabs (in which case what should the
mode be when the target doesn't have a pattern?)
For now the patch picks a 64-bit mode, but with a ??? comment.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
Alan Hayward <alan.hayward@arm.com>
David Sherwood <david.sherwood@arm.com>
gcc/
* emit-rtl.h (gen_int_shift_amount): Declare.
* emit-rtl.c (gen_int_shift_amount): New function.
* asan.c (asan_emit_stack_protection): Use gen_int_shift_amount
instead of GEN_INT.
* calls.c (shift_return_value): Likewise.
* cse.c (fold_rtx): Likewise.
* dse.c (find_shift_sequence): Likewise.
* expmed.c (init_expmed_one_mode, store_bit_field_1, expand_shift_1)
(expand_shift, expand_smod_pow2): Likewise.
* lower-subreg.c (shift_cost): Likewise.
* optabs.c (expand_superword_shift, expand_doubleword_mult)
(expand_unop, expand_binop, shift_amt_for_vec_perm_mask)
(expand_vec_perm_var): Likewise.
* simplify-rtx.c (simplify_unary_operation_1): Likewise.
(simplify_binary_operation_1): Likewise.
* combine.c (try_combine, find_split_point, force_int_to_mode)
(simplify_shift_const_1, simplify_shift_const): Likewise.
(change_zero_ext): Likewise. Use simplify_gen_binary.
Co-Authored-By: Alan Hayward <alan.hayward@arm.com>
Co-Authored-By: David Sherwood <david.sherwood@arm.com>
From-SVN: r255861
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Fix a stupid inversion. This function is very rarely used and was
mostly to help split patches up, which is why it didn't get picked
up during initial testing.
2017-12-20 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* poly-int.h (multiple_p): Fix handling of two non-poly_ints.
gcc/testsuite/
* gcc.dg/plugin/poly-int-tests.h (test_nonpoly_multiple_p): New
function.
(test_nonpoly_type): Call it.
From-SVN: r255860
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I noticed that we helpfully list the extensions that are accepted
by the -march options on arm but we were missing the information
for 'armv8.3-a'.
This patchlet corrects that.
Built the documentation and it looked ok.
* doc/invoke.texi (ARM Options): Document accepted extension options
for -march=armv8.3-a.
From-SVN: r255859
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When GCC for ARM/linux is configured with --with-float=hard, or
--with-float=softfp the compiler will now die when trying to build the
support libraries because the baseline architecture is too old to
support VFP (older versions of GCC just emitted the VFP instructions
anyway, even though they wouldn't run on that version of the
architecture; but we're now more prickly about it).
This patch fixed the problem by raising the default architecture
(actually the default CPU) to ARMv5te (ARM10e) when we need to generate
HW floating-point code.
PR target/83105
* config.gcc (arm*-*-linux*): When configured with --with-float=hard
or --with-float=softfp, set the default CPU to arm10e.
From-SVN: r255858
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* config/visium/constraints.md (J, K, L): Use IN_RANGE macro.
* config/visium/predicates.md (const_shift_operand): Likewise.
* config/visium/visium.c (visium_legitimize_address): Fix oversight.
(visium_legitimize_reload_address): Likewise.
From-SVN: r255856
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* Committing ChangeLog entry.
From-SVN: r255855
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* gcc-interface/trans.c (Loop_Statement_to_gnu): Use IN_RANGE macro.
* gcc-interface/misc.c (gnat_get_array_descr_info): Likewise.
(default_pass_by_ref): Likewise.
* gcc-interface/decl.c (gnat_to_gnu_entity): Likewise.
From-SVN: r255854
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Commit missing hunk to arm.h TEST_REGNO comment.
PR target/82975
* config/arm/arm.h (TEST_REGNO): Adjust comment as expected in
r255830.
From-SVN: r255853
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PR c++/83490
* calls.c (compute_argument_addresses): Ignore TYPE_EMPTY_P arguments.
* g++.dg/abi/empty29.C: New test.
From-SVN: r255852
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2017-12-20 Martin Liska <mliska@suse.cz>
PR middle-end/82404
* g++.dg/pr82404.C: New test.
* gcc.dg/pr82404.c: New test.
From-SVN: r255851
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gcc/
* common/config/i386/i386-common.c (OPTION_MASK_ISA_VPCLMULQDQ_SET,
OPTION_MASK_ISA_VPCLMULQDQ_UNSET): New.
(ix86_handle_option): Handle -mvpclmulqdq, move cx6 to flags2.
* config.gcc: Include vpclmulqdqintrin.h.
* config/i386/cpuid.h: Handle bit_VPCLMULQDQ.
* config/i386/driver-i386.c (host_detect_local_cpu): Handle -mvpclmulqdq.
* config/i386/i386-builtin.def (__builtin_ia32_vpclmulqdq_v2di,
__builtin_ia32_vpclmulqdq_v4di, __builtin_ia32_vpclmulqdq_v8di): New.
* config/i386/i386-c.c (__VPCLMULQDQ__): New.
* config/i386/i386.c (isa2_opts): Add -mcx16.
(isa_opts): Add -mpclmulqdq, remove -mcx16.
(ix86_option_override_internal): Move mcx16 to flags2.
(ix86_valid_target_attribute_inner_p): Add vpclmulqdq.
(ix86_expand_builtin): Handle OPTION_MASK_ISA_VPCLMULQDQ.
* config/i386/i386.h (TARGET_VPCLMULQDQ, TARGET_VPCLMULQDQ_P): New.
* config/i386/i386.opt: Add mvpclmulqdq, move mcx16 to flags2.
* config/i386/immintrin.h: Include vpclmulqdqintrin.h.
* config/i386/sse.md (vpclmulqdq_<mode>): New pattern.
* config/i386/vpclmulqdqintrin.h (_mm512_clmulepi64_epi128,
_mm_clmulepi64_epi128, _mm256_clmulepi64_epi128): New intrinsics.
* doc/invoke.texi: Add -mvpclmulqdq.
gcc/testsuite/
* gcc.target/i386/avx-1.c: Handle new intrinsics.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.
* gcc.target/i386/avx512-check.h: Handle bit_VPCLMULQDQ.
* gcc.target/i386/avx512f-vpclmulqdq-2.c: New test.
* gcc.target/i386/avx512vl-vpclmulqdq-2.c: Ditto.
* gcc.target/i386/vpclmulqdq.c: Ditto.
* gcc.target/i386/i386.exp (check_effective_target_vpclmulqdq): New.
From-SVN: r255850
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2017-12-20 Tom de Vries <tom@codesourcery.com>
PR middle-end/83423
* config/i386/i386.c (ix86_static_chain): Move DECL_STATIC_CHAIN test ...
* calls.c (rtx_for_static_chain): ... here. New function.
* calls.h (rtx_for_static_chain): Declare.
* builtins.c (expand_builtin_setjmp_receiver): Use rtx_for_static_chain
instead of targetm.calls.static_chain.
* df-scan.c (df_get_entry_block_def_set): Same.
From-SVN: r255849
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From-SVN: r255848
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at cp/typeck2.c:1294)
/cp
2017-12-19 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/82593
* decl.c (check_array_designated_initializer): Not static.
* cp-tree.h (check_array_designated_initializer): Declare.
* typeck2.c (process_init_constructor_array): Call the latter.
* parser.c (cp_parser_initializer_list): Check the return value
of require_potential_rvalue_constant_expression.
/testsuite
2017-12-19 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/82593
* g++.dg/cpp0x/desig2.C: New.
* g++.dg/cpp0x/desig3.C: Likewise.
* g++.dg/cpp0x/desig4.C: Likewise.
From-SVN: r255845
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PR c++/83394 - always_inline vs. noinline no longer diagnosed
PR c++/83322 - ICE: tree check: expected class ‘type’, have ‘exceptional’
gcc/cp/ChangeLog:
PR c++/83394
PR c++/83322
* decl2.c (cplus_decl_attributes): Look up member functions
in the scope of their class.
gcc/testsuite/ChangeLog:
PR c++/83394
* g++.dg/Wattributes-3.C: New test.
* g++.dg/Wattributes-4.C: New test.
* g++.dg/Wattributes-5.C: New test.
From-SVN: r255844
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PR target/82975
* gcc.dg/pr82975.c: Only add -mtune=cortex-a57 on arm*/aarch64*
targets.
From-SVN: r255843
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2017-12-19 Tom de Vries <tom@codesourcery.com>
PR tree-optimization/83493
* graphite-isl-ast-to-gimple.c (translate_isl_ast_node_for): Unshare ub
and lb.
From-SVN: r255842
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hardcoded english plural handling.
* gimple-ssa-sprintf.c (format_directive): Use inform_n instead of
inform with hardcoded english plural handling.
From-SVN: r255840
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type depends on a non-type `auto` template parameter from function arguments)
PR c++/82231
* g++.dg/cpp1z/nontype-auto14.C: New test.
From-SVN: r255839
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PR tree-optimization/83477
* tree-ssa-threadedge.c (record_temporary_equivalences_from_phis): For
a non-virtual PHI, always push a new range.
PR tree-optimization/83477
* gcc.c-torture/execute/pr83477.c: New test.
From-SVN: r255837
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buffer overflow
gcc/ChangeLog:
PR middle-end/77608
* builtins.c (compute_objsize): Handle non-constant offsets.
gcc/testsuite/ChangeLog:
PR middle-end/77608
* gcc.dg/Wstringop-overflow.c: New test.
* gcc/testsuite/c-c++-common/Warray-bounds-3.c: Adjust.
From-SVN: r255836
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of a local struct)
PR tree-optimization/83444
* tree-ssa-strlen.c (strlen_check_and_optimize_stmt): For the
character load case, if get_stridx on MEM_REF's operand doesn't
look usable, retry with get_addr_stridx.
* gcc.dg/strlenopt-38.c: New test.
From-SVN: r255835
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Although debug markers are more useful when bind stmts are placed
among them, there is value in keeping them even when VTA limits are
exceeded.
for gcc/ChangeLog
PR debug/83422
* var-tracking.c (vt_debug_insns_local): Do not drop markers.
(variable_tracking_main_1): Keep markers even when VTA fails.
for gcc/testsuite/ChangeLog
PR debug/83422
* gcc.dg/pr83422.c: New.
From-SVN: r255834
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Emitting markers before labels turned out to not be worth the trouble.
The markers outside BBs confuse the ebb scheduler, and they don't add
any useful information. I'll arrange for markers to be moved past
labels, even in gimple, but for now this will fix the two remaining
known problems on ia64.
for gcc/ChangeLog
PR bootstrap/83396
* cfgexpand.c (expand_gimple_basic_block): Expand label first,
even if there are markers before it.
* cfgrtl.c (rtl_verify_bb_layout): Reject DEBUG_INSNs outside BBs.
From-SVN: r255833
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PR testsuite/83454
* gcc.dg/tree-ssa/cswtch-4.c: Require nonpic effective target.
* gcc.dg/tree-ssa/cswtch-5.c: Likewise.
From-SVN: r255832
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conditions.
* read-rtl.c (parse_reg_note_name): Replace Yoda conditions with
typical order conditions.
* sel-sched.c (extract_new_fences_from): Likewise.
* config/visium/constraints.md (J, K, L): Likewise.
* config/visium/predicates.md (const_shift_operand): Likewise.
* config/visium/visium.c (visium_legitimize_address,
visium_legitimize_reload_address): Likewise.
* config/m68k/m68k.c (output_reg_adjust, emit_reg_adjust): Likewise.
* config/arm/arm.c (arm_block_move_unaligned_straight): Likewise.
* config/avr/constraints.md (Y01, Ym1, Y02, Ym2): Likewise.
* config/avr/avr-log.c (avr_vdump, avr_log_set_avr_log,
SET_DUMP_DETAIL): Likewise.
* config/avr/predicates.md (const_8_16_24_operand): Likewise.
* config/avr/avr.c (STR_PREFIX_P, avr_popcount_each_byte,
avr_is_casesi_sequence, avr_casei_sequence_check_operands,
avr_set_core_architecture, avr_set_current_function,
avr_legitimize_reload_address, avr_asm_len, avr_print_operand,
output_movqi, output_movsisf, avr_out_plus, avr_out_bitop,
avr_out_fract, avr_adjust_insn_length, avr_encode_section_info,
avr_2word_insn_p, output_reload_in_const, avr_has_nibble_0xf,
avr_map_decompose, avr_fold_builtin): Likewise.
* config/avr/driver-avr.c (avr_devicespecs_file): Likewise.
* config/avr/gen-avr-mmcu-specs.c (str_prefix_p, print_mcu): Likewise.
* config/i386/i386.c (ix86_parse_stringop_strategy_string): Likewise.
* config/m32c/m32c-pragma.c (m32c_pragma_memregs): Likewise.
* config/m32c/m32c.c (m32c_conditional_register_usage,
m32c_address_cost): Likewise.
* config/m32c/predicates.md (shiftcount_operand,
longshiftcount_operand): Likewise.
* config/iq2000/iq2000.c (iq2000_expand_prologue): Likewise.
* config/nios2/nios2.c (nios2_handle_custom_fpu_insn_option,
can_use_cdx_ldstw): Likewise.
* config/nios2/nios2.h (CDX_REG_P): Likewise.
* config/cr16/cr16.h (RETURN_ADDR_RTX, REGNO_MODE_OK_FOR_BASE_P):
Likewise.
* config/cr16/cr16.md (*mov<mode>_double): Likewise.
* config/cr16/cr16.c (cr16_create_dwarf_for_multi_push): Likewise.
* config/h8300/h8300.c (h8300_rtx_costs, get_shift_alg): Likewise.
* config/vax/constraints.md (U06, U08, U16, CN6, S08, S16): Likewise.
* config/vax/vax.c (adjacent_operands_p): Likewise.
* config/ft32/constraints.md (L, b, KA): Likewise.
* config/ft32/ft32.c (ft32_load_immediate, ft32_expand_prologue):
Likewise.
* cfgexpand.c (expand_stack_alignment): Likewise.
* gcse.c (insert_expr_in_table): Likewise.
* print-rtl.c (rtx_writer::print_rtx_operand_codes_E_and_V): Likewise.
* cgraphunit.c (cgraph_node::expand): Likewise.
* ira-build.c (setup_min_max_allocno_live_range_point): Likewise.
* emit-rtl.c (add_insn): Likewise.
* input.c (dump_location_info): Likewise.
* passes.c (NEXT_PASS): Likewise.
* read-rtl-function.c (parse_note_insn_name,
function_reader::read_rtx_operand_r, function_reader::parse_mem_expr):
Likewise.
* sched-rgn.c (sched_rgn_init): Likewise.
* diagnostic-show-locus.c (layout::show_ruler): Likewise.
* combine.c (find_split_point, simplify_if_then_else, force_to_mode,
if_then_else_cond, simplify_shift_const_1, simplify_comparison): Likewise.
* explow.c (eliminate_constant_term): Likewise.
* final.c (leaf_renumber_regs_insn): Likewise.
* cfgrtl.c (print_rtl_with_bb): Likewise.
* genhooks.c (emit_init_macros): Likewise.
* poly-int.h (maybe_ne, maybe_le, maybe_lt): Likewise.
* tree-data-ref.c (conflict_fn): Likewise.
* selftest.c (assert_streq): Likewise.
* expr.c (store_constructor_field, expand_expr_real_1): Likewise.
* fold-const.c (fold_range_test, extract_muldiv_1, fold_truth_andor,
fold_binary_loc, multiple_of_p): Likewise.
* reload.c (push_reload, find_equiv_reg): Likewise.
* et-forest.c (et_nca, et_below): Likewise.
* dbxout.c (dbxout_symbol_location): Likewise.
* reorg.c (relax_delay_slots): Likewise.
* dojump.c (do_compare_rtx_and_jump): Likewise.
* gengtype-parse.c (type): Likewise.
* simplify-rtx.c (simplify_gen_ternary, simplify_gen_relational,
simplify_const_relational_operation): Likewise.
* reload1.c (do_output_reload): Likewise.
* dumpfile.c (get_dump_file_info_by_switch): Likewise.
* gengtype.c (type_for_name): Likewise.
* gimple-ssa-sprintf.c (format_directive): Likewise.
ada/
* gcc-interface/trans.c (Loop_Statement_to_gnu): Replace Yoda
conditions with typical order conditions.
* gcc-interface/misc.c (gnat_get_array_descr_info,
default_pass_by_ref): Likewise.
* gcc-interface/decl.c (gnat_to_gnu_entity): Likewise.
* adaint.c (__gnat_tmp_name): Likewise.
c-family/
* known-headers.cc (get_stdlib_header_for_name): Replace Yoda
conditions with typical order conditions.
c/
* c-typeck.c (comptypes_internal, function_types_compatible_p,
perform_integral_promotions, digest_init): Replace Yoda conditions
with typical order conditions.
* c-decl.c (check_bitfield_type_and_width): Likewise.
cp/
* name-lookup.c (get_std_name_hint): Replace Yoda conditions with
typical order conditions.
* class.c (check_bitfield_decl): Likewise.
* pt.c (convert_template_argument): Likewise.
* decl.c (duplicate_decls): Likewise.
* typeck.c (commonparms): Likewise.
fortran/
* scanner.c (preprocessor_line): Replace Yoda conditions with typical
order conditions.
* dependency.c (check_section_vs_section): Likewise.
* trans-array.c (gfc_conv_expr_descriptor): Likewise.
jit/
* jit-playback.c (get_type, playback::compile_to_file::copy_file,
playback::context::acquire_mutex): Replace Yoda conditions with
typical order conditions.
* libgccjit.c (gcc_jit_context_new_struct_type,
gcc_jit_struct_set_fields, gcc_jit_context_new_union_type,
gcc_jit_context_new_function, gcc_jit_timer_pop): Likewise.
* jit-builtins.c (matches_builtin): Likewise.
* jit-recording.c (recording::compound_type::set_fields,
recording::fields::write_reproducer, recording::rvalue::set_scope,
recording::function::validate): Likewise.
* jit-logging.c (logger::decref): Likewise.
From-SVN: r255831
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In this bug we ICE when checking REGNO_OK_FOR_INDEX_P on arm during pre-IRA scheduling.
This is because REGNO_OK_FOR_INDEX_P ends up checking the reg_renumber array.
Before IRA reg_renumber is NULL and thus we segfault.
The fix is to guard the use of reg_renumber in the logic in TEST_REGNO in arm.h.
On aarch64, for example, we also guard against the reg_renumber == NULL case.
This fixes the ICE. I also remove the part of the comment that muses on when reg_renumber
is available as with this patch it should now be safe to use at any point.
Bootstrapped and tested on arm-none-linux-gnueabihf.
PR target/82975
* config/arm/arm.h (TEST_REGNO): Check reg_renumber is set before
accessing it. Adjust comment.
* gcc.dg/pr82975.c: New test.
From-SVN: r255830
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branchless in earlier gcc version)
PR middle-end/81914
* predict.c (zero_one_minusone): New function.
(apply_return_prediction): Avoid return prediction for functions
returning only -1, 0 and 1 values, unless they only return -1 and 0
or 0 and 1.
From-SVN: r255829
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2017-12-19 Claudiu Zissulescu <claziss@synopsys.com>
* config/arc/arc.c (legitimate_scaled_address_p): Clean
fall-through warning.
(arc_compute_frame_size): Remove unused variables.
(arc_print_operand): Fix fprintif format.
(arc_can_follow_jump): Clean fall-through warning.
From-SVN: r255827
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From-SVN: r255826
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From-SVN: r255825
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PR c++/83490
* config/i386/i386.c (init_cumulative_args): Don't check TYPE_EMPTY_P
on an error node.
* g++.dg/abi/pr83490.C: New test.
From-SVN: r255824
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From-SVN: r255823
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PR middle-end/83471
* g++.dg/torture/pr83471.C: New test.
From-SVN: r255821
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https://gcc.gnu.org/ml/gcc-patches/2017-12/msg00377.html
* opts.c (finish_options): Don't prefix dump_base_name if it
already contains directories.
From-SVN: r255820
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2017-12-19 Martin Liska <mliska@suse.cz>
* gcc.dg/tree-prof/switch-case-1.c: Scan IPA profile dump
file instead of expand in order to not mix it with expanded
tree decision tree for the switch statement.
From-SVN: r255819
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2017-12-19 Martin Liska <mliska@suse.cz>
PR rtl-optimization/82675
* loop-unroll.c (unroll_loop_constant_iterations): Allocate one
more element in sbitmap.
From-SVN: r255818
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PR tree-optimization/83482
* g++.dg/torture/pr83482.C: New test.
From-SVN: r255817
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2017-12-19 Paolo Carlini <paolo.carlini@oracle.com>
* gimplify.c (gimplify_expr): Use error_operand_p.
From-SVN: r255816
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2017-12-19 Paolo Carlini <paolo.carlini@oracle.com>
* cp-tree.h: Fix typo in comment.
From-SVN: r255815
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2017-12-19 Martin Jambor <mjambor@suse.cz>
PR tree-optimization/83329
* gcc.dg/tree-ssa/pr83329.c: New test
From-SVN: r255814
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framework header)
2017-12-19 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/79490
* g++.dg/other/fsyntax-only2.C: New.
From-SVN: r255812
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enabled in restricted runtime)
PR ada/66205
* bindgen.adb (Gen_AdaFinal): Revert previous change.
From-SVN: r255811
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gcc/
PR target/83387
* config/rs6000/t-rtems (MULTILIB_REQUIRED): Remove 64-bit soft-float
multilib.
From-SVN: r255809
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In some cases the jump could be to a return instruction and in those cases the
next_active_insn() function tries to follow an invalid pointer which leads to a
crash. This error did not manifest when using a 32-bit version of GCC which is
why I did not detect it before.
gcc/
* config/sparc/sparc.c (sparc_do_work_around_errata): Make sure
the jump is to a label.
From-SVN: r255807
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of a local struct)
PR tree-optimization/83444
* tree-ssa-strlen.c (strlen_check_and_optimize_stmt): Optimize
character loads.
* gcc.dg/strlenopt-38.c: New test.
From-SVN: r255806
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__attribute__((always_inline, flatten)))
PR ipa/82801
PR ipa/83346
* ipa-inline.c (flatten_remove_node_hook): New function.
(ipa_inline): Keep only nodes with flatten attribute at the end of
the array in the order from ipa_reverse_postorder, only walk that
portion of array for flattening, if there is more than one such
node, temporarily register a removal hook and ignore removed nodes.
* g++.dg/ipa/pr82801.C: New test.
From-SVN: r255805
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PR tree-optimization/80631
* tree-vect-loop.c (vect_create_epilog_for_reduction): Compare
induc_code against MAX_EXPR or MIN_EXPR instead of reduc_fn against
IFN_REDUC_MAX or IFN_REDUC_MIN.
From-SVN: r255804
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equivalences from backedges in the CFG.
* tree-ssa-dom.c (record_equivalences_from_phis): Do not
record symbolic equivalences from backedges in the CFG.
From-SVN: r255803
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2017-11-19 Jeff Law <law@redhat.com>
* tree-ssa-dom.c (record_equivalences_from_phis): Fix handling
of degenerates resulting from ignoring an edge.
From-SVN: r255802
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