aboutsummaryrefslogtreecommitdiff
path: root/gcc
AgeCommit message (Collapse)AuthorFilesLines
2017-06-21[i386] __builtin_ia32_stmxcsr could be pureMarc Glisse4-5/+66
2017-06-21 Marc Glisse <marc.glisse@inria.fr> gcc/ * config/i386/i386.c (struct builtin_isa): New field pure_p. Reorder for compactness. (def_builtin, def_builtin2, ix86_add_new_builtins): Handle pure_p. (def_builtin_pure, def_builtin_pure2): New functions. (ix86_init_mmx_sse_builtins) [__builtin_ia32_stmxcsr]: Mark as pure. gcc/testsuite/ * gcc.target/i386/getround.c: New file. From-SVN: r249448
2017-06-21NOP conversions in X+CST+CSTMarc Glisse5-12/+77
2017-06-21 Marc Glisse <marc.glisse@inria.fr> gcc/ * match.pd (nop_convert): New predicate. ((A +- CST1) +- CST2): Allow some NOP conversions. gcc/testsuite/ * gcc.dg/tree-ssa/addadd.c: Un-XFAIL. * gcc.dg/tree-ssa/addadd-2.c: New file. From-SVN: r249447
2017-06-21re PR c++/81130 (ICE OpenMP shared clause in gimplify_var_or_parm_decl, at ↵Jakub Jelinek2-3/+11
gimplify.c:2584) PR c++/81130 * gimplify.c (omp_add_variable): Don't force GOVD_SEEN for types with ctors/dtors if GOVD_SHARED is set. * testsuite/libgomp.c++/pr81130.C: New test. From-SVN: r249445
2017-06-21Emit SIMD moves as movWilco Dijkstra3-4/+12
SIMD moves are currently emitted as ORR. Change this to use the MOV pseudo instruction just like integer moves (the ARM-ARM states MOV is the preferred disassembly), improving readability of -S output. gcc/ * config/aarch64/aarch64.md (movti_aarch64): Emit mov rather than orr. (movtf_aarch64): Likewise. * config/aarch64/aarch64-simd.md (aarch64_simd_mov): Emit mov rather than orr. From-SVN: r249444
2017-06-21Improve dup patternWilco Dijkstra2-4/+9
Improve the dup pattern to prefer vector registers. When doing a dup after a load, the register allocator thinks the costs are identical and chooses an integer load. However a dup from an integer register includes an int->fp transfer which is not modelled. Adding a '?' to the integer variant means the cost is increased slightly so we prefer using a vector register. This improves the following example: #include <arm_neon.h> void f(unsigned *a, uint32x4_t *b) { b[0] = vdupq_n_u32(a[1]); b[1] = vdupq_n_u32(a[2]); } to: ldr s0, [x0, 4] dup v0.4s, v0.s[0] str q0, [x1] ldr s0, [x0, 8] dup v0.4s, v0.s[0] str q0, [x1, 16] ret gcc/ * config/aarch64/aarch64-simd.md (aarch64_simd_dup): Swap alternatives, make integer dup more expensive. From-SVN: r249443
2017-06-21Mark symbols as constantWilco Dijkstra2-0/+10
Aarch64_legitimate_constant_p currently returns false for symbols, eventhough they are always valid constants. This means LOSYM isn't CSEd correctly. If we return true CSE works better, resulting in smaller/faster code (0.3% smaller code on SPEC2006). Avoid this for TLS symbols since their sequence is complex. gcc/ * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Return true for non-tls symbols. From-SVN: r249442
2017-06-21[Patch AArch64] Add initial tuning support for Cortex-A55 and Cortex-A75James Greenhalgh4-7/+27
This patch adds support for the ARM Cortex-A75 and Cortex-A55 processors through the -mcpu/-mtune values cortex-a55 and cortex-a75, and an ARM DynamIQ big.LITTLE configuration of these two processors through the -mcpu/-mtune value cortex-a75.cortex-a55 The ARM Cortex-A75 is ARM's latest and highest performance applications processor. For the initial tuning provided in this patch, I have chosen to share the tuning structure with its predecessor, the Cortex-A73. The ARM Cortex-A55 delivers the best combination of power efficiency and performance in its class. For the initial tuning provided in this patch, I have chosen to share the tuning structure with its predecessor, the Cortex-A53. Both Cortex-A55 and Cortex-A75 support ARMv8-A with the ARM8.1-A and ARMv8.2-A extensions, along with the cryptography extension, and the RCPC extensions from ARMv8.3-A. This is reflected in the patch, -mcpu=cortex-a75 is treated as equivalent to passing -mtune=cortex-a75 -march=armv8.2-a+rcpc . 2017-06-21 James Greenhalgh <james.greenhalgh@arm.com> * config/aarch64/aarch64-cores.def (cortex-a55): New. (cortex-a75): Likewise. (cortex-a75.cortex-a55): Likewise. * config/aarch64/aarch64-tune.md: Regenerate. * doc/invoke.texi (-mtune): Document new values for -mtune. From-SVN: r249441
2017-06-21Add dg-add-options feature stack_sizeTom de Vries40-41/+105
2017-06-21 Tom de Vries <tom@codesourcery.com> * doc/sourcebuild.texi (Add Options, Features for dg-add-options): Add stack_size feature. (Effective-Target Keywords, Other attributes): Suggest using dg-add-options stack_size feature to get stack limit in stack_size effective target documentation. * lib/target-supports.exp (add_options_for_stack_size): New proc. * gcc.c-torture/execute/920501-7.c: Use dg-add-options stack_size. * gcc.c-torture/compile/20080806-1.c: Same. * gcc.c-torture/compile/920723-1.c: Same. * gcc.c-torture/compile/930621-1.c: Same. * gcc.c-torture/compile/991214-2.c: Same. * gcc.c-torture/compile/bcopy.c: Same. * gcc.c-torture/compile/memtst.c: Same. * gcc.c-torture/compile/msp.c: Same. * gcc.c-torture/compile/stuct.c: Same. * gcc.c-torture/execute/20011008-3.c: Same. * gcc.c-torture/execute/20030209-1.c: Same. * gcc.c-torture/execute/20031012-1.c: Same. * gcc.c-torture/execute/20040805-1.c: Same. * gcc.c-torture/execute/920410-1.c: Same. * gcc.c-torture/execute/921113-1.c: Same. * gcc.c-torture/execute/921202-1.c: Same. * gcc.c-torture/execute/921208-2.c: Same. * gcc.c-torture/execute/930106-1.c: Same. * gcc.c-torture/execute/930406-1.c: Same. * gcc.c-torture/execute/950221-1.c: Same. * gcc.c-torture/execute/960521-1.c: Same. * gcc.c-torture/execute/980605-1.c: Same. * gcc.c-torture/execute/comp-goto-1.c: Same. * gcc.c-torture/execute/comp-goto-2.c: Same. * gcc.c-torture/execute/memcpy-1.c: Same. * gcc.c-torture/execute/multi-ix.c: Same. * gcc.c-torture/execute/nestfunc-4.c: Same. * gcc.c-torture/execute/pr20621-1.c: Same. * gcc.c-torture/execute/pr23135.c: Same. * gcc.c-torture/execute/pr28982b.c: Same. * gcc.dg/loop-3.c: Same. * gcc.dg/struct-ret-3.c: Same. * gcc.dg/torture/stackalign/comp-goto-1.c: Same. * gcc.dg/torture/stackalign/non-local-goto-4.c: Same. * gcc.dg/tree-prof/comp-goto-1.c: Same. * gcc.dg/tree-prof/pr44777.c: Same. From-SVN: r249440
2017-06-21Update the ChangeLog to include config/arm/cortex-a53.mdNaveen H.S1-0/+4
and config/arm/exynos-m1.md modifications From-SVN: r249434
2017-06-21* config/aarch64/aarch64-simd.md (aarch64_crypto_pmulldi)Julian Brown9-7/+31
(aarch64_crypto_pmullv2di): Change type attribute to crypto_pmull. * config/aarch64/thunderx2t99.md (thunderx2t99_pmull): New reservation. * config/arm/cortex-a57.md (cortex_a57_neon_type): Add crypto_pmull to attribute type list for neon_multiply. * config/arm/crypto.md (crypto_vmullp64): Change type to crypto_pmull. * config/arm/types.md (crypto_pmull): Add. * config/arm/xgene1.md (xgene1_neon_pmull): Add crypto_pmull to attribute type list. Co-Authored-By: Naveen H.S <Naveen.Hurugalawadi@cavium.com> From-SVN: r249433
2017-06-21Daily bump.GCC Administrator1-1/+1
From-SVN: r249432
2017-06-20config.gcc (armv6*-*-freebsd*): Change the target_cpu_cname to arm1176jzf-s.Andreas Tobler2-1/+6
2017-06-20 Andreas Tobler <andreast@gcc.gnu.org> * config.gcc (armv6*-*-freebsd*): Change the target_cpu_cname to arm1176jzf-s. From-SVN: r249428
2017-06-20Fix -Werror=class-memaccess failures in jit testsuite (PR jit/81144)David Malcolm3-4/+9
gcc/testsuite/ChangeLog: PR jit/81144 * jit.dg/test-operator-overloading.cc (make_test_quadratic): Replace memset call with zero-initialization. * jit.dg/test-quadratic.cc (make_test_quadratic): Likewise. From-SVN: r249427
2017-06-20ira-costs.c (find_costs_and_classes): Initialize cost_classes later to make ↵Jakub Jelinek2-1/+8
sure not to dereference a NULL... * ira-costs.c (find_costs_and_classes): Initialize cost_classes later to make sure not to dereference a NULL cost_classes_ptr pointer. From-SVN: r249426
2017-06-20pr80732.c: Include fma4-check.h.Uros Bizjak2-3/+10
* gcc.target/i386/pr80732.c: Include fma4-check.h. (main): Renamed to ... (fma4_test): ... this. From-SVN: r249425
2017-06-20rs6000-c.c (altivec_overloaded_builtins): Add ALTIVEC_BUILTIN_VMULESW...Carl Love5-4/+127
gcc/ChangeLog: 2017-06-20 Carl Love <cel@us.ibm.com> * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add ALTIVEC_BUILTIN_VMULESW, ALTIVEC_BUILTIN_VMULEUW, ALTIVEC_BUILTIN_VMULOSW, ALTIVEC_BUILTIN_VMULOUW entries. * config/rs6000/rs6000.c (rs6000_gimple_fold_builtin, builtin_function_type): Add ALTIVEC_BUILTIN_* case statements. * config/rs6000/altivec.md (MVULEUW, VMULESW, VMULOUW, VMULOSW): New enum "unspec" values. (vec_widen_umult_even_v4si, vec_widen_smult_even_v4si, vec_widen_umult_odd_v4si, vec_widen_smult_odd_v4si, altivec_vmuleuw, altivec_vmulesw, altivec_vmulouw, altivec_vmulosw): New patterns. * config/rs6000/rs6000-builtin.def (VMLEUW, VMULESW, VMULOUW, VMULOSW): Add definitions. From-SVN: r249424
2017-06-20Fix rounding pattern similar to PR73350.Julia Koval5-6/+51
gcc/ * config/i386/i386.c: Fix rounding expand for new pattern. * config/i386/subst.md: Fix pattern (parallel -> unspec). gcc/testsuite/ * gcc.target/i386/pr73350-2.c: New test. From-SVN: r249423
2017-06-20PR c++/80972 - C++17 ICE with attribute packed.Jason Merrill3-0/+14
* call.c (build_over_call): Allow a TARGET_EXPR from reference binding. From-SVN: r249420
2017-06-20cp-tree.h (CPTI_NELTS_IDENTIFIER): Delete.Nathan Sidwell3-3/+4
* cp-tree.h (CPTI_NELTS_IDENTIFIER): Delete. (nelts_identifier): Delete. * decl.c (initialize_predefined_identifiers): Remove nelts. From-SVN: r249419
2017-06-20[Patch AArch64] Add rcpc extensionJames Greenhalgh3-0/+9
gcc/ * config/aarch64/aarch64-option-extensions.def (rcpc): New. * config/aarch64/aarch64.h (AARCH64_FL_RCPC): New. From-SVN: r249414
2017-06-20[Patch AArch64 obvious] Fix expected string for fp16 extensionsJames Greenhalgh2-1/+6
gcc/ * config/aarch64/aarch64-option-extensions.def (fp16): Fix expected feature string. From-SVN: r249411
2017-06-20[Patch AArch64 obvious] Rearrange the processors in aarch64-cores.defJames Greenhalgh3-12/+20
gcc/ * config/aarch64/aarch64-cores.def: Rearrange to sort by architecture, then by implementer ID. * config/aarch64/aarch64-tune.md: Regenerate. From-SVN: r249410
2017-06-20Always check for target i?86 and x86_64Rainer Orth22-22/+54
libstdc++-v3: * testsuite/20_util/variant/index_type.cc: Allow for all ilp32 and lp64 targets. gcc/testsuite: * c-c++-common/fold-masked-cmp-1.c: Allow for i?86-*-* target. * c-c++-common/fold-masked-cmp-2.c: Likewise. * c-c++-common/fold-masked-cmp-3.c: Likewise. * g++.dg/cpp0x/alignas4.C: Allow for i?86-*-* target, don't restrict to x86_64-*-*-gnu. Skip scan-assembler on *-*-darwin*. * g++.dg/vect/pr70944.cc: Allow for i?86-*-* target. * gcc.dg/loop-invariant.c: Likewise. * gcc.dg/lto/pr70955_0.c: Likewise. * gcc.dg/tree-ssa/pr69196-1.c: Likewise. * gcc.dg/tree-ssa/pr79803.c: Likewise. * gfortran.dg/pr68078.f90: Allow for i?86-*-linux*. * g++.dg/debug/dwarf2/const2b.C: Allow for x86_64-*-* target. * gcc.dg/attr-ms_struct-1.c: Allow for all i?86-*-*, x86_64-*-* targets. * gcc.dg/attr-ms_struct-2.c: Likewise. * gcc.dg/attr-ms_struct-packed1.c: Likewise. * gcc.dg/bf-ms-layout.c: Likewise. * gcc.dg/bf-ms-layout-2.c: Likewise. * gcc.dg/pic-macro-define.c: Remove target restrictions. Require fpic support. * gcc.target/i386/bitfield1.c: Allow for all i?86-*-*, x86_64-*-* targets. * gcc.target/i386/bitfield2.c: Likewise. * gcc.target/i386/darwin-fpmath.c: Allow for x86_64-*-darwin* targets. * gfortran.dg/fmt_pf.f90: Remove i?86-*-solaris2.9* from xfail. From-SVN: r249409
2017-06-20PR c++/67074 - namespace aliasesNathan Sidwell6-24/+55
PR c++/67074 - namespace aliases * decl.c (duplicate_decls): Don't error here on mismatched namespace alias. * name-lookup.c (name_lookup::add_value): Matching namespaces are not ambiguous. (diagnose_name_conflict): Namespaces are never redeclarations. (update_binding): An alias can match a real namespace. PR c++/67074 * g++.dg/lookup/pr67074.C: New. * g++.dg/parse/namespace-alias-1.C: Adjust. From-SVN: r249408
2017-06-20re PR sanitizer/81097 (UBSAN: false positive for not existing negation ↵Richard Biener4-3/+25
operator and a bogus message) 2017-06-20 Richard Biener <rguenther@suse.de> PR middle-end/81097 * fold-const.c (split_tree): Fold to type before negating. * c-c++-common/ubsan/pr81097.c: New testcase. From-SVN: r249407
2017-06-20Prevent fix-it hints from affecting more than one lineDavid Malcolm2-0/+54
Attempts to apply a removal or replacement fix-it hint to a source range that covers multiple lines currently lead to nonsensical results from the printing code in diagnostic-show-locus.c. We were already filtering them out in edit-context.c (leading to -fdiagnostics-generate-patch not generating any output for the whole TU). Reject attempts to add such fix-it hints within rich_location, fixing the diagnostic-show-locus.c issue. gcc/ChangeLog: * diagnostic-show-locus.c (selftest::test_fixit_deletion_affecting_newline): New function. (selftest::diagnostic_show_locus_c_tests): Call it. libcpp/ChangeLog: * include/line-map.h (class rich_location): Document that attempts to delete or replace a range *affecting* multiple lines will fail. * line-map.c (rich_location::maybe_add_fixit): Implement this restriction. From-SVN: r249403
2017-06-20re PR target/80970 (internal compiler error in find_reloads, at reload.c:4077)Andreas Schwab3-3/+22
PR target/80970 * config/m68k/m68k.md (bsetdreg, bchgdreg, bclrdreg): Use "=d" instead of "+d". From-SVN: r249401
2017-06-20pr65947-9.c: Adjust.Richard Biener2-7/+14
2017-06-20 Richard Biener <rguenther@suse.de> * gcc.dg/vect/pr65947-9.c: Adjust. From-SVN: r249400
2017-06-20[ARM] Implement __ARM_FEATURE_COPROC coprocessor intrinsic feature macroThomas Preud'homme21-1/+97
2017-06-20 Prakhar Bahuguna <prakhar.bahuguna@arm.com> gcc/ * config/arm/arm-c.c (arm_cpu_builtins): New block to define __ARM_FEATURE_COPROC according to support. gcc/testsuite/ * gcc.target/arm/acle/cdp.c: Add feature macro bitmap test. * gcc.target/arm/acle/cdp2.c: Likewise. * gcc.target/arm/acle/ldc.c: Likewise. * gcc.target/arm/acle/ldc2.c: Likewise. * gcc.target/arm/acle/ldc2l.c: Likewise. * gcc.target/arm/acle/ldcl.c: Likewise. * gcc.target/arm/acle/mcr.c: Likewise. * gcc.target/arm/acle/mcr2.c: Likewise. * gcc.target/arm/acle/mcrr.c: Likewise. * gcc.target/arm/acle/mcrr2.c: Likewise. * gcc.target/arm/acle/mrc.c: Likewise. * gcc.target/arm/acle/mrc2.c: Likewise. * gcc.target/arm/acle/mrrc.c: Likewise. * gcc.target/arm/acle/mrrc2.c: Likewise. * gcc.target/arm/acle/stc.c: Likewise. * gcc.target/arm/acle/stc2.c: Likewise. * gcc.target/arm/acle/stc2l.c: Likewise. * gcc.target/arm/acle/stcl.c: Likewise. From-SVN: r249399
2017-06-20tree-chkp.c (chkp_get_hard_register_var_fake_base_address): Rewritten to ↵Jakub Jelinek2-4/+6
avoid overflow for > 32-bit pointers. * tree-chkp.c (chkp_get_hard_register_var_fake_base_address): Rewritten to avoid overflow for > 32-bit pointers. From-SVN: r249398
2017-06-20re PR sanitizer/81125 (-fsanitize=undefined ICE)Jakub Jelinek2-2/+8
PR sanitizer/81125 * ubsan.h (ubsan_encode_value): Workaround buggy clang++ parser by removing enum keyword. (ubsan_type_descriptor): Likewise. Formatting fix. From-SVN: r249397
2017-06-20re PR target/81121 (ICE: in extract_insn, at recog.c:2311)Jakub Jelinek4-1/+23
PR target/81121 * config/i386/i386.md (TARGET_USE_VECTOR_CONVERTS float si->{sf,df} splitter): Require TARGET_SSE2 in the condition. * gcc.target/i386/pr81121.c: New test. From-SVN: r249396
2017-06-20re PR target/79799 (Improve vec_insert of float on Power9)Michael Meissner9-0/+381
[gcc] 2017-06-20 Michael Meissner <meissner@linux.vnet.ibm.com> PR target/79799 * config/rs6000/rs6000.c (rs6000_expand_vector_init): Add support for doing vector set of SFmode on ISA 3.0. * config/rs6000/vsx.md (vsx_set_v4sf_p9): Likewise. (vsx_set_v4sf_p9_zero): Special case setting 0.0f to a V4SF element. (vsx_insert_extract_v4sf_p9): Add an optimization for inserting a SFmode value into a V4SF variable that was extracted from another V4SF variable without converting the element to double precision and back to single precision vector format. (vsx_insert_extract_v4sf_p9_2): Likewise. [gcc/testsuite] 2017-06-20 Michael Meissner <meissner@linux.vnet.ibm.com> PR target/79799 * gcc.target/powerpc/pr79799-1.c: New test. * gcc.target/powerpc/pr79799-2.c: Likewise. * gcc.target/powerpc/pr79799-3.c: Likewise. * gcc.target/powerpc/pr79799-4.c: Likewise. * gcc.target/powerpc/pr79799-5.c: Likewise. From-SVN: r249395
2017-06-20Daily bump.GCC Administrator1-1/+1
From-SVN: r249394
2017-06-19PR c++/80562 - ICE with constexpr if.Jason Merrill3-1/+22
* semantics.c (finish_if_stmt_cond): Call instantiate_non_dependent_expr. From-SVN: r249387
2017-06-19PR c++/80829 - ICE with constexpr copy of base subobject.Jason Merrill3-1/+37
* constexpr.c (clear_no_implicit_zero): New. (cxx_eval_call_expression): Call it. From-SVN: r249386
2017-06-19re PR c++/81124 (internal compiler error: in operator*, at cp/cp-tree.h:726)Nathan Sidwell7-60/+118
PR c++/81124 PR c++/79766 * name-lookup.c (set_decl_namespace): Don't follow using directives and ignore using decls. Only check overly-explicit scope after discovering decl. * g++.dg/lookup/pr79766.C: New. * g++.dg/lookup/pr81124.C: New. * g++.dg/template/explicit6.C: Adjust. * g++.old-deja/g++.other/decl5.C: Adjust. From-SVN: r249385
2017-06-19badalloc1.C: Remove code path for -DSTACK_SIZE.Christophe Lyon2-8/+5
* g++.old-deja/g++.eh/badalloc1.C: Remove code path for -DSTACK_SIZE. 2017-06-19 Christophe Lyon <christophe.lyon@linaro.org> * g++.old-deja/g++.eh/badalloc1.C: Remove code path for -DSTACK_SIZE. From-SVN: r249384
2017-06-19PR c++/81073 - constexpr and static var in statement-expression.Jason Merrill8-17/+53
* typeck2.c (store_init_value): Always call require_potential_constant_expression. * pt.c (convert_nontype_argument): Likewise. * constexpr.c (potential_constant_expression_1): Adjust message. Use decl_maybe_constant_var_p instead of decl_constant_var_p. * decl2.c (decl_maybe_constant_var_p): Consider initializer. From-SVN: r249382
2017-06-19tree-ssa-structalias.c (get_constraint_for_ptr_offset): Multiply in UWHI to ↵Jakub Jelinek2-1/+4
avoid undefined overflow. * tree-ssa-structalias.c (get_constraint_for_ptr_offset): Multiply in UWHI to avoid undefined overflow. From-SVN: r249381
2017-06-19re PR sanitizer/81125 (-fsanitize=undefined ICE)Jakub Jelinek5-16/+63
PR sanitizer/81125 * ubsan.h (enum ubsan_encode_value_phase): New. (ubsan_encode_value): Change second argument to enum ubsan_encode_value_phase with default value of UBSAN_ENCODE_VALUE_GENERIC. * ubsan.c (ubsan_encode_value): Change second argument to enum ubsan_encode_value_phase PHASE from bool IN_EXPAND_P, adjust uses, for UBSAN_ENCODE_VALUE_GENERIC use just create_tmp_var_raw instead of create_tmp_var and use a TARGET_EXPR. (ubsan_expand_bounds_ifn, ubsan_build_overflow_builtin, instrument_bool_enum_load, ubsan_instrument_float_cast): Adjust ubsan_encode_value callers. * g++.dg/ubsan/pr81125.C: New test. From-SVN: r249376
2017-06-19re PR sanitizer/81111 (Cannot build libstdc++ with -fsanitize=undefined)Jakub Jelinek4-5/+79
PR sanitizer/81111 * ubsan.c (ubsan_encode_value): If current_function_decl is NULL, use create_tmp_var_raw instead of create_tmp_var, mark it addressable just by setting TREE_ADDRESSABLE on the result and use a TARGET_EXPR. * g++.dg/ubsan/pr81111.C: New test. From-SVN: r249375
2017-06-19re PR tree-optimization/81118 (ice in remove_redundant_iv_tests)Richard Biener4-1/+31
2017-06-19 Richard Biener <rguenther@suse.de> PR middle-end/81118 * tree-cfgcleanup.c (cleanup_tree_cfg_noloop): Clear niter estimates if we changed anything. * gcc.dg/torture/pr81118.c: New testcase. From-SVN: r249374
2017-06-19re PR bootstrap/80887 (gnat bootstrap fails at s-regpat.o: raised ↵Richard Biener6-4/+85
STORAGE_ERROR : stack overflow or erroneous memory access) 2017-06-19 Richard Biener <rguenther@suse.de> PR tree-optimization/80887 c/ * gimple-parser.c (c_parser_gimple_postfix_expression): Handle negated _Literals to parse _Literal (int) -1. * tree-ssa-sccvn.c (mprts_hook_cnt): New global. (vn_lookup_simplify_result): Allow only mprts_hook_cnt succesful simplified lookups, then reset mprts_hook. (vn_nary_build_or_lookup_1): Set mprts_hook_cnt to 9 before simplifying. (try_to_simplify): Likewise. * gcc.dg/tree-ssa/pr80887.c: New testcase. From-SVN: r249373
2017-06-19re PR ipa/81112 (internal compiler error: tree check: expected integer_cst, ↵Jakub Jelinek2-0/+6
have range_expr in get_len, at tree.h:5321) PR ipa/81112 * g++.dg/torture/pr81112.C: Add -Wno-psabi to dg-additional-options. From-SVN: r249371
2017-06-19pt.c (coerce_template_parms): Fix indentation.Nathan Sidwell2-8/+10
* pt.c (coerce_template_parms): Fix indentation. (tsubst_decl): Remove repeated SET_DECL_RTL. Move VAR_P handling in to single block. From-SVN: r249370
2017-06-19re PR c++/81119 (-Wshadow warns on "typedef struct foo foo;")Nathan Sidwell4-15/+39
PR c++/81119 * name-lookup.c (update_binding): Only warn about constructors hidden by functions. PR c++/81119 * g++.dg/warn/pr81119.C: New. From-SVN: r249369
2017-06-19Initialize live_switch_vars for SWITCH_BODY == STATEMENT_LIST (PR ↵Martin Liska4-1/+48
sanitizer/80879). 2017-06-19 Martin Liska <mliska@suse.cz> PR sanitizer/80879 * gimplify.c (gimplify_switch_expr): Initialize live_switch_vars for SWITCH_BODY == STATEMENT_LIST. 2017-06-19 Martin Liska <mliska@suse.cz> PR sanitizer/80879 * gcc.dg/asan/use-after-scope-switch-4.c: New test. From-SVN: r249368
2017-06-19Introduce 4-stages profiledbootstrap to get a better profile.Martin Liska2-2/+7
2017-06-19 Martin Liska <mliska@suse.cz> * doc/install.texi: Document that PGO runs in 4 stages. 2017-06-19 Martin Liska <mliska@suse.cz> * Makefile.def: Define 4 stages PGO bootstrap. * Makefile.tpl: Define FLAGS. * Makefile.in: Regenerate. From-SVN: r249366
2017-06-19Fix multi-versioning issues (PR ipa/80732).Martin Liska7-39/+193
2017-06-19 Martin Liska <mliska@suse.cz> PR ipa/80732 * attribs.c (make_dispatcher_decl): Do not append '.ifunc' to dispatcher function name. * multiple_target.c (replace_function_decl): New function. (create_dispatcher_calls): Redirect both edges and references. 2017-06-19 Martin Liska <mliska@suse.cz> PR ipa/80732 * gcc.target/i386/mvc5.c: Scan indirect_function. * gcc.target/i386/mvc7.c: Likewise. * gcc.target/i386/pr80732.c: New test. From-SVN: r249365
generated by cgit v1.1 at 2025-08-07 17:11:26 +0000