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2017-09-06Fix typo.Arnaud Charlet1-2/+2
From-SVN: r251764
2017-09-06[multiple changes]Arnaud Charlet4-33/+112
2017-09-06 Eric Botcazou <ebotcazou@adacore.com> * sem_ch7.adb (Has_Referencer): Move up and expand comment explaining the test used to detect inlining. Use same test in second occurrence. (Analyze_Package_Body_Helper): Minor formatting fixes. 2017-09-06 Ed Schonberg <schonberg@adacore.com> * exp_ch4.adb (Handle_Changed_Representation): For an untagged derived type with a mixture of renamed and constrained parent discriminants, the constraint for the target must obtain the discriminant values from both the operand and from the stored constraint for it, given that the constrained discriminants are not visible in the object. * exp_ch5.adb (Make_Field_Assign): The type of the right-hand side may be derived from that of the left-hand side (as in the case of an assignment with a change of representation) so the discriminant to be used in the retrieval of the value of the component must be the entity in the type of the right-hand side. From-SVN: r251763
2017-09-06[multiple changes]Arnaud Charlet11-260/+293
2017-09-06 Hristian Kirtchev <kirtchev@adacore.com> * sem_ch3.adb, sem_ch7.adb, sem_util.adb, g-debpoo.adb, sem_ch4.adb, sem_ch6.adb, sem_ch8.adb: Minor reformatting. * exp_util.adb (Is_Source_Object): Account for the cases where the source object may appear as a dereference or within a type conversion. * exp_ch6.adb: Fix missing space in error message. 2017-09-06 Ed Schonberg <schonberg@adacore.com> * sem_prag.adb: Update description of Eliminate. From-SVN: r251762
2017-09-06[multiple changes]Arnaud Charlet4-3/+36
2017-09-06 Ed Schonberg <schonberg@adacore.com> * sem_attr.adb (Analyze_Attribute, case 'Loop_Entry): Handle properly an attribute reference 'Loop_Entry that appears in the list of indices of an indexed expression, to prevent an infinite loop in the compiler. 2017-09-06 Bob Duff <duff@adacore.com> * s-fileio.adb (Name): Do not raise Use_Error for temp files. 2017-09-06 Ed Schonberg <schonberg@adacore.com> * sem_ch4.adb (Analyze_Set_Membership): If an alternative in a set membership is an overloaded enumeration literal, and the type of the alternative is resolved from a previous one, replace the entity of the alternative as well as the type, to prevent inconsistencies between the entity and the type. From-SVN: r251761
2017-09-06[multiple changes]Arnaud Charlet26-142/+378
2017-09-06 Eric Botcazou <ebotcazou@adacore.com> * ali.ads (ALIs_Record): Add No_Component_Reordering component. (No_Component_Reordering_Specified): New switch. * ali.adb (Initialize_ALI): Set No_Component_Reordering_Specified. (Scan_ALI): Set No_Component_Reordering and deal with NC marker. * bcheck.adb (Check_Consistent_No_Component_Reordering): New check. (Check_Configuration_Consistency): Invoke it. * debug.adb (d.r): Toggle the effect of the switch. (d.v): Change to no-op. * einfo.ads (Has_Complex_Representation): Restrict to record types. (No_Reordering): New alias for Flag239. (OK_To_Reorder_Components): Delete. (No_Reordering): Declare. (Set_No_Reordering): Likewise. (OK_To_Reorder_Components): Delete. (Set_OK_To_Reorder_Components): Likewise. * einfo.adb (Has_Complex_Representation): Expect record types. (No_Reordering): New function. (OK_To_Reorder_Components): Delete. (Set_Has_Complex_Representation): Expect base record types. (Set_No_Reordering): New procedure. (Set_OK_To_Reorder_Components): Delete. (Write_Entity_Flags): Adjust to above change. * fe.h (Debug_Flag_Dot_R): New macro and declaration. * freeze.adb (Freeze_Record_Type): Remove conditional code setting OK_To_Reorder_Components on record types with convention Ada. * lib-writ.adb (Write_ALI): Deal with NC marker. * opt.ads (No_Component_Reordering): New flag. (No_Component_Reordering_Config): Likewise. (Config_Switches_Type): Add No_Component_Reordering component. * opt.adb (Register_Opt_Config_Switches): Copy No_Component_Reordering onto No_Component_Reordering_Config. (Restore_Opt_Config_Switches): Restore No_Component_Reordering. (Save_Opt_Config_Switches): Save No_Component_Reordering. (Set_Opt_Config_Switches): Set No_Component_Reordering. * par-prag.adb (Prag): Deal with Pragma_No_Component_Reordering. * sem_ch3.adb (Analyze_Private_Extension_Declaration): Also set the No_Reordering flag from the default. (Build_Derived_Private_Type): Likewise. (Build_Derived_Record_Type): Likewise. Then inherit it for untagged types and clean up handling of similar flags. (Record_Type_Declaration): Likewise. * sem_ch13.adb (Same_Representation): Deal with No_Reordering and remove redundant test on Is_Tagged_Type. * sem_prag.adb (Analyze_Pragma): Handle No_Component_Reordering. (Sig_Flags): Likewise. * snames.ads-tmpl (Name_No_Component_Reordering): New name. (Pragma_Id): Add Pragma_No_Component_Reordering value. * warnsw.adb (Set_GNAT_Mode_Warnings): Enable -gnatw.q as well. * gcc-interface/decl.c (gnat_to_gnu_entity) <E_Record_Type>: Copy the layout of the parent type only if the No_Reordering settings match. (components_to_record): Reorder record types with convention Ada by default unless No_Reordering is set or -gnatd.r is specified and do not warn if No_Reordering is set in GNAT mode. 2017-09-06 Ed Schonberg <schonberg@adacore.com> * sem_util.ads, sem_util.adb (Check_Previous_Null_Procedure): new predicate to reject declarations that can be completions, when there is a visible prior homograph that is a null procedure. * sem_ch6.adb (Analyze_Null_Procedure): use it. * sem_ch8.adb (Analyze_Subprogram_Renaming): ditto. 2017-09-06 Thomas Quinot <quinot@adacore.com> * s-regpat.adb (Compile.Parse_Literal): Fix handling of literal run of 253 characters or more. From-SVN: r251760
2017-09-06[multiple changes]Arnaud Charlet8-225/+384
2017-09-06 Ed Schonberg <schonberg@adacore.com> * einfo.adb (Designated_Type): Use Is_Incomplete_Type to handle properly incomplete subtypes that may be created by explicit or implicit declarations. (Is_Base_Type): Take E_Incomplete_Subtype into account. (Subtype_Kind): Ditto. * sem_ch3.adb (Build_Discriminated_Subtype): Set properly the Ekind of a subtype of a discriminated incomplete type. (Fixup_Bad_Constraint): Use Subtype_Kind in all cases, including incomplete types, to preserve error reporting. (Process_Incomplete_Dependents): Do not create a subtype declaration for an incomplete subtype that is created internally. * sem_ch7.adb (Analyze_Package_Specification): Handle properly incomplete subtypes that do not require a completion, either because they are limited views, of they are generic actuals. 2017-09-06 Hristian Kirtchev <kirtchev@adacore.com> * checks.adb (Insert_Valid_Check): Remove the suspicious manipulation of the Do_Range_Check flag as ths is no linger needed. Suppress validity check when analysing the validation variable. 2017-09-06 Philippe Gil <gil@adacore.com> * g-debpoo.adb: adapt GNAT.Debug_Pools to allow safe thread GNATCOLL.Memory 2017-09-06 Bob Duff <duff@adacore.com> * sem_elim.adb: Minor comment fix. 2017-09-06 Ed Schonberg <schonberg@adacore.com> * sem_util.adb (Is_Object_Reference): A function call is an object reference, and thus attribute references for attributes that are functions (such as Pred and Succ) as well as predefined operators are legal in contexts that require an object, such as the prefix of attribute Img and the Ada2020 version of 'Image. From-SVN: r251759
2017-09-06exp_util.adb, [...]: Minor reformatting.Hristian Kirtchev8-35/+49
2017-09-06 Hristian Kirtchev <kirtchev@adacore.com> * exp_util.adb, einfo.adb, sem_attr.adb, exp_ch4.adb, gnatls.adb, exp_ch3.adb, xoscons.adb: Minor reformatting. From-SVN: r251758
2017-09-06[multiple changes]Arnaud Charlet10-69/+162
2017-09-06 Raphael Amiard <amiard@adacore.com> * a-chtgop.ads, a-chtgop.adb: Add versions of First and Next with Position parameter. If supplied, use it to provide efficient iteration. * a-cohase.ads, a-cohase.adb, a-cihama.ads, a-cihama.adb, a-cohama.ads, a-cohama.adb: Add/Use Position to provide efficient iteration. 2017-09-06 Ed Schonberg <schonberg@adacore.com> * exp_util.adb (Build_Allocate_Deallocate_Proc): If the designated type is class-wide and the expression is an unchecked conversion, preserve the conversion when checking the tag of the designated object, to prevent spurious semantic errors when the expression in the conversion has an untagged type (for example an address attribute). From-SVN: r251757
2017-09-06Enqueue all SRA links for write flag propagationMartin Jambor4-1/+45
2017-09-06 Martin Jambor <mjambor@suse.cz> PR tree-optimization/82078 gcc/ * tree-sra.c (sort_and_splice_var_accesses): Move call to add_access_to_work_queue... (build_accesses_from_assign): ...here. (propagate_all_subaccesses): Make sure racc is the group representative, if there is one. gcc/testsuite/ * gcc.dg/tree-ssa/pr82078.c: New test. From-SVN: r251756
2017-09-06[multiple changes]Arnaud Charlet5-56/+68
2017-09-06 Ed Schonberg <schonberg@adacore.com> * sem_res.adb (Resolve_Entry_Call): Check whether a protected operation is subject to a pragma Eliminate. 2017-09-06 Ed Schonberg <schonberg@adacore.com> * sem_elim.ads, exp_ch4.adb: Minor reformatting. 2017-09-06 Eric Botcazou <ebotcazou@adacore.com> * fe.h (Eliminate_Error_Msg): Remove. From-SVN: r251755
2017-09-06re PR middle-end/82095 (ICE in tree_nop_conversion at tree.c:11793 on ppc64le)Jakub Jelinek4-2/+30
PR middle-end/82095 * varasm.c (categorize_decl_for_section): Use SECCAT_TBSS for TLS vars with NULL DECL_INITIAL. * gcc.dg/tls/pr82095.c: New test. From-SVN: r251754
2017-09-062017-09-06 Richard Biener <rguenther@suse.de>Richard Biener2-2/+7
* gimple-ssa-strength-reduction.c (find_candidates_dom_walker::before_doom_children): Use a type and not a mode check. From-SVN: r251753
2017-09-06re PR target/77308 (surprisingly large stack usage for sha512 on arm)Bernd Edlinger3-8/+19
2017-09-06 Bernd Edlinger <bernd.edlinger@hotmail.de> PR target/77308 * config/arm/predicates.md (arm_general_adddi_operand): Create new non-vfp predicate. * config/arm/arm.md (*arm_adddi3, *arm_subdi3): Use new predicates. From-SVN: r251752
2017-09-05re PR tree-optimization/64910 (tree reassociation results in poor code)Jeff Law2-8/+15
PR tree-optimization/64910 * tree-ssa-reassoc.c (reassociate_bb): Restrict last change to cases where we have 3 or more operands. From-SVN: r251751
2017-09-06Daily bump.GCC Administrator1-1/+1
From-SVN: r251750
2017-09-05re PR middle-end/81768 (error: control flow in the middle of basic block)Jakub Jelinek4-0/+26
PR middle-end/81768 * omp-low.c (lower_omp_for): Recompute tree invariant if gimple_omp_for_initial/final is ADDR_EXPR. * gcc.dg/gomp/pr81768-2.c: New test. From-SVN: r251742
2017-09-05re PR middle-end/81768 (error: control flow in the middle of basic block)Jakub Jelinek4-4/+34
PR middle-end/81768 * omp-expand.c (expand_omp_simd): Force second operands of COND_EXPR into gimple val before gimplification fo the COND_EXPR. * gcc.dg/gomp/pr81768-1.c: New test. From-SVN: r251741
2017-09-05tree-ssa-threadupdate.c (duplicate_thread_path): Remove unused REGION_COPY ↵Aldy Hernandez2-16/+12
argument. * tree-ssa-threadupdate.c (duplicate_thread_path): Remove unused REGION_COPY argument. (thread_through_all_blocks): Remove unused argument to duplicate_thread_path. From-SVN: r251740
2017-09-05name-lookup.c (do_class_using_decl): Elide read-once temps.Nathan Sidwell2-29/+18
* name-lookup.c (do_class_using_decl): Elide read-once temps. Move declarations to initializations. From-SVN: r251738
2017-09-05class.c (add_method): Move slot search and insertion to ...Nathan Sidwell5-91/+107
* class.c (add_method): Move slot search and insertion to ... * name-lookup.c (get_method_slot): ... this new function. (lookup_fnfields_slot_nolazy): Cope with NULL slot. * name-lookup.h (get_method_slot): Declare. * decl.c (cxx_init_decl_processinng): Give conv_op_marker a more realistic type. (grok_special_member_properties): Set TYPE_HAS_CONVERSION. Expicitly look at DECL_NAME for specialness. Improve TYPE_HAS_CONSTEXPR_CTOR setting. From-SVN: r251737
2017-09-05[75/77] Use scalar_mode in the AArch64 portRichard Sandiford3-7/+19
Similar to the previous scalar_int_mode patch. 2017-09-05 Richard Sandiford <richard.sandiford@linaro.org> Alan Hayward <alan.hayward@arm.com> David Sherwood <david.sherwood@arm.com> gcc/ * config/aarch64/aarch64-protos.h (aarch64_gen_adjusted_ldpstp): Take a scalar_mode rather than a machine_mode. (aarch64_operands_adjust_ok_for_ldpstp): Likewise. * config/aarch64/aarch64.c (aarch64_simd_container_mode): Likewise. (aarch64_operands_adjust_ok_for_ldpstp): Likewise. (aarch64_gen_adjusted_ldpstp): Likewise. (aarch64_expand_vector_init): Use scalar_mode instead of machine_mode. Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com> From-SVN: r251736
2017-09-05[61/77] Use scalar_int_mode in the AArch64 portRichard Sandiford3-57/+111
This patch makes the AArch64 port use scalar_int_mode in various places. Other ports won't need this kind of change; we only need it for AArch64 because of the variable-sized SVE modes. The only change in functionality is in the rtx_costs handling of CONST_INT. If the caller doesn't supply a mode, we now pass word_mode rather than VOIDmode to aarch64_internal_mov_immediate. aarch64_movw_imm will therefore not now truncate large constants in this situation. 2017-09-05 Richard Sandiford <richard.sandiford@linaro.org> Alan Hayward <alan.hayward@arm.com> David Sherwood <david.sherwood@arm.com> gcc/ * config/aarch64/aarch64-protos.h (aarch64_is_extend_from_extract): Take a scalar_int_mode instead of a machine_mode. (aarch64_mask_and_shift_for_ubfiz_p): Likewise. (aarch64_output_scalar_simd_mov_immediate): Likewise. (aarch64_simd_scalar_immediate_valid_for_move): Likewise. (aarch64_simd_attr_length_rglist): Delete. * config/aarch64/aarch64.c (aarch64_is_extend_from_extract): Take a scalar_int_mode instead of a machine_mode. (aarch64_add_offset): Likewise. (aarch64_internal_mov_immediate): Likewise (aarch64_add_constant_internal): Likewise. (aarch64_add_constant): Likewise. (aarch64_movw_imm): Likewise. (aarch64_rtx_arith_op_extract_p): Likewise. (aarch64_mask_and_shift_for_ubfiz_p): Likewise. (aarch64_simd_scalar_immediate_valid_for_move): Likewise. Remove assert that the mode isn't a vector. (aarch64_output_scalar_simd_mov_immediate): Likewise. (aarch64_expand_mov_immediate): Update calls after above changes. (aarch64_output_casesi): Use as_a <scalar_int_mode>. (aarch64_and_bitmask_imm): Check for scalar integer modes. (aarch64_move_imm): Likewise. (aarch64_can_const_movi_rtx_p): Likewise. (aarch64_strip_extend): Likewise. (aarch64_extr_rtx_p): Likewise. (aarch64_rtx_costs): Likewise, using wode_mode as the mode of a CONST_INT when the mode parameter is VOIDmode. (aarch64_float_const_rtx_p): Use scalar_int_mode for a temporary. Co-Authored-By: Alan Hayward <alan.hayward@arm.com> Co-Authored-By: David Sherwood <david.sherwood@arm.com> From-SVN: r251735
2017-09-05cp-tree.h (lang_decl_base): Rename template_conv_p to unknown_bound_p.Nathan Sidwell3-27/+16
* cp-tree.h (lang_decl_base): Rename template_conv_p to unknown_bound_p. (DECL_CONV_FN_P): Don't check NULL DECL_NAME. (DECL_CONV_FN_TYPE): FN must be conv op. (DECL_TEMPLATE_CONV_FN_P): Delete. (VAR_HAD_UNKNOWN_BOUND, SET_VAR_HAD_UNKNOWN_BOUND): Adjust. * pt.c (push_template_decl_real): Delete DECL_TEMPLATE_CONV_FN_P From-SVN: r251734
2017-09-05Make bitsize_mode_for_mode return an opt_modeRichard Sandiford3-7/+12
2017-09-05 Richard Sandiford <richard.sandiford@linaro.org> gcc/ * machmode.h (bitwise_mode_for_mode): Return opt_mode. * stor-layout.c (bitwise_mode_for_mode): Likewise. (bitwise_type_for_mode): Update accordingly. From-SVN: r251733
2017-09-05Make mode_for_size_tree return an opt_modeRichard Sandiford5-22/+39
...for consistency with mode_for_size 2017-09-05 Richard Sandiford <richard.sandiford@linaro.org> gcc/ * stor-layout.h (mode_for_size_tree): Return an opt_mode. * stor-layout.c (mode_for_size_tree): Likewise. (mode_for_array): Update accordingly. (layout_decl): Likewise. (compute_record_mode): Likewise. Only set the mode once. gcc/ada/ * gcc-interface/utils.c (make_packable_type): Update call to mode_for_size_tree. From-SVN: r251732
2017-09-05Make targetm.get_mask_mode return an opt_modeRichard Sandiford8-33/+50
...for consistency with mode_for_vector. 2017-09-05 Richard Sandiford <richard.sandiford@linaro.org> gcc/ * target.def (get_mask_mode): Change return type to opt_mode. Expand commentary. * doc/tm.texi: Regenerate. * targhooks.h (default_get_mask_mode): Return an opt_mode. * targhooks.c (default_get_mask_mode): Likewise. * config/i386/i386.c (ix86_get_mask_mode): Likewise. * optabs-query.c (can_vec_mask_load_store_p): Update use of targetm.get_mask_mode. * tree.c (build_truth_vector_type): Likewise. From-SVN: r251731
2017-09-05Make mode_for_vector return an opt_modeRichard Sandiford12-79/+86
...following on from the mode_for_size change. The patch also removes machmode.h versions of the stor-layout.c comments, since the comments in the .c file are more complete. 2017-09-05 Richard Sandiford <richard.sandiford@linaro.org> gcc/ * machmode.h (mode_for_vector): Return an opt_mode. * stor-layout.c (mode_for_vector): Likewise. (mode_for_int_vector): Update accordingly. (layout_type): Likewise. * config/i386/i386.c (emit_memmov): Likewise. (ix86_expand_set_or_movmem): Likewise. (ix86_expand_vector_init): Likewise. (ix86_get_mask_mode): Likewise. * config/powerpcspe/powerpcspe.c (rs6000_expand_vec_perm_const_1): Likewise. * config/rs6000/rs6000.c (rs6000_expand_vec_perm_const_1): Likewise. * expmed.c (extract_bit_field_1): Likewise. * expr.c (expand_expr_real_2): Likewise. * optabs-query.c (can_vec_perm_p): Likewise. (can_vec_mask_load_store_p): Likewise. * optabs.c (expand_vec_perm): Likewise. * targhooks.c (default_get_mask_mode): Likewise. * tree-vect-stmts.c (vectorizable_store): Likewise. (vectorizable_load): Likewise. (get_vectype_for_scalar_type_and_size): Likewise. From-SVN: r251730
2017-09-05Add mode_for_int_vector helper functionsRichard Sandiford7-15/+47
There are at least a few places that want to create an integer vector with a specified element size and element count, or to create the integer equivalent of an existing mode. This patch adds helpers for doing that. The require ()s are all used in functions that go on to emit instructions that use the result as a vector mode. 2017-09-05 Richard Sandiford <richard.sandiford@linaro.org> gcc/ * machmode.h (mode_for_int_vector): New function. * stor-layout.c (mode_for_int_vector): Likewise. * config/aarch64/aarch64.c (aarch64_emit_approx_sqrt): Use it. * config/powerpcspe/powerpcspe.c (rs6000_do_expand_vec_perm): Likewise. * config/rs6000/rs6000.c (rs6000_do_expand_vec_perm): Likewise. * config/s390/s390.c (s390_expand_vec_compare_cc): Likewise. (s390_expand_vcond): Likewise. From-SVN: r251729
2017-09-05Make mode_for_size return an opt_modeRichard Sandiford12-68/+97
...to make it consistent with int_mode_for_size etc. require () seems like the right choice in replace_reg_with_saved_mem because we use the chosen mode for saving and restoring registers, which cannot be done in BLKmode. Similarly require () seems like the right choice in calls related to secondary memory reloads (the ones in config/, and in get_secondary_mem) because the reload must always have a defined mode, which e.g. determines the size of the slot. We can use require () in simplify_subreg_concatn and assemble_integer because it isn't meaningful to create a subreg with BLKmode (for one thing, we couldn't tell then whether it was partial, paradoxical, etc.). make_fract_type and make_accum_type must find a mode because that's what distinguishes accumulator FIXED_POINT_TYPEs from fractional FIXED_POINT_TYPEs. 2017-09-05 Richard Sandiford <richard.sandiford@linaro.org> gcc/ * machmode.h (opt_machine_mode): New type. (opt_mode<T>): Allow construction from anything that can be converted to a T. (is_a, as_a, dyn_cast): Add overloads for opt_mode. (mode_for_size): Return an opt_machine_mode. * stor-layout.c (mode_for_size): Likewise. (mode_for_size_tree): Update call accordingly. (bitwise_mode_for_mode): Likewise. (make_fract_type): Likewise. (make_accum_type): Likewise. * caller-save.c (replace_reg_with_saved_mem): Update call accordingly. * config/alpha/alpha.h (SECONDARY_MEMORY_NEEDED_MODE): Likewise. * config/i386/i386.h (SECONDARY_MEMORY_NEEDED_MODE): Likewise. * config/s390/s390.h (SECONDARY_MEMORY_NEEDED_MODE): Likewise. * config/sparc/sparc.h (SECONDARY_MEMORY_NEEDED_MODE): Likewise. * expmed.c (extract_bit_field_1): Likewise. * reload.c (get_secondary_mem): Likewise. * varasm.c (assemble_integer): Likewise. * lower-subreg.c (simplify_subreg_concatn): Likewise. Move early-out. From-SVN: r251728
2017-09-05(decimal_)float_mode_for_size in real.hRichard Sandiford3-6/+26
This patch makes the binary float macros in real.h use float_mode_for_size and adds a corresponding decimal_float_mode_for_size for the decimal macros. 2017-09-05 Richard Sandiford <richard.sandiford@linaro.org> gcc/ * machmode.h (decimal_float_mode_for_size): New function. * real.h (REAL_VALUE_TO_TARGET_LONG_DOUBLE): Use float_mode_for_size. (REAL_VALUE_TO_TARGET_DOUBLE): Likewise. (REAL_VALUE_TO_TARGET_SINGLE): Likewise. (REAL_VALUE_TO_TARGET_DECIMAL128): Use decimal_float_mode_for_size. (REAL_VALUE_TO_TARGET_DECIMAL64): Likewise. (REAL_VALUE_TO_TARGET_DECIMAL32): Likewise. From-SVN: r251727
2017-09-05Make more use of int_mode_for_sizeRichard Sandiford23-81/+140
This patch converts more places that could use int_mode_for_size instead of mode_for_size. This is in preparation for an upcoming patch that makes mode_for_size itself return an opt_mode. require () seems like the right choice in expand_builtin_powi because we have got past the point of backing out. We go on to do: op1 = expand_expr (arg1, NULL_RTX, mode2, EXPAND_NORMAL); if (GET_MODE (op1) != mode2) op1 = convert_to_mode (mode2, op1, 0); which would be invalid for (and have failed for) BLKmode. In get_builtin_sync_mode and expand_ifn_atomic_compare_exchange, the possible bitsizes are {8, 16, 32, 64, 128}, all of which give target-independent integer modes (up to TImode). The comment above the call in get_builtin_sync_mode makes clear that an integer mode must be found. We can use require () in expand_builtin_atomic_clear and expand_builtin_atomic_test_and_set because there's always an integer mode for the boolean type. The same goes for the POINTER_SIZE request in layout_type. Similarly we can use require () in combine_instructions and gen_lowpart_common because there's always an integer mode for HOST_BITS_PER_WIDE_INT (DImode when BITS_PER_UNIT == 8), and HOST_BITS_PER_DOUBLE_INT (TImode). The calls in aarch64_function_value, arm_function_value, aapcs_allocate_return_reg and mips_function_value_1 are handling cases in which a big-endian target passes or returns values at the most significant end of a register. In each case the ABI constrains the size to a small amount and does not handle non-power-of-2 sizes wider than a word. The calls in c6x_expand_movmem, i386.c:emit_memset, lm32_block_move_inline, microblaze_block_move_straight and mips_block_move_straight are dealing with expansions of block memory operations using register-wise operations, and those registers must have non-BLK mode. The reason for using require () in ix86_expand_sse_cmp, mips_expand_ins_as_unaligned_store, spu.c:adjust_operand and spu_emit_branch_and_set is that we go on to emit non-call instructions that use registers of that mode, which wouldn't be valid for BLKmode. 2017-09-05 Richard Sandiford <richard.sandiford@linaro.org> gcc/ * builtins.c (expand_builtin_powi): Use int_mode_for_size. (get_builtin_sync_mode): Likewise. (expand_ifn_atomic_compare_exchange): Likewise. (expand_builtin_atomic_clear): Likewise. (expand_builtin_atomic_test_and_set): Likewise. (fold_builtin_atomic_always_lock_free): Likewise. * calls.c (compute_argument_addresses): Likewise. (emit_library_call_value_1): Likewise. (store_one_arg): Likewise. * combine.c (combine_instructions): Likewise. * config/aarch64/aarch64.c (aarch64_function_value): Likewise. * config/arm/arm.c (arm_function_value): Likewise. (aapcs_allocate_return_reg): Likewise. * config/c6x/c6x.c (c6x_expand_movmem): Likewise. * config/i386/i386.c (construct_container): Likewise. (ix86_gimplify_va_arg): Likewise. (ix86_expand_sse_cmp): Likewise. (emit_memmov): Likewise. (emit_memset): Likewise. (expand_small_movmem_or_setmem): Likewise. (ix86_expand_pextr): Likewise. (ix86_expand_pinsr): Likewise. * config/lm32/lm32.c (lm32_block_move_inline): Likewise. * config/microblaze/microblaze.c (microblaze_block_move_straight): Likewise. * config/mips/mips.c (mips_function_value_1) Likewise. (mips_block_move_straight): Likewise. (mips_expand_ins_as_unaligned_store): Likewise. * config/powerpcspe/powerpcspe.c (rs6000_darwin64_record_arg_advance_flush): Likewise. (rs6000_darwin64_record_arg_flush): Likewise. * config/rs6000/rs6000.c (rs6000_darwin64_record_arg_advance_flush): Likewise. (rs6000_darwin64_record_arg_flush): Likewise. * config/sparc/sparc.c (sparc_function_arg_1): Likewise. (sparc_function_value_1): Likewise. * config/spu/spu.c (adjust_operand): Likewise. (spu_emit_branch_or_set): Likewise. (arith_immediate_p): Likewise. * emit-rtl.c (gen_lowpart_common): Likewise. * expr.c (expand_expr_real_1): Likewise. * function.c (assign_parm_setup_block): Likewise. * gimple-ssa-store-merging.c (encode_tree_to_bitpos): Likewise. * reload1.c (alter_reg): Likewise. * stor-layout.c (mode_for_vector): Likewise. (layout_type): Likewise. gcc/ada/ * gcc-interface/utils2.c (build_load_modify_store): Use int_mode_for_size. From-SVN: r251726
2017-09-05Make more use of int_mode_for_modeRichard Sandiford3-8/+10
This patch converts more places that could use int_mode_for_mode instead of mode_for_size. This is in preparation for an upcoming patch that makes mode_for_size itself return an opt_mode. The reason for using required () in exp2_immediate_p is that we go on to do: trunc_int_for_mode (..., int_mode) which would be invalid for (and have failed for) BLKmode. The reason for using required () in spu_convert_move and resolve_simple_move is that we go on to use registers of the returned mode in non-call rtl instructions, which would be invalid for BLKmode. 2017-09-05 Richard Sandiford <richard.sandiford@linaro.org> gcc/ * config/spu/spu.c (exp2_immediate_p): Use int_mode_for_mode. (spu_convert_move): Likewise. * lower-subreg.c (resolve_simple_move): Likewise. From-SVN: r251725
2017-09-05class.c (unreverse_member_declarations): Remove extraneous if.Nathan Sidwell3-6/+11
* class.c (unreverse_member_declarations): Remove extraneous if. * pt.c (push_template_decl_real): Use string concatenation, not \<newline>. Add %<..%>. From-SVN: r251724
2017-09-05re PR target/81833 (PowerPC: VSX: Miscompiles ffmpeg's ↵Bill Schmidt5-34/+176
scalarproduct_int16_vsx at -O1) [gcc] 2017-09-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com> PR target/81833 * config/rs6000/altivec.md (altivec_vsum2sws): Convert from a define_insn to a define_expand. (altivec_vsum2sws_direct): New define_insn. (altivec_vsumsws): Convert from a define_insn to a define_expand. [gcc/testsuite] 2017-09-05 Bill Schmidt <wschmidt@linux.vnet.ibm.com> PR target/81833 * gcc.target/powerpc/pr81833-1.c: New file. * gcc.target/powerpc/pr81833-2.c: New file. From-SVN: r251723
2017-09-05Improve max_insns_skipped logicWilco Dijkstra2-13/+10
Improve the logic when setting max_insns_skipped. Limit the maximum size of IT to MAX_INSN_PER_IT_BLOCK as otherwise multiple IT instructions are needed, increasing codesize. Given 4 works well for Thumb-2, use the same limit for ARM for consistency. gcc/ * config/arm/arm.c (arm_option_params_internal): Improve setting of max_insns_skipped. From-SVN: r251720
2017-09-05i386: Avoid stack realignment if possibleH.J. Lu7-56/+157
ix86_finalize_stack_frame_flags has been extended to eliminate frame pointer when the new stack frame isn't needed with and without -maccumulate-outgoing-args as well as -fomit-frame-pointer. Since stack access with larger alignment may be optimized out, to decide if stack realignment is needed, we need to not only check for stack frame access, but also verify the alignment of stack frame access. Since alignment of memory access via arg_pointer is set up by caller, not by callee, we should find the maximum stack alignment from the stack frame access instructions via stack pointer and frame pointrer to avoid stack realignment when stack alignment needed is less than incoming stack boundary. gcc/ PR target/59501 PR target/81624 PR target/81769 * config/i386/i386.c (ix86_finalize_stack_frame_flags): Don't realign stack if stack alignment needed is less than incoming stack boundary. gcc/testsuite/ PR target/59501 PR target/81624 PR target/81769 * gcc.target/i386/pr59501-4a.c: Remove xfail. * gcc.target/i386/pr81769-1a.c: New test. * gcc.target/i386/pr81769-1b.c: Likewise. * gcc.target/i386/pr81769-2.c: Likewise. From-SVN: r251718
2017-09-05re PR sanitizer/82072 (sanitizer does not detect an overflow from LLONG_MIN)Marek Polacek4-6/+33
PR sanitizer/82072 * convert.c (convert_to_integer_1) <case NEGATE_EXPR>: Move the ubsan check earlier. * c-c++-common/ubsan/pr82072-2.c: New test. From-SVN: r251717
2017-09-05re PR c++/81942 (ICE on empty constexpr constructor with C++14)Paolo Carlini6-3/+42
/cp 2017-09-05 Paolo Carlini <paolo.carlini@oracle.com> PR c++/81942 * cp-tree.h (LABEL_DECL_CDTOR): Add and document. * decl.c (start_preparsed_function): Set LABEL_DECL_CDTOR when creating cdtor_label. * constexpr.c (returns): Add the case of a constructor/destructor returning via a LABEL_DECL_CDTOR label. (cxx_eval_constant_expression, case [GOTO_EXPR]): Likewise. /testsuite 2017-09-05 Paolo Carlini <paolo.carlini@oracle.com> PR c++/81942 * g++.dg/cpp1y/constexpr-return3.C: New. From-SVN: r251714
2017-09-05Improve alloca alignmentWilco Dijkstra2-8/+17
This patch improves alloca alignment. Currently alloca reserves too much space as it aligns twice, and generates unnecessary stack alignment code. When the requested alignment is lower than the stack alignment, no extra alignment is needed. If the requested alignment is higher, we need to increase the size by the difference of the requested alignment and the stack alignment. As a result, the alloca alignment is exactly as expected: alloca (16): sub sp, sp, #16 mov x1, sp alloca (x): add x0, x0, 15 and x0, x0, -16 sub sp, sp, x0 mov x0, sp __builtin_alloca_with_align (x, 512): add x0, x0, 63 and x0, x0, -16 sub sp, sp, x0 add x0, sp, 63 and x0, x0, -64 gcc/ * explow.c (get_dynamic_stack_size): Improve dynamic alignment. From-SVN: r251713
2017-09-05re PR c++/82084 (ICE: constructing wstring with -O3)Richard Biener2-3/+9
2017-09-05 Richard Biener <rguenther@suse.de> PR tree-optimization/82084 * fold-const.c (can_native_encode_string_p): Handle wide characters. From-SVN: r251711
2017-09-05re PR ada/62235 (segmentation fault on Ada 2012 code)Eric Botcazou7-3/+81
PR ada/62235 * gcc-interface/decl.c (gnat_to_gnu_entity): Skip regular processing for Itypes that are E_Record_Subtype with a cloned subtype. <E_Record_Subtype>: Use the DECL of the cloned type directly, if any. From-SVN: r251706
2017-09-05trans.c (convert_with_check): Use a custom base type if the base type of the ↵Eric Botcazou2-40/+55
expression has a different... * gcc-interface/trans.c (convert_with_check): Use a custom base type if the base type of the expression has a different machine mode. Rename a couple of parameters and local variable. From-SVN: r251705
2017-09-05trans.c (Attribute_to_gnu): Do not strip conversions around prefixes that ↵Eric Botcazou2-4/+13
are not references. * gcc-interface/trans.c (Attribute_to_gnu) <Attr_Address>: Do not strip conversions around prefixes that are not references. From-SVN: r251704
2017-09-05utils.c (unchecked_convert): When the result type is a non-biased integral ↵Eric Botcazou4-14/+47
type with size 0... * gcc-interface/utils.c (unchecked_convert): When the result type is a non-biased integral type with size 0, set the result to 0 directly. From-SVN: r251701
2017-09-05gigi.h (renaming_from_generic_instantiation_p): Turn toEric Botcazou5-46/+59
* gcc-interface/gigi.h (renaming_from_generic_instantiation_p): Turn to (renaming_from_instantiation_p): ...this. * gcc-interface/decl.c (gnat_to_gnu_entity): Use inline predicate instead of explicit tests on kind of entities. Adjust for renaming. (gnat_to_gnu_profile_type): Likewise. (gnat_to_gnu_subprog_type): Likewise. * gcc-interface/trans.c (Identifier_to_gnu): Likewise. (Case_Statement_to_gnu): Likewise. (gnat_to_gnu): Likewise. (process_freeze_entity): Likewise. (process_type): Likewise. (add_stmt_with_node): Adjust for renaming. * gcc-interface/utils.c (gnat_pushdecl): Adjust for renaming. (renaming_from_generic_instantiation_p): Rename to... (renaming_from_instantiation_p): ...this. Use inline predicate. (pad_type_hasher::keep_cache_entry): Fold. From-SVN: r251700
2017-09-05trans.c (adjust_for_implicit_deref): New function.Eric Botcazou6-16/+77
* gcc-interface/trans.c (adjust_for_implicit_deref): New function. (gnat_to_gnu) <N_Explicit_Dereference>: Translate result type first. (N_Indexed_Component): Invoke adjust_for_implicit_deref on the prefix. (N_Slice): Likewise. (N_Selected_Component): Likewise. Do not try again to translate it. (N_Free_Statement): Invoke adjust_for_implicit_deref on the expression. From-SVN: r251699
2017-09-05repinfo.ads: Document new treatment of dynamic values.Eric Botcazou5-55/+114
* repinfo.ads: Document new treatment of dynamic values. (TCode): Bump upper bound to 29. (Dynamic_Val): New constant set to 29. * repinfo.adb (Print_Expr) <Dynamic_Val>: New case. (Rep_Value) <Dynamic_Val>: Likewise. * repinfo.h (Dynamic_Val): New macro. * gcc-interface/decl.c (annotate_value): Tidy up and cache result for DECL_P nodes too. <INTEGER_CST>: Set TCODE instead of recursing. <COMPONENT_REF>: Set TCODE instead of calling Create_Node manually. <VAR_DECL>: New case. <MULT_EXPR, PLUS_EXPR>: Fold conversions into inner operations. <BIT_AND_EXPR>: Adjust. <CALL_EXPR>: Do not fall through. From-SVN: r251698
2017-09-05trans.c (Call_to_gnu): If this is a function call and there is no target...Eric Botcazou2-5/+13
* gcc-interface/trans.c (Call_to_gnu): If this is a function call and there is no target, do not create a temporary for the return value for an allocator either. From-SVN: r251695
2017-09-05re PR tree-optimization/82102 (ICE: Segmentation fault in ↵Richard Biener4-0/+32
/home/arnd/git/gcc/gcc/tree-ssa-pre.c:4863) 2017-09-05 Richard Biener <rguenther@suse.de> PR tree-optimization/82102 * tree-ssa-pre.c (fini_eliminate): Check if lhs is NULL. * gcc.dg/torture/pr82102.c: New testcase. From-SVN: r251692
2017-09-05trans.c (pos_to_constructor): Skip conversions to an unconstrained array type.Eric Botcazou5-1/+50
* gcc-interface/trans.c (pos_to_constructor): Skip conversions to an unconstrained array type. From-SVN: r251691