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2016-11-04Daily bump.GCC Administrator1-1/+1
2016-11-03re PR target/78192 (extract from vector registers to int results in wrong dat...Michael Meissner2-4/+8
2016-11-03re PR bootstrap/77993 (bootstrap failure on PowerPC/Linux)Michael Meissner3-4/+13
2016-11-03re PR debug/28767 (GCC should output DW_TAG_ptr_to_member for member functions)Jakub Jelinek14-31/+309
2016-11-03Use type_hash_eq langhook in check_qualified_type.Jason Merrill7-14/+44
2016-11-03* c-cppbuiltin.c (c_cpp_builtins): Correct __cpp_inheriting_constructors.Jason Merrill5-7/+12
2016-11-03Add missing hunk from previous commit.Richard Earnshaw1-3/+16
2016-11-03Default missing exponents to 0 with -fdec.Fritz Reese11-5/+110
2016-11-03[arm] Eliminate SUBTARGET_CPU_DEFAULTRichard Earnshaw8-44/+24
2016-11-03[DWARF] Enable DW_CFA_VAL_EXPRESSION supportJiong Wang4-11/+101
2016-11-03combine lhs zero_extract fix (PR78186)Segher Boessenkool2-0/+9
2016-11-03Support legacy PARAMETER statements with -std=legacy.Fritz O. Reese9-3/+195
2016-11-03sparc.md (vec_interleave_lowv8qi): Delete.Eric Botcazou2-28/+5
2016-11-03Make direct emission of time profiler counterMartin Liska7-39/+128
2016-11-03re PR libgcc/78067 (libgcc2 calls count_leading_zero with 0)Bernd Edlinger2-0/+8
2016-11-03rs6000.c (rs6000_xcoff_declare_object_name): Use symtab_node::get_create.Richard Biener2-2/+7
2016-11-03[rtlanal] Fix WORD_REGISTER_OPERATIONS condition in nonzero_bitsKyrylo Tkachov2-7/+12
2016-11-03[ARC] Define SIZE_TYPE and PTRDIFF_TYPE correctly.Vineet Gupta2-2/+7
2016-11-03make targetm.gen_ccmp{first,next} take rtx_insn **Trevor Saunders5-20/+30
2016-11-03tree-vect-loop.c (destroy_loop_vec_info): Handle cond_expr.Bin Cheng2-23/+67
2016-11-03Fix bougs PR 78170 failure for avrSenthil Kumar Selvaraj2-0/+6
2016-11-03Daily bump.GCC Administrator1-1/+1
2016-11-02i386.c (ix86_init_libfuncs): New.Uros Bizjak2-9/+56
2016-11-02nvptx.c (PTX_GANG_DEFAULT): Set to zero.Cesar Philippidis2-1/+6
2016-11-02xtensa: don't xfail gcc.c-torture/compile/20001226-1.cMax Filippov2-1/+4
2016-11-02xtensa: fix ICE on pr59037.c testMax Filippov2-21/+30
2016-11-02rs6000: Disable shrink-wrap-separate for abi=spe (PR78168)Segher Boessenkool2-0/+9
2016-11-02Fix for big-endian gcc.c-torture/execute/pr55750.cKyrylo Tkachov2-1/+7
2016-11-02Fix failing vminnm/vmaxnm test on ARM.Tamar Christina5-4/+15
2016-11-02gimple-ssa-store-merging.c: Include gimplify-me.h.Richard Biener4-9/+84
2016-11-02New warning -Wargument-mismatch for function argument mismatches.Fritz O. Reese7-14/+81
2016-11-02Allow warning flags to associate through gfc_error.Fritz Reese3-5/+22
2016-11-02Add LE/BE SHA1H patterns with a V2SI input.Wilco Dijkstra2-0/+26
2016-11-02The add expander still contains some expansion code that was required for the...Wilco Dijkstra2-19/+11
2016-11-02gimple-ssa-store-merging.c (struct store_immediate_info): Remove redundant va...Richard Biener2-87/+103
2016-11-02prod-options.c: XFAIL AIX.David Edelsohn6-2/+11
2016-11-02inline-var-1.C: XFAIL AIX.David Edelsohn4-8/+14
2016-11-02Fix linker detection in check_gc_sections_availableRainer Orth2-3/+6
2016-11-02Fix host_size_t_cst_p predicatMartin Liska4-1/+17
2016-11-02PR tree-optimization/78170: Truncate sign-extended padding when encoding bitf...Kyrylo Tkachov4-4/+62
2016-11-02PR tree-optimization/78162: Reject negative offsets in store merging earlyKyrylo Tkachov4-1/+22
2016-11-02[AArch64] Add function comments to some prologue/epilogue helpersKyrylo Tkachov2-0/+52
2016-11-02re PR tree-optimization/78035 (Inconsistency between address comparison and a...Richard Biener7-5/+79
2016-11-02re PR middle-end/78047 (Chromium apparently gets miscompiled)Richard Biener2-1/+7
2016-11-02tree-vrp.c (evrp_dom_walker::before_dom_children): Call infer_value_range on ...Richard Biener8-28/+132
2016-11-02remove cast from prev_nonnote_insn_bbTrevor Saunders3-3/+8
2016-11-02remove cast in delete_insn_chainTrevor Saunders3-6/+10
2016-11-02remove cast to rtx_insn * in remove_noteTrevor Saunders6-25/+45
2016-11-02split up some variables to use rtx_insn * moreTrevor Saunders5-91/+111
2016-11-02split up the trial variable in reorg.c:relax_delay_slots to use rtx_insn * moreTrevor Saunders2-10/+13
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