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From-SVN: r268225
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config/aarch64/aarch64.c:5678)
2019-01-23 Bin Cheng <bin.cheng@arm.com>
Steve Ellcey <sellcey@marvell.com>
PR target/85711
* recog.c (address_operand): Return false on wrong mode for address.
(constrain_operands): Check for mode with 'p' constraint.
Co-Authored-By: Steve Ellcey <sellcey@marvell.com>
From-SVN: r268219
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FSTYPE FUNC (DWtype u) in libgcc2.c, which converts DI/TI to SF/DF, has
/* No leading bits means u == minimum. */
if (count == 0)
return -(Wtype_MAXp1_F * (Wtype_MAXp1_F / 2));
in the third case (where actually count == 0 only means the high part is
minimum). It should be:
/* No leading bits means u == minimum. */
if (count == 0)
return Wtype_MAXp1_F * (FSTYPE) (hi | ((UWtype) u != 0));
instead.
gcc/testsuite/
2019-01-23 H.J. Lu <hongjiu.lu@intel.com>
PR libgcc/88931
* gcc.dg/torture/fp-int-convert-timode-1.c: New test.
* gcc.dg/torture/fp-int-convert-timode-2.c: Likewise.
* gcc.dg/torture/fp-int-convert-timode-3.c: Likewise.
* gcc.dg/torture/fp-int-convert-timode-4.c: Likewise.
libgcc/
2019-01-23 Joseph Myers <joseph@codesourcery.com>
PR libgcc/88931
* libgcc2.c (FSTYPE FUNC (DWtype u)): Correct no leading bits
case.
From-SVN: r268216
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From-SVN: r268198
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PR target/88998
* config/i386/sse.md (sse2_cvtpi2pd): Add SSE alternatives.
Disparage MMX alternative.
(sse2_cvtpd2pi): Ditto.
(sse2_cvttpd2pi): Ditto.
testsuite/ChangeLog:
PR target/88998
* g++.target/i386/pr88998.c: New test.
From-SVN: r268195
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* parser.c (cp_parser_direct_declarator): don't treat qualified-ids
in parameter-list as types if name lookup for declarator-id didn't
find one or more function templates.
* g++.dg/cpp0x/dependent2.c: new test.
* g++.dg/cpp2a/typename10.c: remove dg-error.
* g++.dg/cpp2a/typename12.c: new test.
* g++.dg/template/static30.c: remove dg-error.
From-SVN: r268192
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Running:
$ valgrind ./xgcc -B. -c test.c -march=native
on aarch64 shows a use-after-free in host_detect_local_cpu due
to the std::string result of aarch64_get_extension_string_for_isa_flags
only living until immediately after a c_str call.
This leads to corrupt "-march=" values being passed to cc1.
This patch fixes the use-after-free, though it appears to also need
Tamar's patch here:
https://gcc.gnu.org/ml/gcc-patches/2018-12/msg01302.html
in order to generate valid values for cc1. This may have worked by
accident in the past, if the corrupt "-march=" value happened to be
0-terminated in the "right" place; with this patch it now appears
to reliably break without Tamar's patch.
gcc/ChangeLog:
PR driver/89014
* config/aarch64/driver-aarch64.c (host_detect_local_cpu): Fix
use-after-free of the result of
aarch64_get_extension_string_for_isa_flags.
From-SVN: r268189
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with g++)
PR c/44715
* cp-gimplify.c (genericize_cp_loop): Call begin_bc_block only
after genericizing cond and incr expressions.
* doc/extend.texi: Document break and continue behavior in
statement expressions.
* c-c++-common/pr44715.c: New test.
From-SVN: r268188
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PR c++/88984
* cp-gimplify.c (genericize_switch_stmt): Move cond genericization
before the begin_bc_block call.
* c-c++-common/pr88984.c: New test.
From-SVN: r268187
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2019-01-23 Richard Biener <rguenther@suse.de>
PR tree-optimization/89008
* tree-ssa-reassoc.c (eliminate_using_constants): For * 0 do
not leave another stray operand.
* gcc.dg/torture/pr89008.c: New testcase.
From-SVN: r268186
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PR c++/88293 - ICE with comma expression.
* constexpr.c (initialized_type): Don't shortcut non-void type.
Handle COMPOUND_EXPR.
(cxx_eval_outermost_constant_expr): Return early for void type.
From-SVN: r268185
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From-SVN: r268184
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returns by reference...
* cgraphunit.c (cgraph_node::expand_thunk): When expanding a GIMPLE
thunk that returns by reference, use the type of the return object
of the thunk instead of that of the alias to build the dereference.
From-SVN: r268182
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Atomics use DMB instruction to enforce ordering of loads/stores.
Currently gcc generates DMB w/o any arg which is a no-op. Fix that by
generating DMB 3 which enforces R+W ordering. It is stricter than what
acq/rel expect, but there's no other way.
gcc/
2019-xx-xx Vineet Gupta <vgupta@synopsys.com>
* config/arc/atomic.md: Add operand to DMB instruction
From-SVN: r268181
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PR tree-optimization/88964
* gimple-loop-interchange.cc (loop_cand::analyze_induction_var): Use
build_zero_cst instead of build_int_cst. Return false for loop
invariants which honor signed zeros.
* gfortran.dg/pr88964.f90: New test.
From-SVN: r268179
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gcc/testsuite/ChangeLog:
* c-c++-common/Warray-bounds-2.c: Include headers only if they exist.
* c-c++-common/Warray-bounds-3.c: Make xfails conditional on target
non_strict_align.
* c-c++-common/Wrestrict-2.c: Include headers only if they exist.
* c-c++-common/Wrestrict.c: Make xfails conditional on target
non_strict_align.
From-SVN: r268175
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From-SVN: r268174
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It is enabled at -O3, but the doc currently says -O2. This fixes it.
* doc/invoke.texi (-fsplit-paths): This is enabled by default at -O3.
From-SVN: r268170
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2018-01-22 Steve Ellcey <sellcey@marvell.com>
c-c++-common/gomp/pr60823-1.c: Change aarch64-*-* target
to aarch64*-*-* target.
c-c++-common/gomp/pr60823-3.c: Ditto.
g++.dg/gomp/declare-simd-1.C: Ditto.
g++.dg/gomp/declare-simd-3.C: Ditto.
g++.dg/gomp/declare-simd-4.C: Ditto.
g++.dg/gomp/declare-simd-7.C: Ditto.
g++.dg/gomp/pr88182.C: Ditto.
gcc.dg/gomp/declare-simd-1.c: Ditto.
gcc.dg/gomp/declare-simd-3.c: Ditto.
gcc.dg/gomp/pr59669-2.c: Ditto.
gcc.dg/gomp/pr87895-1.c: Ditto.
gcc.dg/gomp/simd-clones-2.c: Ditto.
gfortran.dg/gomp/declare-simd-2.f90: Ditto.
gfortran.dg/gomp/pr79154-1.f90: Ditto.
gfortran.dg/gomp/pr83977.f90: Ditto.
From-SVN: r268168
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Fixes bootstrap regression introduced by the previous merge.
Reviewed-on: https://github.com/dlang/dmd/pull/9283
From-SVN: r268167
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PR target/88965
* config/rs6000/rs6000.c: Include tree-vrp.h and tree-ssanames.h.
(rs6000_gimple_fold_builtin): If MEM_REF address doesn't satisfy
is_gimple_mem_ref_addr predicate, force it into a SSA_NAME first.
* gcc.target/powerpc/pr88965.c: New test.
From-SVN: r268166
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PR middle-end/88968
* gimplify.c (gimplify_omp_atomic): Handle bitfield atomics with
non-integral DECL_BIT_FIELD_REPRESENTATIVEs.
* c-omp.c (c_finish_omp_atomic): For bitfield atomics, update type
variable after using BIT_FIELD_REF.
* c-c++-common/gomp/atomic-23.c: New test.
From-SVN: r268165
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r263751)
PR target/87064
* config/rs6000/vsx.md (*vsx_reduc_<VEC_reduc_name>_v2df_scalar):
Disable for little endian.
From-SVN: r268164
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2019-01-22 Harald Anlauf <anlauf@gmx.de>
PR fortran/88579
* trans-expr.c (gfc_conv_power_op): Handle cases of (2**e) ** integer
and (- 2**e) ** integer.
2019-01-22 Harald Anlauf <anlauf@gmx.de>
PR fortran/88579
* gfortran.dg/power_8.f90: New test.
From-SVN: r268163
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2019-01-22 Sandra Loosemore <sandra@codesourcery.com>
gcc/testsuite/
* g++.dg/lto/pr87906_0.C: Add dg-require-effective-target fpic.
* g++.dg/vec-init-1.C: Likewise.
* gcc.dg/pr87793.c: Likewise.
From-SVN: r268162
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2019-01-22 Sandra Loosemore <sandra@codesourcery.com>
gcc/testsuite/
* g++.dg/cpp0x/pr86397-1.C: Add -fdelete-null-pointer-checks.
* g++.dg/cpp0x/pr86397-2.C: Likewise.
From-SVN: r268161
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A bitfield that is exactly the same size as an integral type and
naturally aligned will have DECL_BIT_FIELD cleared. So we need to
check DECL_BIT_FIELD_TYPE to be sure whether or not the underlying
type was declared with a bitfield declaration.
I've also added a test for bitfields that are based on overaligned types.
PR target/88469
gcc:
* config/arm/arm.c (arm_needs_double_word_align): Check
DECL_BIT_FIELD_TYPE.
gcc/testsuite:
* gcc.target/arm/aapcs/bitfield2.c: New test.
* gcc.target/arm/aapcs/bitfield3.c: New test.
From-SVN: r268160
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Fix a failing test - changes in Combine mean the test now fails
eventhough the generated code is the same. Given there are several
AArch64-specific tests for vec-select, remove the scanning of Combine
output. Committed as trivial fix.
testsuite/
PR rtl-optimization/87763
* gcc.dg/vect/vect-nop-move.c: Fix testcase on AArch64.
From-SVN: r268159
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There are
struct builtin_description
{
const HOST_WIDE_INT mask;
const enum insn_code icode;
const char *const name;
const enum ix86_builtins code;
const enum rtx_code comparison;
const int flag;
};
Since "mask" is used for both ix86_isa_flags and ix86_isa_flags2, buitins
with both flags can't be handled easily. This patch adds mask2 to
builtin_description to handle it properly.
2019-01-22 Hongtao Liu <hongtao.liu@intel.com>
H.J. Lu <hongjiu.lu@intel.com>
PR target/88909
* config/i386/i386-builtin.def: Add mask2 to all builtin
initializations. Merge ARGS2 and SPECIAL_ARGS2 into ARGS and
SPECIAL_ARGS.
* config/i386/i386.c (BDESC): Add mask2 to the definition.
(BDESC_FIRST): Likewise.
(define_builtin): Add an argument for mask2. Updated to handle
both ix86_isa_flags and ix86_isa_flags2.
(define_builtin_const): Likewise.
(define_builtin_pure): Likewise.
(define_builtin2): Deleted.
(define_builtin_const2): Likewise.
(builtin_description): Add a member, mask2.
(bdesc_*): Add mask2 to builtin initializations.
(ix86_init_mmx_sse_builtins): Update calls to def_builtin,
def_builtin_const and def_builtin_pure. Remove SPECIAL_ARGS2
support.
(ix86_get_builtin_func_type): Remove SPECIAL_ARGS2 support.
Co-Authored-By: H.J. Lu <hongjiu.lu@intel.com>
From-SVN: r268155
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For the gofrontend copy, change calls to types.SizesFor to pass
"gccgo" rather than "gc". Leave the asmdecl pass unchanged since that
pass is gc-specific anyhow.
This has been fixed in a better way in the external repo by
https://golang.org/cl/158317 and friends, but that is not in 1.12, so
use this approach for now.
Reviewed-on: https://go-review.googlesource.com/c/158842
From-SVN: r268153
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With noplt attribute, we load the external function address via the GOT
slot so that linker won't create an PLT entry for extern function address.
gcc/
PR target/88954
* config/i386/i386.c (ix86_force_load_from_GOT_p): Also check
noplt attribute.
gcc/testsuite/
PR target/88954
* gcc.target/i386/pr88954-1.c: New test.
* gcc.target/i386/pr88954-2.c: Likewise.
From-SVN: r268152
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Unfortunately another PCS bug has come to light with the layout of
structs whose alignment is dominated by a 64-bit bitfield element.
Such fields in the type list appear to have alignment 1, but in
reality, for the purposes of alignment of the underlying structure,
the alignment is derived from the underlying bitfield's type. We've
been getting this wrong since support for over-aligned record types
was added several releases back. Worse still, the existing code may
generate unaligned memory accesses that may fault on some versions of
the architecture.
I've taken the opportunity to add a few more tests that check the
passing arguments with overalignment in the PCS. Looking through the
existing tests it looked like they were really only checking
self-consistency and not the precise location of the arguments.
PR target/88469
gcc:
* config/arm/arm.c (arm_needs_doubleword_align): Return 2 if a record's
alignment is dominated by a bitfield with 64-bit aligned base type.
(arm_function_arg): Emit a warning if the alignment has changed since
earlier GCC releases.
(arm_function_arg_boundary): Likewise.
(arm_setup_incoming_varargs): Likewise.
gcc/testsuite:
* gcc.target/arm/aapcs/bitfield1.c: New test.
* gcc.target/arm/aapcs/overalign_rec1.c: New test.
* gcc.target/arm/aapcs/overalign_rec2.c: New test.
* gcc.target/arm/aapcs/overalign_rec3.c: New test.
From-SVN: r268151
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2019-01-22 Manfred Schwarb <manfred99@gmx.ch>
* gfortran.dg/array_function_5.f90: Fix a dg directive.
* gfortran.dg/block_16.f08: Likewise.
* gfortran.dg/dec_structure_14.f90: Likewise.
* gfortran.dg/namelist_96.f90: Likewise.
* gfortran.dg/newunit_5.f90.f90: Moved to
* gfortran.dg/newunit_5.f90: here.
* gfortran.dg/pdt_28.f03: Likewise.
* gfortran.dg/spread_simplify_1.f90: Likewise.
From-SVN: r268148
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graphite-sese-to-poly.c:313)
2019-01-22 Richard Biener <rguenther@suse.de>
PR tree-optimization/88862
* graphite-scop-detection.c
(scop_detection::graphite_can_represent_scev): Reject ADDR_EXPR.
From-SVN: r268147
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2019-01-22 Andrew Stubbs <ams@codesourcery.com>
* doc/extend.tex (AMD GCN Function Attributes): New section.
* doc/install.texi (amdgcn-unknown-amdhsa): New instructions.
* doc/invoke.texi (AMD GCN Options): New section.
* doc/md.texi (Constraints for Particular Machines): Add AMD GCN.
From-SVN: r268146
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HIGH/LO_SUM combinations for labels in...
* config/sparc/sparc.c (parc_delegitimize_address): Recognize the GOT
register and decoded HIGH/LO_SUM combinations for labels in PIC mode.
From-SVN: r268145
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gcc/testsuite/ChangeLog:
PR/tree-optimization 88903
* gcc.dg/vect/pr88903-1.c: Add explicit &.
From-SVN: r268144
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after r266171)
PR tree-optimization/88044
* tree-ssa-loop-niter.c (number_of_iterations_cond): If condition
is false in the first iteration, but !every_iteration, return false
instead of true with niter->niter zero.
From-SVN: r268143
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threading.)
PR rtl-optimization/88904
* cfgcleanup.c (thread_jump): Verify cond2 doesn't mention
any nonequal registers before processing BB_END (b).
* gcc.c-torture/execute/pr88904.c: New test.
From-SVN: r268140
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__builtin_popcountll)
PR target/88905
* optabs.c (add_equal_note): Add op0_mode argument, use it instead of
GET_MODE (op0).
(expand_binop_directly, expand_doubleword_clz,
expand_doubleword_popcount, expand_ctz, expand_ffs,
expand_unop_direct, maybe_emit_unop_insn): Adjust callers.
* gcc.dg/pr88905.c: New test.
From-SVN: r268139
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PR rtl-optimization/49429
PR target/49454
PR rtl-optimization/86334
PR target/88906
* expr.c (emit_block_move_hints): Move marking of MEM_EXPRs
addressable from here...
(emit_block_op_via_libcall): ... to here.
* gcc.target/i386/pr86334.c: New test.
* gcc.target/i386/pr88906.c: New test.
From-SVN: r268138
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vector to fix memleak.
2019-01-22 Richard Biener <rguenther@suse.de>
* tree-vect-loop.c (vect_analyze_loop_operations): Use
auto_vec for cost vector to fix memleak.
(vectorize_fold_left_reduction): Properly gather SLP defs.
(vectorizable_comparison): Do not swap operands to properly
gather SLP defs.
From-SVN: r268137
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The direct cause of this PR is the fact that tls_gdld_nomark didn't
handle indirect calls. Also, most indirect calls were being optimised
back to direct calls anyway, due to tls_gdld_nomark not checking any
of the parallel elements except the first (plus the extra element that
distinguishes this call from normal calls). There were other unwanted
substitutions too.
So this patch attacks the problem of handling special calls in a
different way. Rather than adding another element to the call insn
parallel to distinguish -mno-tls-markers __tls_get_addr calls from any
other calls, we now inspect the second CALL arg. Each
call_value_nonlocal and call_value_indirect insn now checks for the
tlsgd/ld unspecs when !TARGET_TLS_MARKERS and emits the arg setup
insns. I disallow the local call patterns since we'll only see local
calls to __tls_get_addr in testcases, and it doesn't seem a good idea
to complicate the patterns just for a minor optimisation. Sibling
call insns aren't used for libcalls, so none of these insns need to
change.
The patch also fixes a minor problem with -mno-tls-markers
__tls_get_addr calls causing a "li 3,0" instruction to be emitted
prior to the arg setup instructions, due to using a libcall with one
arg. That isn't correct when the call insn itself sets up its arg.
Also, I've tidied the V4 secure-plt calls, generating them in
rs6000_call_sysv rather than by splitting in rs6000.md. The
CALL_INSN_FUNCTION_USAGE added in edit_tls_call_insn is no longer
needed (since git commit 0a4b5c66df9).
On the subject of unwanted substitutions, I also saw a
_GLOBAL_OFFSET_TABLE_ symbol_ref being substituted for the GOT reg,
resulting in code like "addi 3,_GLOBAL_OFFSET_TABLE_,tls_ld@got@tlsld".
Fixed by the unspec_tls change.
PR target/88614
* config/rs6000/predicates.md (unspec_tls): Ensure GOT reg
stays a reg. Allow a const_int.
* config/rs6000/rs6000-protos.h (rs6000_output_tlsargs): Declare.
* config/rs6000/rs6000.h (IS_V4_FP_ARGS): Define.
(IS_NOMARK_TLSGETADDR): Define.
* config/rs6000/rs6000.c (edit_tls_call_insn): Delete.
(rs6000_output_tlsargs): New function.
(rs6000_legitimize_tls_address): Don't say a !TARGET_TLS_MARKERS
__tls_get_addr call takes an arg.
(rs6000_call_sysv): Generate sysv4 secure plt call pattern here..
* config/rs6000/rs6000.md (call_nonlocal_sysv): ..rather than here,
delete split..
(call_value_nonlocal_sysv): ..or here, delete split.
(tls_gdld_nomark): Delete.
(call_value_indirect_nonlocal_sysv): Use unspec_tls as operand2
predicate. Call rs6000_output_tlsargs. Adjust length to suit.
(call_value_nonlocal_sysv): Likewise.
(call_value_nonlocal_sysv_secure): Likewise.
(call_value_nonlocal_aix): Likewise.
(call_value_indirect_aix): Likewise.
(call_value_indirect_elfv2): Likewise.
(call_value_local32, call_value_local64): Disable for no-mark tls.
(call_value_local_aix): Likewise.
From-SVN: r268135
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From-SVN: r268134
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PR go/88927
runtime, internal/cpu: fix build for ARM GNU/Linux
Was failing with
../../../libgo/go/internal/cpu/cpu.go:138:2: error: reference to undefined name 'doinit'
138 | doinit()
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Fix it by adding in Go 1.12 internal/cpu/cpu_arm.go, and the code in
runtime that initializes the values.
Fixes https://gcc.gnu.org/PR88927.
Reviewed-on: https://go-review.googlesource.com/c/158717
From-SVN: r268131
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Restore some of the fixes that were applied to golang_org/x/net/lif
but were lost when 1.12 moved the directory to internal/x/net/lif.
Add support for reading /proc to fetch argc/argv/env for c-archive mode.
Reviewed-on: https://go-review.googlesource.com/c/158640
From-SVN: r268130
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If there is an error reading or parsing an archive header, the
Archive_iterator code would return a dummy header but would not mark
itself as done. The effect is that an invalid archive leads to an
endless loop reading and re-reading the same archive header. Avoid
that by setting the offset to the end of the file, which will cause
the iterator to == archive_end.
No test since it doesn't seem worth constructing an invalid archive.
Reviewed-on: https://go-review.googlesource.com/c/158217
From-SVN: r268129
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PR c++/88949
* optimize.c (cxx_copy_decl): New function.
(clone_body): Use it instead of copy_decl_no_change.
* g++.dg/gomp/pr88949.C: New test.
From-SVN: r268127
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* Fix a typo in the previous commit.
From-SVN: r268126
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2019-01-21 Manfred Schwarb <manfred99@gmx.ch>
* class_66.f90: Fix a dg directive.
* debug/pr35154-stabs.f: Likewise.
* dec_d_lines_3.f: Likewise.
* dec_d_lines_3.f: Likewise.
* dec_structure_12.f90: Likewise.
* dec_structure_15.f90: Likewise.
* deferred_character_31.f90: Likewise.
* dtio_31.f03: Likewise.
* dtio_32.f03: Likewise.
* extends_11.f03: Likewise.
* integer_plus.f90: Likewise.
* pdt_25.f03: Likewise.
* pr58968.f: Likewise.
* pr78259.f90: Likewise.
* vect/vect-2.f90: Likewise.
* matmul_const.f90: Likewise.
From-SVN: r268125
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