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2016-11-24Allow -fopenmp in NVPTX mkoffloadAlexander Monakov2-2/+7
PR target/67822 * config/nvptx/mkoffload.c (main): Allow -fopenmp. From-SVN: r242842
2016-11-24sparc-common.c (sparc_option_optimization_table): Enable REE at -O2 and higher.Eric Botcazou3-0/+14
* common/config/sparc/sparc-common.c (sparc_option_optimization_table): Enable REE at -O2 and higher. * config/sparc/sparc.c (sparc_option_override): Disable it by default in 32-bit mode. From-SVN: r242841
2016-11-24[TER] PR target/48863 : Don't replace expressions across local register ↵Kyrylo Tkachov4-4/+74
variable definitions PR target/48863 PR inline-asm/70184 * tree-ssa-ter.c (temp_expr_table): Add reg_vars_cnt field. (new_temp_expr_table): Initialise reg_vars_cnt. (free_temp_expr_table): Release reg_vars_cnt. (process_replaceable): Add reg_vars_cnt argument, set reg_vars_cnt field of TAB. (find_replaceable_in_bb): Use the above to record register variable write occurrences and cancel replacement across them. * gcc.target/arm/pr48863.c: New test. From-SVN: r242840
2016-11-24re PR rtl-optimization/78437 (invalid sign-extend conversion in REE pass)Eric Botcazou2-0/+54
PR rtl-optimization/78437 * ree.c (get_uses): New function. (combine_reaching_defs): When a copy is needed, return false if any reaching use of the source register reads it in a mode larger than the mode it is set in and WORD_REGISTER_OPERATIONS is true. From-SVN: r242839
2016-11-24Dump probability for edges a frequency for BBsMartin Liska13-21/+107
* gimple-pretty-print.c (dump_edge_probability): New function. (dump_gimple_switch): Dump label edge probabilities. (dump_gimple_cond): Likewise. (dump_gimple_label): Dump (dump_gimple_bb_header): Dump basic block frequency. (pp_cfg_jump): Replace e->dest argument with e. (dump_implicit_edges): Likewise. * tree-ssa-loop-ivopts.c (get_scaled_computation_cost_at): Use gimple_bb (at) instead of at->bb. * gcc.dg/builtin-unreachable-6.c: Update test to not to scan parts for frequencies/probabilities. * gcc.dg/pr34027-1.c: Likewise. * gcc.dg/strict-overflow-2.c: Likewise. * gcc.dg/tree-ssa/20040703-1.c: Likewise. * gcc.dg/tree-ssa/builtin-sprintf-2.c: Likewise. * gcc.dg/tree-ssa/pr32044.c: Likewise. * gcc.dg/tree-ssa/vector-3.c: Likewise. * gcc.dg/tree-ssa/vrp101.c: Likewise. * gcc.dg/tree-ssa/dump-2.c: New test. From-SVN: r242837
2016-11-24common.opt (flimit-function-alignment): New.Bernd Schmidt8-4/+43
gcc/ * common.opt (flimit-function-alignment): New. * doc/invoke.texi (-flimit-function-alignment): Document. * emit-rtl.h (struct rtl_data): Add max_insn_address field. * final.c (shorten_branches): Set it. * varasm.c (assemble_start_function): Limit alignment if requested. gcc/testsuite/ * gcc.target/i386/align-limit.c: New test. From-SVN: r242836
2016-11-24re PR tree-optimization/71595 (ICE on valid code at -O2 and -O3 on ↵Richard Biener6-13/+55
x86_64-linux-gnu: in check_loop_closed_ssa_use, at tree-ssa-loop-manip.c:704) 2016-11-24 Richard Biener <rguenther@suse.de> PR tree-optimization/71595 * cfgloopmanip.h (remove_path): Add irred_invalidated and loop_closed_ssa_invalidated parameters, defaulted to NULL. * cfgloopmanip.c (remove_path): Likewise, pass them along to called functions. Only fix irred flags if the caller didn't request state. * tree-ssa-loop-ivcanon.c (unloop_loops): Use add_bb_to_loop. (unloop_loops): Pass irred_invalidated and loop_closed_ssa_invalidated to remove_path. * gcc.dg/torture/pr71595.c: New testcase. From-SVN: r242835
2016-11-24re PR rtl-optimization/78120 (If conversion no longer performed)Bernd Schmidt4-10/+61
PR rtl-optimization/78120 * ifcvt.c (noce_conversion_profitable_p): Check original cost in all cases, and additionally test against max_seq_cost for speed optimization. (noce_process_if_block): Compute an estimate for the original cost when optimizing for speed, using the minimum of then and else block costs. testsuite/ PR rtl-optimization/78120 * gcc.target/i386/pr78120.c: New test. From-SVN: r242834
2016-11-24re PR rtl-optimization/78120 (If conversion no longer performed)Bernd Schmidt2-1/+4
PR rtl-optimization/78120 * rtlanal.c (insn_rtx_cost): Use set_rtx_cost. From-SVN: r242833
2016-11-24re PR rtl-optimization/78120 (If conversion no longer performed)Bernd Schmidt2-1/+23
PR rtl-optimization/78120 * config/i386/i386.c (ix86_rtx_costs): Fully handle SETs. From-SVN: r242832
2016-11-24match.pd: Refine type conversion in result expr for below pattern: (cond ↵Bin Cheng2-3/+9
(cmp (convert1? * match.pd: Refine type conversion in result expr for below pattern: (cond (cmp (convert1? x) c1) (convert2? x) c2) -> (minmax (x c)). From-SVN: r242831
2016-11-24re PR middle-end/78429 (ICE in set_value_range, at tree-vrp.c on ↵Eric Botcazou5-7/+50
non-standard boolean) PR middle-end/78429 * tree.h (wi::fits_to_boolean_p): New predicate. (wi::fits_to_tree_p): Use it for boolean types. * tree.c (int_fits_type_p): Likewise. From-SVN: r242829
2016-11-24cp_parser_range_for: use safe_push instead of quick_push (PRMartin Liska4-4/+26
PR bootstrap/78493 * parser.c (cp_parser_range_for): Use safe_push instead of quick_push. PR bootstrap/78493 * g++.dg/cpp1z/decomp18.C: New test. From-SVN: r242828
2016-11-24ldp_stp_1.c: Add -mcpu=generic.Naveen H.S3-2/+7
2016-11-23 Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com> * gcc.target/aarch64/ldp_stp_1.c : Add -mcpu=generic. * gcc.target/aarch64/store-pair-1.c : Likewise. From-SVN: r242827
2016-11-24re PR middle-end/71762 (~X & Y to X < Y doesn't work for uninitialized values)Richard Biener1-1/+3
2016-11-23 Richard Biener <rguenther@suse.de> PR middle-end/71762 * match.pd ((~X & Y) -> X < Y, (X & ~Y) -> Y < X, (~X | Y) -> X <= Y, (X | ~Y) -> Y <= X): Remove. * gcc.dg/torture/pr71762-1.c: New testcase. * gcc.dg/torture/pr71762-2.c: Likewise. * gcc.dg/torture/pr71762-3.c: Likewise. * gcc.dg/tree-ssa/forwprop-28.c: XFAIL. From-SVN: r242822
2016-11-24fmaxmin.c: Add -fno-vect-cost-model.Naveen H.S13-12/+27
2016-11-23 Naveen H.S <Naveen.Hurugalawadi@caviumnetworks.com> * gcc.target/aarch64/fmaxmin.c : Add -fno-vect-cost-model. * gcc.target/aarch64/fmul_fcvt_2.c : Likewise. * gcc.target/aarch64/vect-abs-compile.c : Likewise. * gcc.target/aarch64/vect-clz.c : Likewise. * gcc.target/aarch64/vect-fcm-eq-d.c : Likewise. * gcc.target/aarch64/vect-fcm-ge-d.c : Likewise. * gcc.target/aarch64/vect-fcm-gt-d.c : Likewise. * gcc.target/aarch64/vect-fmovd-zero.c : Likewise. * gcc.target/aarch64/vect-fmovd.c : Likewise. * gcc.target/aarch64/vect-fmovf-zero.c : Likewise. * gcc.target/aarch64/vect-fmovf.c : Likewise. * gcc.target/aarch64/vect_ctz_1.c : Likewise. From-SVN: r242821
2016-11-24Fix print_node for CONSTRUCTORsMartin Liska3-29/+25
* print-tree.c (struct bucket): Remove. (print_node): Add new argument which drives whether a tree node is printed briefly or not. (debug_tree): Replace a custom hash table with hash_set<T>. * print-tree.h (print_node): Add the argument. From-SVN: r242820
2016-11-24nios2.c (nios2_init_libfuncs): Add ATTRIBUTE_UNUSED.Chung-Lin Tang2-1/+5
2016-11-24 Chung-Lin Tang <cltang@codesourcery.com> * config/nios2/nios2.c (nios2_init_libfuncs): Add ATTRIBUTE_UNUSED. From-SVN: r242819
2016-11-23re PR target/78458 (LRA ICE building libgcc for powerpc-linux-gnuspe e500v2)Peter Bergner4-3/+31
gcc/ PR target/78458 * config/rs6000/rs6000.h (HARD_REGNO_CALLER_SAVE_MODE): Return MODE if it is at least NREGS wide. gcc/testsuite/ PR target/78458 * gcc.target/powerpc/pr78458.c: New. From-SVN: r242818
2016-11-24Daily bump.GCC Administrator1-1/+1
From-SVN: r242817
2016-11-23Fix e500 offset handling for TImode.Joseph Myers2-4/+9
Given my previous fix for a missing insn pattern for e500, building glibc runs into an assembler error "Error: operand out of range (256 is not between 0 and 248)". This comes from an insn: (insn 115 1209 1210 (set (reg:DF 27 27 [orig:294 _129 ] [294]) (subreg:DF (mem/c:TI (plus:SI (reg/f:SI 1 1) (const_int 256 [0x100])) [14 %sfp+256 S16 A128]) 0)) 1909 {*frob_df_ti} (nil)) This patch adjusts the offset handling for TImode - and TDmode and PTImode in case such subregs can arise for them - to be the same as for TFmode, so that proper SPE offset checks are made in the TARGET_E500_DOUBLE case. This allows the glibc build to complete. Testing shows 372 FAILs across the gcc, g++ and libstdc++ testsuites; more cleanup is certainly needed, but this gets to the point where the toolchain at least builds so it's possible to compare test results when fixing bugs. * config/rs6000/rs6000.c (rs6000_legitimate_offset_address_p): For TARGET_E500_DOUBLE. handle TDmode, TImode and PTImode the same as TFmode, IFmode and KFmode. From-SVN: r242814
2016-11-23Add another e500 subreg pattern.Joseph Myers4-0/+28
Building glibc for powerpc-linux-gnuspe --enable-e500-double, given the patch <https://gcc.gnu.org/ml/gcc-patches/2016-11/msg02404.html> applied, fails with errors such as: ../sysdeps/ieee754/ldbl-128ibm/s_modfl.c: In function '__modfl': ../sysdeps/ieee754/ldbl-128ibm/s_modfl.c:91:1: error: unrecognizable insn: } ^ (insn 31 30 32 2 (set (reg:DF 203) (subreg:DF (reg:TI 202) 8)) "../sysdeps/ieee754/ldbl-128ibm/s_modfl.c":44 -1 (nil)) ../sysdeps/ieee754/ldbl-128ibm/s_modfl.c:91:1: internal compiler error: in extract_insn, at recog.c:2311 This patch adds an insn pattern similar to various patterns already present to handle extracting such a subreg. This allows the glibc build to get further, until it runs into an assembler error for which I have another patch. gcc: * config/rs6000/spe.md (*frob_<SPE64:mode>_ti_8): New insn pattern. gcc/testsuite: * gcc.c-torture/compile/20161123-1.c: New test. From-SVN: r242813
2016-11-24combine: Query can_change_dest_mode before changing dest modeSegher Boessenkool2-1/+7
As reported in https://gcc.gnu.org/ml/gcc-patches/2016-11/msg02388.html . Changing the mode of a hard register can lead to problems, or at least it can make worse code if the result will need reloads. * combine.c (change_zero_ext): Only change the mode of a hard register destination if can_change_dest_mode holds for that. From-SVN: r242812
2016-11-23* varasm.c (assemble_name): Increase buffer size for name.Jeff Law2-1/+3
From-SVN: r242810
2016-11-23* config/i386/i386.md: Move some insn patterns around.Uros Bizjak1-225/+225
From-SVN: r242809
2016-11-23* config/spu/spu.md (floatunsdidf2): Remove unused local variable.Jeff Law2-1/+5
From-SVN: r242807
2016-11-23* doc/extend.texi: Constify first argument to __builtin_object_size.Jakub Kicinski2-1/+5
From-SVN: r242804
2016-11-23opth-gen.awk: Use unsigned shifts for bit masks.Bernd Edlinger2-6/+11
2016-11-07 Bernd Edlinger <bernd.edlinger@hotmail.de> * opth-gen.awk: Use unsigned shifts for bit masks. Allow all bits to be used. Add brackets around macro argument. From-SVN: r242803
2016-11-23re PR fortran/78297 (ICE in finish_equivalences, at fortran/trans-common.c:1246)Steven G. Kargl4-2/+27
2016-11-23 Steven G. Kargl <kargl@gcc.gnu.org> PR fortran/78297 * trans-common.c (finish_equivalences): Do not dereference a NULL pointer. 2016-11-23 Steven G. Kargl <kargl@gcc.gnu.org> PR fortran/78297 * gfortran.dg/pr78297.f90: New test. From-SVN: r242802
2016-11-23* gcc.target/powerpc/builtins-3.c: Add -maltivec and -mvsx options.David Edelsohn2-2/+7
From-SVN: r242800
2016-11-23i386.md (*<any_or:code>hi_1): Fix operand 2 constraints.Uros Bizjak2-62/+67
* config/i386/i386.md (*<any_or:code>hi_1): Fix operand 2 constraints. From-SVN: r242796
2016-11-23re PR sanitizer/69278 (Confusion option handling for -sanitize-recovery=alll)Jakub Jelinek5-1/+49
PR sanitizer/69278 * opts.c (parse_sanitizer_options): For -fsanitize=undefined, restore enabling also SANITIZE_UNREACHABLE and SANITIZE_RETURN. * g++.dg/ubsan/return-7.C: New test. * c-c++-common/ubsan/unreachable-4.c: New test. From-SVN: r242795
2016-11-23re PR tree-optimization/78482 (wrong code at -O3 in both 32-bit and 64-bit ↵Jakub Jelinek2-3/+17
modes on x86_64-linux-gnu) PR tree-optimization/78482 * gcc.dg/torture/pr78482.c (c, d): Use signed char instead of char. (bar): New function. (main): Call bar instead of printf. From-SVN: r242794
2016-11-23re PR middle-end/69183 (ICE when using OpenMP PRIVATE keyword in OMP DO loop ↵Jakub Jelinek4-13/+48
not explicitly encapsulated in OMP PARALLEL region) PR middle-end/69183 * omp-low.c (build_outer_var_ref): Change lastprivate argument to code, pass it recursively, adjust uses. For OMP_CLAUSE_PRIVATE on worksharing constructs, treat it like clauses on simd construct. Formatting fix. (lower_rec_input_clauses): For OMP_CLAUSE_PRIVATE_OUTER_REF pass OMP_CLAUSE_PRIVATE as last argument to build_outer_var_ref. (lower_lastprivate_clauses): Pass OMP_CLAUSE_LASTPRIVATE instead of true as last argument to build_outer_var_ref. * gfortran.dg/gomp/pr69183.f90: New test. From-SVN: r242793
2016-11-23re PR target/78230 (Compile pr66178.c fail for mips64el-elf with N64 abi)Kito Cheng2-2/+10
PR target/78230 * gcc.dg/torture/pr66178.c (test): Use uintptr_t instead of int. (test2) Ditto. From-SVN: r242792
2016-11-23i386.md (*movqi_internal): Calculate mode attribute of alternatives 7,8,9 ↵Uros Bizjak2-85/+145
depending on TARGET_AVX512DQ. * gcc.target/config/i386.md (*movqi_internal): Calculate mode attribute of alternatives 7,8,9 depending on TARGET_AVX512DQ. <TYPE_MSKMOV>: Emit kmovw for MODE_HI insn mode attribute. (*k<logic><mode>): Calculate mode attribute depending on TARGET_AVX512DQ. Emit k<logic>w for MODE_HI insn mode attribute. (*andqi_1): Calculate mode attribute of alternative 3 depending on TARGET_AVX512DQ. Emit kandw for MODE_HI insn mode attribute. (kandn<mode>): Calculate mode attribute of alternative 2 depending on TARGET_AVX512DQ. Emit kandnw for MODE_HI insn mode attribute. (kxnor<mode>): Merge insn patterns using SWI1248_AVX512BW mode iterator. Calculate mode attribute of alternative 1 depending on TARGET_AVX512DQ. Emit kxnorw for MODE_HI insn mode attribute. (*one_cmplqi2_1): Calculate mode attribute of alternative 2 depending on TARGET_AVX512DQ. Emit knotw for MODE_HI insn mode attribute. From-SVN: r242791
2016-11-23re PR c++/77907 (Add "const" to argument of constexpr constructor causes the ↵Jakub Jelinek4-1/+40
object to be left in unconstructed state) PR c++/77907 * cp-gimplify.c (cp_fold) <case CALL_EXPR>: When calling constructor and maybe_constant_value returns non-CALL_EXPR, create INIT_EXPR with the object on lhs and maybe_constant_value returned expr on rhs. * g++.dg/cpp0x/pr77907.C: New test. From-SVN: r242790
2016-11-23* config/mcore/mcore.c (emit_new_cond_insn): Fix prototype.Jeff Law2-1/+3
From-SVN: r242788
2016-11-23iq2000.c (iq2000_rtx_costs): Avoid multiplication in boolean context warning.Jeff Law2-1/+4
* config/iq2000/iq2000.c (iq2000_rtx_costs): Avoid multiplication in boolean context warning. From-SVN: r242787
2016-11-23re PR middle-end/78153 (strlen return value can be assumed to be less than ↵Prathamesh Kulkarni6-0/+61
PTRDIFF_MAX) 2016-11-23 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> PR middle-end/78153 * gimple-fold.c (fold_stmt_1): Handle case for GIMPLE_RETURN. * tree-vrp.c (extract_range_basic): Handle case for CFN_BUILT_IN_STRLEN. testsuite/ * gcc.dg/tree-ssa/pr78153-1.c: New test. * gcc.dg/tree-ssa/pr78153-2.c: Likewise. From-SVN: r242786
2016-11-23* config/ia64/ia64.c (ia64_emit_insn_before): Fix prototype.Jeff Law2-1/+5
From-SVN: r242785
2016-11-23[Patch ARM 17/17] Enable _Float16 for ARM and fix PR target/63250James Greenhalgh6-9/+105
gcc/ PR target/63250 * config/arm/arm-builtins.c (arm_simd_floatHF_type_node): Rename to... (arm_fp16_type_node): ...This, make visibile. (arm_simd_builtin_std_type): Rename arm_simd_floatHF_type_node to arm_fp16_type_node. (arm_init_simd_builtin_types): Likewise. (arm_init_fp16_builtins): Likewise. * config/arm/arm.c (arm_excess_precision): New. (arm_floatn_mode): Likewise. (TARGET_C_EXCESS_PRECISION): Likewise. (TARGET_FLOATN_MODE): Likewise. (arm_promoted_type): Only promote arm_fp16_type_node. * config/arm/arm.h (arm_fp16_type_node): Declare. gcc/testsuite/ PR target/63250 * lib/target-supports.exp (add_options_for_float16): Add -mfp16-format=ieee when testign arm*-*-*. From-SVN: r242784
2016-11-23[Patch 16/17 libgcc ARM] Half to double precision conversionsJames Greenhalgh8-54/+109
gcc/ * config/arm/arm.c (arm_convert_to_type): Delete. (TARGET_CONVERT_TO_TYPE): Delete. (arm_init_libfuncs): Enable trunc_optab from DFmode to HFmode. (arm_libcall_uses_aapcs_base): Add trunc_optab from DF- to HFmode. * config/arm/arm.h (TARGET_FP16_TO_DOUBLE): New. * config/arm/arm.md (truncdfhf2): Only convert through SFmode if we are in fast math mode, and have no single step hardware instruction. (extendhfdf2): Only expand through SFmode if we don't have a single-step hardware instruction. * config/arm/vfp.md (*truncdfhf2): New. (extendhfdf2): Likewise. gcc/testsuite/ * gcc.target/arm/fp16-rounding-alt-1.c (ROUNDED): Change expected result. * gcc.target/arm/fp16-rounding-ieee-1.c (ROUNDED): Change expected result. From-SVN: r242783
2016-11-23[Patch testsuite patch 10/17] Add options for floatN when checking effective ↵James Greenhalgh2-7/+18
target for support gcc/testsuite/ * lib/target-supports.exp (check_effective_target_float16): Add options for _Float16. (check_effective_target_float32): Add options for _Float32. (check_effective_target_float64): Add options for _Float64. (check_effective_target_float128): Add options for _Float128. (check_effective_target_float32x): Add options for _Float32x. (check_effective_target_float64x): Add options for _Float64x. (check_effective_target_float128x): Add options for _Float128x. From-SVN: r242780
2016-11-23[Patch 8/17] Make _Float16 available if HFmode is availableJames Greenhalgh2-4/+11
gcc/ * targhooks.c (default_floatn_mode): Enable _Float16 if a target provides HFmode. From-SVN: r242778
2016-11-23[Patch 7/17] Delete TARGET_FLT_EVAL_METHOD and poison it.James Greenhalgh8-39/+11
gcc/ * config/s390/s390.h (TARGET_FLT_EVAL_METHOD): Delete. * config/m68k/m68k.h (TARGET_FLT_EVAL_METHOD): Delete. * config/i386/i386.h (TARGET_FLT_EVAL_METHOD): Delete. * defaults.h (TARGET_FLT_EVAL_METHOD): Delete. * doc/tm.texi.in (TARGET_FLT_EVAL_METHOD): Delete. * doc/tm.texi: Regenerate. * system.h (TARGET_FLT_EVAL_METHOD): Poison. From-SVN: r242777
2016-11-23[Patch 6/17] Migrate excess precision logic to use TARGET_EXCESS_PRECISIONJames Greenhalgh12-118/+408
gcc/ * toplev.c (init_excess_precision): Delete most logic. * tree.c (excess_precision_type): Rewrite to use TARGET_EXCESS_PRECISION. * doc/invoke.texi (-fexcess-precision): Document behaviour in a more generic fashion. * ginclude/float.h: Wrap definition of FLT_EVAL_METHOD in __STDC_WANT_IEC_60559_TYPES_EXT__. gcc/c-family/ * c-common.c (excess_precision_mode_join): New. (c_ts18661_flt_eval_method): New. (c_c11_flt_eval_method): Likewise. (c_flt_eval_method): Likewise. * c-common.h (excess_precision_mode_join): New. (c_flt_eval_method): Likewise. * c-cppbuiltin.c (c_cpp_flt_eval_method_iec_559): New. (cpp_iec_559_value): Call it. (c_cpp_builtins): Modify logic for __LIBGCC_*_EXCESS_PRECISION__, call c_flt_eval_method to set __FLT_EVAL_METHOD__ and __FLT_EVAL_METHOD_TS_18661_3__. gcc/testsuite/ * gcc.dg/fpermitted-flt-eval-methods_3.c: New. * gcc.dg/fpermitted-flt-eval-methods_4.c: Likewise. From-SVN: r242776
2016-11-23[Patch 5/17] Add -fpermitted-flt-eval-methods=[c11|ts-18661-3]James Greenhalgh9-0/+114
gcc/c-family/ * c-opts.c (c_common_post_options): Add logic to handle the default case for -fpermitted-flt-eval-methods. gcc/ * common.opt (fpermitted-flt-eval-methods): New. * doc/invoke.texi (-fpermitted-flt-eval-methods): Document it. * flag_types.h (permitted_flt_eval_methods): New. gcc/testsuite/ * gcc.dg/fpermitted-flt-eval-methods_1.c: New. * gcc.dg/fpermitted-flt-eval-methods_2.c: New. From-SVN: r242775
2016-11-23[Patch 4/17] Implement TARGET_C_EXCESS_PRECISION for m68kJames Greenhalgh2-0/+42
gcc/ * config/m68k/m68k.c (m68k_excess_precision): New. (TARGET_C_EXCESS_PRECISION): Define. From-SVN: r242774
2016-11-23[Patch 3/17] Implement TARGET_C_EXCESS_PRECISION for s390James Greenhalgh2-0/+45
* config/s390/s390.c (s390_excess_precision): New. (TARGET_C_EXCESS_PRECISION): Define. From-SVN: r242773
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