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2023-01-02Daily bump.GCC Administrator4-1/+24
2023-01-01Add post-reload splitter for extendditi2 on x86_64.Roger Sayle3-25/+66
This is another step towards a possible solution for PR 105137. This patch introduces a define_insn for extendditi2 that allows DImode to TImode sign-extension to be represented in the early RTL optimizers, before being split post-reload into the exact same idiom as currently produced by RTL expansion. Typically this produces the identical code, so the first new test case: __int128 foo(long long x) { return (__int128)x; } continues to generate: foo: movq %rdi, %rax cqto ret The "magic" is that this representation allows combine and the other RTL optimizers to do a better job. Hence, the second test case: __int128 foo(__int128 a, long long b) { a += ((__int128)b) << 70; return a; } which mainline with -O2 currently generates as: foo: movq %rsi, %rax movq %rdx, %rcx movq %rdi, %rsi salq $6, %rcx movq %rax, %rdi xorl %eax, %eax movq %rcx, %rdx addq %rsi, %rax adcq %rdi, %rdx ret with this patch now becomes: foo: movl $0, %eax salq $6, %rdx addq %rdi, %rax adcq %rsi, %rdx ret i.e. the same code for the signed and unsigned extension variants. 2023-01-01 Roger Sayle <roger@nextmovesoftware.com> Uroš Bizjak <ubizjak@gmail.com> gcc/ChangeLog * config/i386/i386.md (extendditi2): New define_insn. (define_split): Use DWIH mode iterator to treat new extendditi2 identically to existing extendsidi2_1. (define_peephole2): Likewise. (define_peephole2): Likewise. (define_Split): Likewise. gcc/testsuite/ChangeLog * gcc.target/i386/extendditi2-1.c: New test case. * gcc.target/i386/extendditi2-2.c: Likewise.
2023-01-01Rotate ChangeLog files.Jakub Jelinek12-78277/+78313
Rotate ChangeLog files for ChangeLogs with yearly cadence.
2023-01-01modula2: Ensure that module registration constructors are 'extern' [PR108183].Iain Sandoe1-0/+5
The symbols for module registration constructors need to be external or we get wrong code generated for targets that allow direct access to local symbol definitions. Signed-off-by: Iain Sandoe <iain@sandoe.co.uk> PR modula2/108183 gcc/m2/ChangeLog: * gm2-compiler/M2GCCDeclare.mod: Module registration constructors are externs to the builder of m2_link. Co-Authored-By: Gaius Mulley <gaiusmod2@gmail.com>
2023-01-01Daily bump.GCC Administrator3-1/+17
2022-12-31modula-2: Fix building the plugin for Darwin [PR107612].Rainer Orth2-13/+26
* Makes the configured value for INCINTL available as a variable so that it can be used in language makefile fragements. It is then used in the m2 fragment to make the include path available to the plugin compile. * Updates the DSO suffix to use .dylib for Darwin. * Adds '-Wl,-undefined,dynamic_lookup' to the link flags so that symbols can be resolved at runtime. * Removes the extraneous $(exeext) from the DSO names. Since the linking is driven by CXX, we also need to supress the addition of default libraries otherwise: (1) we will get a reference to an uninstalled libstdc++ (2) the process opening the plugin would have two instances 0f libstdc++ - one statically linked into gm2 and one dynamically linked into the plugin. PR modula2/107612 gcc/ChangeLog: * Makefile.in: Make the configured libintl includes avaiable in INCINTL. (BUILD_CPPFLAGS): Use INCINTL. gcc/m2/ChangeLog: * Make-lang.in (soext): Use .dylib for Darwin. (PLUGINLDFLAGS): Use dynmic lookup, set the plugin name, and append -nodefaultlibs to suppress the linking of libstdc++. Use INCINTL in compile lines for the plugin. Co-Authored-By: Iain Sandoe <iain@sandoe.co.uk>
2022-12-31Daily bump.GCC Administrator4-1/+48
2022-12-30check hash table insertionsAlexandre Oliva1-3/+60
I've noticed a number of potential problems in hash tables, of three kinds: insertion of entries that seem empty, dangling insertions, and lookups during insertions. These problems may all have the effect of replacing a deleted entry with one that seems empty, which may disconnect double-hashing chains involving that entry, and thus cause entries to go missing. This patch detects such problems by recording a pending insertion and checking that it's completed before other potentially-conflicting operations. The additional field is only introduced when checking is enabled. for gcc/ChnageLog * hash-table.h (check_complete_insertion, check_insert_slot): New hash_table methods. (m_inserting_slot): New hash_table field. (begin, hash_table ctors, ~hash_table): Check previous insert. (expand, empty_slow, clear_slot, find_with_hash): Likewise. (remote_elt_with_hash, traverse_noresize): Likewise. (gt_pch_nx): Likewise. (find_slot_with_hash): Likewise. Record requested insert.
2022-12-30regressions tests for PR103770Martin Uecker3-0/+66
This adds tests from bugzilla for PR103770 and duplicates. gcc/testsuite/ * gcc.dg/pr103770.c: New test. * gcc.dg/pr103859.c: New test. * gcc.dg/pr105065.c: New test.
2022-12-30Fix memory constraint on MVE v[ld/st][2/4] instructions [PR107714]Stam Markianos-Wright6-4/+332
In the M-Class Arm-ARM: https://developer.arm.com/documentation/ddi0553/bu/?lang=en these MVE instructions only have '!' writeback variant and at: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=107714 we found that the Um constraint would also allow through a register offset writeback, resulting in an assembler error. Here I have added a new constraint and predicate for these instructions, which (uniquely, AFAICT), only support a `!` writeback increment by the data size (inside the compiler this is a POST_INC). No regressions in arm-none-eabi with MVE and MVE.FP. gcc/ChangeLog: PR target/107714 * config/arm/arm-protos.h (mve_struct_mem_operand): New protoype. * config/arm/arm.cc (mve_struct_mem_operand): New function. * config/arm/constraints.md (Ug): New constraint. * config/arm/mve.md (mve_vst4q<mode>): Change constraint. (mve_vst2q<mode>): Likewise. (mve_vld4q<mode>): Likewise. (mve_vld2q<mode>): Likewise. * config/arm/predicates.md (mve_struct_operand): New predicate. gcc/testsuite/ChangeLog: PR target/107714 * gcc.target/arm/mve/intrinsics/vldst24q_reg_offset.c: New test.
2022-12-29Modify checks to avoid referencing NULL pointer.Steve Kargl4-5/+7
Update test cases with error messages that changed as a result. gcc/fortran/ChangeLog: PR fortran/102595 * decl.cc (attr_decl1): Guard against NULL pointer. * parse.cc (match_deferred_characteristics): Include BT_CLASS in check for derived being undefined. gcc/testsuite/ChangeLog: PR fortran/102595 * gfortran.dg/class_result_4.f90: Update error message check. * gfortran.dg/pr85779_3.f90: Update error message check.
2022-12-30Daily bump.GCC Administrator5-1/+85
2022-12-29prevent hash set/map insertion of deleted entriesAlexandre Oliva2-4/+7
Just like the recently-added checks for empty entries, add checks for deleted entries as well. This didn't catch any problems, but it might prevent future accidents. Suggested by David Malcolm. for gcc/ChangeLog * hash-map.h (put, get_or_insert): Check that added entry doesn't look deleted either. * hash-set.h (add): Likewise.
2022-12-29parloops: don't request insert that won't be completedAlexandre Oliva1-2/+5
In take_address_of, we may refrain from completing a decl_address INSERT if gsi is NULL, so dnn't even ask for an INSERT in this case. for gcc/ChangeLog * tree-parloops.cc (take_address_of): Skip INSERT if !gsi.
2022-12-29hash-map: reject empty-looking insertionsAlexandre Oliva1-1/+3
Check, after inserting entries, that they don't look empty. for gcc/ChangeLog * hash-map.h (put, get_or_insert): Check that entry does not look empty after insertion.
2022-12-29hash set: reject attempts to add empty valuesAlexandre Oliva1-1/+5
Check, after adding a key to a hash set, that the entry does not look empty. for gcc/ChangeLog * hash-set.h (add): Check that the inserted entry does not look empty.
2022-12-29ada: don't map NULL decl to locusAlexandre Oliva1-1/+1
When decl is NULL, don't record its mapping in the decl_to_instance_map. for gcc/ada/ChangeLog * gcc-interface/trans.cc (Sloc_to_locus): Don't map NULL decl.
2022-12-29lto: drop dummy partition mappingAlexandre Oliva1-1/+0
When adding a catch-all partition, we map NULL to it. That mapping is ineffective and unnecessary. Drop it. for gcc/lto/ChangeLog * lto-partition.cc (lto_1_to_1_map): Drop NULL partition mapping.
2022-12-29[C++] constexpr: request insert iff depth is okAlexandre Oliva1-3/+5
cxx_eval_call_expression requests an INSERT even in cases when it would later decide not to insert. This could break double-hashing chains. Arrange for it to use NO_INSERT when the insertion would not be completed. for gcc/cp/ChangeLog * constexpr.cc (cxx_eval_call_expression): Do not request an INSERT that would not be completed.
2022-12-29tm: complete tm_restart insertionAlexandre Oliva1-1/+1
Insertion of a tm_restart_node in tm_restart failed to record the newly-allocated node in the hash table. for gcc/ChangeLog * trans-mem.cc (split_bb_make_tm_edge): Record new node in tm_restart.
2022-12-29postreload-gcse: no insert on mere lookupAlexandre Oliva1-1/+1
lookup_expr_in_table is not used for insertions, but it mistakenly used INSERT rather than NO_INSERT. for gcc/ChangeLog * postreload-gcse.cc (lookup_expr_in_table): Use NO_INSERT.
2022-12-29tree-inline decl_map: skip mapping result's NULL default defAlexandre Oliva1-4/+5
If a result doesn't have a default def, don't attempt to remap it. for gcc/ChangeLog * tree-inline.cc (declare_return_variable): Don't remap NULL default def of result.
2022-12-29ssa-loop-niter: skip caching of null operandsAlexandre Oliva1-0/+2
When a TREE_OPERAND is NULL, do not cache it. for gcc/ChangeLog * tree-ssa-loop-niter.cc (expand_simple_operands): Refrain from caching NULL TREE_OPERANDs.
2022-12-29[C++] constraint: insert norm entry onceAlexandre Oliva1-3/+5
Use NO_INSERT to test whether inserting should be attempted. for gcc/cp/ChangeLog * constraint.cc (normalize_concept_check): Use NO_INSERT for pre-insertion check.
2022-12-29tree-inline decl_map: skip mapping NULL to itselfAlexandre Oliva1-1/+1
Mapping a NULL key is no use, skip it. for gcc/ChangeLog * tree-inline.cc (insert_decl_map): Skip mapping a NULL decl as value to itself.
2022-12-29varpool: do not add NULL vnodes to referencedAlexandre Oliva1-1/+3
Avoid adding NULL vnodes to referenced tables. for gcc/ChangeLog * varpool.cc (symbol_table::remove_unreferenced_decls): Do not add NULL vnodes to referenced table.
2022-12-29scoped tables: insert before further lookupsAlexandre Oliva1-5/+5
Avoid hash table lookups between requesting an insert and storing the inserted value in avail_exprs_stack. Lookups before the insert is completed could fail to find double-hashed elements. for gcc/ChangeLog * tree-ssa-scopedtables.cc (avail_exprs_stack::lookup_avail_expr): Finish hash table insertion before further lookups.
2022-12-29gcc: xtensa: use GP_RETURN_* instead of magic constantMax Filippov1-1/+1
gcc/ * config/xtensa/xtensa.cc (xtensa_return_in_memory): Use GP_RETURN_* instead of magic constant.
2022-12-29xtensa: Check DF availability before useTakayuki 'January June' Suwa1-1/+1
Perhaps no problem, but for safety. gcc/ChangeLog: * config/xtensa/xtensa.cc (xtensa_expand_prologue): Fix to check DF availability before use of DF_* macros.
2022-12-29Daily bump.GCC Administrator3-1/+43
2022-12-28Provide zero_extend versions/variants of several patterns on x86.Roger Sayle1-0/+151
The middle-end doesn't have a preferred canonical form for expressing zero-extension, sometimes using an AND, sometimes pairs of SHIFTs, and sometimes using zero_extend. Pending changes to RTL simplification will/may alter some of these representations, so a few additional patterns are required to recognize these alternate representations and avoid any testsuite regressions. As an example, *popcountsi2_zext is currently represented as: [(set (match_operand:DI 0 "register_operand" "=r") (and:DI (subreg:DI (popcount:SI (match_operand:SI 1 "nonimmediate_operand" "rm")) 0) (const_int 63))) (clobber (reg:CC FLAGS_REG))] this patch adds an alternate/equivalent pattern that matches: [(set (match_operand:DI 0 "register_operand" "=r") (zero_extend:DI (popcount:SI (match_operand:SI 1 "nonimmediate_operand" "rm")))) (clobber (reg:CC FLAGS_REG))] Another example is *popcounthi2 which is currently represented as: [(set (match_operand:SI 0 "register_operand") (popcount:SI (zero_extend:SI (match_operand:HI 1 "nonimmediate_operand")))) (clobber (reg:CC FLAGS_REG))] this patch adds an alternate/equivalent pattern that matches: [(set (match_operand:SI 0 "register_operand") (zero_extend:SI (popcount:HI (match_operand:HI 1 "nonimmediate_operand")))) (clobber (reg:CC FLAGS_REG))] The contents of the machine description definitions remain the same. it's just the expected RTL is slightly different but equivalent. Providing both forms makes the backend more robust to middle-end changes [and possibly catches some missed optimizations]. 2022-12-28 Roger Sayle <roger@nextmovesoftware.com> gcc/ChangeLog * config/i386/i386.md (*clzsi2_lzcnt_zext_2): define_insn_and_split to match ZERO_EXTEND form of *clzsi2_lzcnt_zext. (*clzsi2_lzcnt_zext_2_falsedep): Likewise, new define_insn to match ZERO_EXTEND form of *clzsi2_lzcnt_zext_falsedep. (*bmi2_bzhi_zero_extendsidi_5): Likewise, new define_insn to match ZERO_EXTEND form of *bmi2_bzhi_zero_extendsidi. (*popcountsi2_zext_2): Likewise, new define_insn_and_split to match ZERO_EXTEND form of *popcountsi2_zext. (*popcountsi2_zext_2_falsedep): Likewise, new define_insn to match ZERO_EXTEND form of *popcountsi2_zext_falsedep. (*popcounthi2_2): Likewise, new define_insn_and_split to match ZERO_EXTEND form of *popcounthi2. (define_peephole2): ZERO_EXTEND variant of HImode popcount&1 using parity flag peephole2.
2022-12-28Use ix86_expand_clear in ix86_split_ashl.Roger Sayle2-1/+7
This patch is a one line change, to call ix86_expand_clear instead of emit_move_insn with const0_rtx in ix86_split_ashl, allowing the backend to use an xor instruction to clear a register if appropriate. The effect is demonstrated with the following function. __int128 foo(__int128 x, unsigned long long b) { return ((__int128)b << 72) + x; } previously with -O2, GCC would generate foo: movl $0, %eax salq $8, %rdx addq %rdi, %rax adcq %rsi, %rdx ret with this patch, it now generates foo: xorl %eax, %eax salq $8, %rdx addq %rdi, %rax adcq %rsi, %rdx ret 2022-12-28 Roger Sayle <roger@nextmovesoftware.com> gcc/ChangeLog * config/i386/i386-expand.cc (ix86_split_ashl): Call ix86_expand_clear to generate an xor instruction. gcc/testsuite/ChangeLog * gcc.target/i386/ashlti3-1.c: New test case.
2022-12-28strlen: do not use cond_expr for boundariesMartin Liska2-6/+15
PR tree-optimization/108137 gcc/ChangeLog: * tree-ssa-strlen.cc (get_range_strlen_phi): Reject anything different from INTEGER_CST. gcc/testsuite/ChangeLog: * gcc.dg/tree-ssa/pr108137.c: New test.
2022-12-28RISC-V: Return const ref. for vl_vtype_info::get_avl_infoKito Cheng1-1/+1
Return const reference could prevent unnecessary copying. gcc/ * config/riscv/riscv-vsetvl.h (vl_vtype_info::get_avl_info): Return const reference rather than value.
2022-12-28Daily bump.GCC Administrator3-1/+109
2022-12-27Commit right version of last patch (missing modes)Jeff Law1-1/+2
gcc/ * config/riscv/riscv.md: Add missing modes to last patch.t
2022-12-27RISC-V: Produce better code with complex constants [PR95632] [PR106602]Raphael Moreira Zinsly3-0/+46
gcc/Changelog: PR target/95632 PR target/106602 * config/riscv/riscv.md: New pattern to simulate complex const_int loads. gcc/testsuite/ChangeLog: * gcc.target/riscv/pr95632.c: New test. * gcc.target/riscv/pr106602.c: New test.
2022-12-27riscv: Restructure callee-saved register save/restore codeChristoph Müllner1-28/+67
This patch restructures the loop over the GP registers which saves/restores then as part of the prologue/epilogue. No functional change is intended by this patch, but it offers the possibility to use load-pair/store-pair instructions. gcc/ChangeLog: * config/riscv/riscv.cc (riscv_next_saved_reg): New function. (riscv_is_eh_return_data_register): New function. (riscv_for_each_saved_reg): Restructure loop. Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
2022-12-27riscv: attr: Synchronize comments with codeChristoph Müllner1-1/+4
The comment above the enumeration of existing attributes got out of order and a few entries were forgotten. This patch synchronizes the comments according to the list. This commit does not include any functional change. gcc/ChangeLog: * config/riscv/riscv.md: Sync comments with code. Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
2022-12-27Fixed typo in RISCVjinma1-1/+1
gcc/ChangeLog: * common/config/riscv/riscv-common.cc:
2022-12-27gcc: fix Windows target binutils secrel detectionJonathan Yong2-2/+2
Newer binutils uses all caps, where it was all lower case previously. Pushed as obvious. This should resolve: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=100383 gcc/ * configure.ac: use grep -i for case insensitive test. * configure: Regenerate. Signed-off-by: Jonathan Yong <10walls@gmail.com>
2022-12-27gcc: xtensa: use define_c_enums instead of define_constantsMax Filippov1-21/+25
This improves RTL dumps readability. No functional changes. gcc/ * config/xtensa/xtensa.md (unspec): Extract UNSPEC_* constants into this enum. (unspecv): Extract UNSPECV_* constants into this enum.
2022-12-27xtensa: Generate density instructions in set_frame_ptrTakayuki 'January June' Suwa1-2/+5
gcc/ChangeLog: * config/xtensa/xtensa.md (set_frame_ptr): Fix to reflect TARGET_DENSITY.
2022-12-27xtensa: Change GP_RETURN{,_REG_COUNT} to GP_RETURN_{FIRST,LAST}Takayuki 'January June' Suwa2-7/+7
gcc/ChangeLog: * config/xtensa/xtensa.h (GP_RETURN, GP_RETURN_REG_COUNT): Change to GP_RETURN_FIRST and GP_RETURN_LAST, respectively. * config/xtensa/xtensa.cc (xtensa_function_value, xtensa_libcall_value, xtensa_function_value_regno_p): Ditto.
2022-12-27xtensa: Clean up xtensa_expand_prologueTakayuki 'January June' Suwa1-2/+8
gcc/ChangeLog: * config/xtensa/xtensa.cc (xtensa_expand_prologue): Modify to exit the inspection loops as soon as the necessity of stack pointer is found.
2022-12-27xtensa: Tabify, and trim trailing spacesTakayuki 'January June' Suwa7-116/+113
Cosmetic and no functional changes. gcc/ChangeLog: * config/xtensa/elf.h: Tabify, and trim trailing spaces. * config/xtensa/linux.h: Likewise. * config/xtensa/uclinux.h: Likewise. * config/xtensa/xtensa-dynconfig.c: Likewise. * config/xtensa/xtensa.cc: Likewise. * config/xtensa/xtensa.h: Likewise. * config/xtensa/xtensa.md: Likewise.
2022-12-27RISC-V: Add riscv_vector.h wrapperKito Cheng1-0/+11
Like d0bbecb1c418b680505faa998fe420f0fd4bbfc1, we add a wrapper to prevent it pull stdint.h from standard C library. gcc/testsuite: * gcc.target/riscv/rvv/vsetvl/riscv_vector.h: New.
2022-12-27RISC-V: Fix ICE of visiting non-existing block in CFG.Ju-Zhe Zhong1-11/+10
This patch is to fix issue of visiting non-existing block of CFG. Since blocks index of CFG in GCC are not always contiguous, we will potentially visit a gap block which is no existing in the current CFG. This patch can avoid visiting non existing block in CFG. I noticed such issue in my internal regression of current testsuite when I change the X86 server machine. This patch fix it: 17:27:15 job(build_and_test_rv32): Increased FAIL List: 17:27:15 job(build_and_test_rv32): FAIL: gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-46.c -O2 -flto -fno-use-linker-plugin -flto-partition=none (internal compiler error: Segmentation fault) gcc/ChangeLog: * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_global_backward_infos): Change to visit CFG. (pass_vsetvl::prune_expressions): Ditto.
2022-12-27RISC-V: Fix ICE for avl_info deprecated copy and pp_print error.Ju-Zhe Zhong2-24/+9
gcc/ChangeLog: * config/riscv/riscv-vsetvl.cc (change_insn): Remove pp_print. (avl_info::avl_info): Add copy function. (vector_insn_info::dump): Remove pp_print. * config/riscv/riscv-vsetvl.h: Add copy function.
2022-12-27rs6000: Rework option -mpowerpc64 handling [PR106680]Kewen Lin6-20/+85
PR106680 shows that -m32 -mpowerpc64 is different from -mpowerpc64 -m32, this is determined by the way how we handle option powerpc64 in rs6000_handle_option. Segher pointed out this difference should be taken as a bug and we should ensure that option powerpc64 is independent of -m32/-m64. So this patch removes the handlings in rs6000_handle_option and add some necessary supports in rs6000_option_override_internal instead. With this patch, if users specify -m{no-,}powerpc64, the specified value is honoured, otherwise, for 64bit it always enables OPTION_MASK_POWERPC64; while for 32bit and TARGET_POWERPC64 and OS_MISSING_POWERPC64, it disables OPTION_MASK_POWERPC64. btw, following Segher's suggestion, I did some tries to warn when OPTION_MASK_POWERPC64 is set for OS_MISSING_POWERPC64. If warn for the case that powerpc64 is specified explicitly, there are some TCs using -m32 -mpowerpc64 on ppc64-linux, they need some updates, meanwhile the artificial run with "--target_board=unix'{-m32/-mpowerpc64}'" will have noisy warnings on ppc64-linux. If warn for the case that it's specified implicitly, they can just be initialized by TARGET_DEFAULT (like -m32 on ppc64-linux) or set from the given cpu mask, we have to special case them and not to warn. As Segher's latest comment, I decide not to warn them and keep it consistent with before. Bootstrapped and regress-tested on: - powerpc64-linux-gnu P7 and P8 {-m64,-m32} - powerpc64le-linux-gnu P9 and P10 - powerpc-ibm-aix7.2.0.0 {-maix64,-maix32} - powerpc-darwin9 (with Iain's help) PR target/106680 gcc/ChangeLog: * common/config/rs6000/rs6000-common.cc (rs6000_handle_option): Remove the adjustment for option powerpc64 in -m64 handling, and remove the whole -m32 handling. * config/rs6000/rs6000.cc (rs6000_option_override_internal): When no explicit powerpc64 option is provided, enable it for -m64. For 32 bit and OS_MISSING_POWERPC64, disable powerpc64 if it's enabled but not specified explicitly. gcc/testsuite/ChangeLog: * gcc.target/powerpc/pr106680-1.c: New test. * gcc.target/powerpc/pr106680-2.c: New test. * gcc.target/powerpc/pr106680-3.c: New test. * gcc.target/powerpc/pr106680-4.c: New test. 2022-12-27 Kewen Lin <linkw@linux.ibm.com> Iain Sandoe <iain@sandoe.co.uk>