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2002-07-26rs6000.md: Enable patterns using rlwinm for PowerPC64.Alan Modra2-45/+56
* config/rs6000/rs6000.md: Enable patterns using rlwinm for PowerPC64. Replace "T" and "S" constraints with "n" when the predicate will do. Formatting fixes. (extzvsi_internal2): Use "andi.", "andis." and attr type of "compare" as for extzvsi_internal1. From-SVN: r55770
2002-07-2620020720-1.x: Skip this test on several targets known to fail.Roger Sayle2-0/+21
* gcc.c-torture/execute/20020720-1.x: Skip this test on several targets known to fail. From-SVN: r55769
2002-07-25dwarfout.c (VERSION_ASM_OP, [...]): Remove.Neil Booth2-15/+13
* dwarfout.c (VERSION_ASM_OP, DERIV_BEGIN_LABEL_FMT, DERIV_END_LABEL_FMT): Remove. (SL_BEGIN_LABEL_FMT, SL_END_LABEL_FMT): Move. From-SVN: r55762
2002-07-25objc-act.c (UTAG_STATICS, [...]): Remove.Neil Booth2-6/+5
* objc/objc-act.c (UTAG_STATICS, UTAG_PROTOCOL_LIST, USERTYPE): Remove. From-SVN: r55761
2002-07-25error.c (print_whitespace): Remove.Neil Booth4-18/+9
cp: * error.c (print_whitespace): Remove. * g++spec.c (LIBUNWIND): Move. * mangle.c (mangled_position, write_signed_number): Remove. From-SVN: r55760
2002-07-25* Missed.Neil Booth1-0/+4
From-SVN: r55759
2002-07-25rs6000.c (rs6000_emit_prologue): Remove unused local var dwarfp.Stan Shebs2-5/+10
* config/rs6000/rs6000.c (rs6000_emit_prologue): Remove unused local var dwarfp. (output_compiler_stub): Remove unused locals. (output_call): Always initialize line number. From-SVN: r55758
2002-07-25sh.h (LOAD_EXTEND_OP): QImode zero-extends on SHmedia.J"orn Rennecke3-8/+14
* sh.h (LOAD_EXTEND_OP): QImode zero-extends on SHmedia. * sh.md (truncdiqi2, movqi_media): Likewise. From-SVN: r55757
2002-07-25news.texi: Document better handling of (no-)alias information of dummy ↵Toon Moene2-2/+16
arguments and... 2002-07-25 Toon Moene <toon@moene.indiv.nluug.nl> * news.texi: Document better handling of (no-)alias information of dummy arguments and induction variables on loop unrolling. From-SVN: r55756
2002-07-25collect2.c (SYMBOL__MAIN): Remove.Neil Booth3-10/+9
* collect2.c (SYMBOL__MAIN): Remove. * gcse.c (obstack_chunk_alloc): Remove. (gcse_alloc): Fix to count allocated bytes. From-SVN: r55755
2002-07-25gcc.c (TARGET_EXECUTABLE_SUFFIX): Only used if HAVE_TARGET_EXECUTABLE_SUFFIX.Neil Booth2-3/+5
* gcc.c (TARGET_EXECUTABLE_SUFFIX): Only used if HAVE_TARGET_EXECUTABLE_SUFFIX. From-SVN: r55754
2002-07-25rtl.h (mem_attrs): Spell out more clearly the roles of ALIGN, SIZE, EXPR and ↵J"orn Rennecke2-0/+8
OFFSET. * rtl.h (mem_attrs): Spell out more clearly the roles of ALIGN, SIZE, EXPR and OFFSET. From-SVN: r55753
2002-07-25emit-rtl.c (set_mem_attributes): Fix size and alignment thinkos in ARRAY_REF ↵Richard Henderson2-5/+14
of DECL_P case. * emit-rtl.c (set_mem_attributes): Fix size and alignment thinkos in ARRAY_REF of DECL_P case. From-SVN: r55752
2002-07-25invoke.texi: Document -mabi=meabi, and expand on the EABI description.Richard Sandiford14-417/+629
* doc/invoke.texi: Document -mabi=meabi, and expand on the EABI description. Document -mips32, -mips64, and the associated -march values. Describe the "mipsN" arguments to -march. Say that the -mipsN options are equivalent to -march. Reword the description of default type sizes. * toplev.h (target_flags_explicit): Declare. * toplev.c (target_flags_explicit): New var. (set_target_switch): Update target_flags_explicit. * config/mips/abi64.h (SUBTARGET_TARGET_OPTIONS): Undefine. * config/mips/elf64.h (MIPS_ISA_DEFAULT): Undefine. * config/mips/iris6.h (SUBTARGET_ASM_SPEC): -mabi=64 implies -mips3. * config/mips/isa3264.h (MIPS_ENABLE_EMBEDDED_O32): Undefine. * config/mips/mips.h (mips_cpu_info): New struct. (mips_cpu_string, mips_explicit_type_size_string): Remove. (mips_cpu_info_table, mips_arch_info, mips_tune_info): Declare. (MIPS_CPP_SET_PROCESSOR): New macro. (TARGET_CPP_BUILTINS): Declare a macro for each supported processor. Define _MIPS_ARCH and _MIPS_TUNE. (MIPS_ISA_DEFAULT): Don't provide a default value. Instead... (MIPS_CPU_STRING_DEFAULT): Set to "from-abi" if neither it nor MIPS_ISA_DEFAULT were already defined. (MULTILIB_DEFAULTS): Add MULTILIB_ABI_DEFAULT. (TARGET_OPTIONS): Remove -mcpu and -mexplicit-type-size. (ABI_NEEDS_32BIT_REGS, ABI_NEEDS_64BIT_REGS): New. (GAS_ASM_SPEC): Remove -march, -mcpu, -mgp* and -mabi rules. (ABI_GAS_ASM_SPEC): Remove. (MULTILIB_ABI_DEFAULT, ASM_ABI_DEFAULT_SPEC): New macros. (ASM_SPEC): Add -mgp32, -mgp64, -march, -mabi=eabi and -mabi=o64. Invoke %(asm_abi_default_spec) if no ABI was specified. (CC1_SPEC): Remove ISA -> register-size rules. (EXTRA_SPECS): Remove abi_gas_asm_spec. Add asm_abi_default_spec. * config/mips/mips.c (mips_arch_info, mips_tune_info): New vars. (mips_cpu_string, mips_explicit_type_size_string): Remove. (mips_cpu_info_table): New array. (mips_set_architecture, mips_set_tune): New fns. (override_options): Rework to make -mipsN equivalent to -march. Detect more erroneous cases, including those removed from CC1_SPEC. Don't change the ABI based on architecture, or vice versa. Unify logic with GAS. (mips_asm_file_start): Get architecture name from mips_arch_info. (mips_strict_matching_cpu_name_p, mips_matching_cpu_name_p): New fns. (mips_parse_cpu): Take the name of the option as argument. Handle 'from-abi'. Raise an error if the option is wrong. (mips_cpu_info_from_isa): New fn. [gcc/testsuite] * gcc.dg/mips-args-[123].c: New tests. From-SVN: r55747
2002-07-25mips.md (tablejump_mips161): Use gen_rtx_LABEL_REF.Richard Sandiford2-2/+7
* config/mips/mips.md (tablejump_mips161): Use gen_rtx_LABEL_REF. (tablejump_mips162): Likewise. From-SVN: r55746
2002-07-25simpify-rtx.c (simplify_subreg): Don't pass MODE_CC mode to int_mode_for_mode.J"orn Rennecke2-1/+7
* simpify-rtx.c (simplify_subreg): Don't pass MODE_CC mode to int_mode_for_mode. From-SVN: r55745
2002-07-25c-common.c (c_sizeof_or_alignof_type): Take a third argument for complaining.Gabriel Dos Reis10-81/+50
* c-common.c (c_sizeof_or_alignof_type): Take a third argument for complaining. * c-common.h (c_sizeof): Adjust definition. (c_alignof): Likewise. * c-tree.h (c_sizeof_nowarn): Now macro. * c-typeck.c (c_sizeof_nowarn): Remove definition. cp/ * cp-tree.h (cxx_sizeof_nowarn): Now a macro. (cxx_sizeof_or_alignof_type): Take a third argument. (cxx_sizeof): Adjust definition. (cxx_alignof): Likewise. * init.c (build_delete): Use cxx_sizeof_nowarn to reflect reality. * typeck.c (cxx_sizeof_or_alignof_type): Take a third argument for complaining. (c_sizeof_nowarn): Remove definition. (build_unary_op): Use cxx_sizeof_nowarn. From-SVN: r55744
2002-07-25Daily bump.GCC Administrator3-3/+3
From-SVN: r55742
2002-07-25c-decl.c (c_decode_option): No need to handle switches cpplib handles.Neil Booth3-16/+6
* c-decl.c (c_decode_option): No need to handle switches cpplib handles. cp: * decl2.c (cxx_decode_option): Similarly. From-SVN: r55737
2002-07-25defaults.h (ASM_OUTPUT_TYPE_DIRECTIVE, [...]): New default definitions of ↵Zack Weinberg27-513/+410
new macros. * defaults.h (ASM_OUTPUT_TYPE_DIRECTIVE, ASM_OUTPUT_SIZE_DIRECTIVE, ASM_OUTPUT_MEASURED_SIZE): New default definitions of new macros. * doc/tm.texi: Document them. Also document SIZE_ASM_OP, TYPE_ASM_OP, and TYPE_OPERAND_FMT. * config/elfos.h, config/netbsd-aout.h, config/openbsd.h, config/alpha/elf.h, config/arm/elf.h, config/avr/avr.h, config/cris/aout.h, config/i386/freebsd-aout.h, config/i386/sco5.h, config/ia64/ia64.c, config/ip2k/ip2k.h, config/m68k/m68kelf.h, config/m68k/m68kv4.h, config/m88k/m88k.h, config/mcore/mcore-elf.h, config/mips/elf.h, config/mips/elf64.h, config/mips/iris6.h, config/mips/linux.h, config/pa/pa-linux.h, config/pa/pa64-hpux.h, config/rs6000/sysv4.h, config/xtensa/elf.h, config/xtensa/linux.h: Use the new macros. Where possible, remove redundant definitions of SIZE_ASM_OP, TYPE_ASM_OP, and TYPE_OPERAND_FMT. From-SVN: r55735
2002-07-25eabi.h: Define TARGET_SPE_ABI, TARGET_SPE, TARGET_ISEL, and TARGET_FPRS.Aldy Hernandez2-1/+155
2002-07-24 Aldy Hernandez <aldyh@redhat.com> * config/rs6000/eabi.h: Define TARGET_SPE_ABI, TARGET_SPE, TARGET_ISEL, and TARGET_FPRS. * doc/invoke.texi (RS/6000 and PowerPC Options): Document -mabi=spe, -mabi=no-spe, and -misel=. * config/rs6000/rs6000-protos.h: Add output_isel. Move vrsave_operation prototype here. * config/rs6000/rs6000.md (sminsi3): Allow pattern for TARGET_ISEL. (smaxsi3): Same. (uminsi3): Same. (umaxsi3): Same. (abssi2_nopower): Disallow when TARGET_ISEL. (*ne0): Same. (negsf2): Change to expand and rename old pattern to *negsf2. (abssf2): Change to expand and rename old pattern to *abssf2. New expanders: fix_truncsfsi2, floatunssisf2, floatsisf2, fixunssfsi2. Change patterns that check for TARGET_HARD_FLOAT or TARGET_SOFT_FLOAT to also check TARGET_FPRS. * config/rs6000/rs6000.c: New globals: rs6000_spe_abi, rs6000_isel, rs6000_fprs, rs6000_isel_string. (rs6000_override_options): Add 8540 case to processor_target_table. Set rs6000_isel for the 8540. Call rs6000_parse_isel_option. (enable_mask_for_builtins): New. (rs6000_parse_isel_option): New. (rs6000_parse_abi_options): Add spe and no-spe. (easy_fp_constant): Treat !TARGET_FPRS as soft-float. (rs6000_legitimize_address): Check for TARGET_FPRS when checking for TARGET_HARD_FLOAT. Add case for SPE_VECTOR_MODE. (rs6000_legitimize_reload_address): Handle SPE vector modes. (rs6000_legitimate_address): Disallow PRE_INC/PRE_DEC for SPE vector modes. Check for TARGET_FPRS when checking for TARGET_HARD_FLOAT. (rs6000_emit_move): Check for TARGET_FPRS. Add cases for SPE vector modes. (function_arg_boundary): Return 64 for SPE vector modes. (function_arg_advance): Check for TARGET_FPRS and Handle SPE vectors. (function_arg): Same. (setup_incoming_varargs): Check for TARGET_FPRS. (rs6000_va_arg): Same. (struct builtin_description): Un-constify mask field. Move up in file. (bdesc_2arg): Un-constify and add SPE builtins. (bdesc_1arg): Same. (bdesc_spe_predicates): New. (bdesc_spe_evsel): New. (rs6000_expand_unop_builtin): Add SPE 5-bit literal builtins. (rs6000_expand_binop_builtin): Same. (bdesc_2arg_spe): New. (spe_expand_builtin): New. (spe_expand_predicate_builtin): New. (spe_expand_evsel_builtin): New. (rs6000_expand_builtin): Call spe_expand_builtin for SPE. (rs6000_init_builtins): Initialize SPE builtins. Call rs6000_common_init_builtins. (altivec_init_builtins): Move all non-altivec builtin code to... (rs6000_common_init_builtins): ...here. New function. (branch_positive_comparison_operator): Allow NE code for SPE. (ccr_bit): Return correct ccr bit for SPE fp. (print_operand): Emit crnor in 'D' case for SPE. New case 't'. Add SPE code for 'y' case. (rs6000_generate_compare): Generate rtl for SPE fp. (output_cbranch): Handle SPE hard floats. (rs6000_emit_cmove): Handle isel. (rs6000_emit_int_cmove): New. (output_isel): New. (rs6000_stack_info): Adjust stack frame so GPRs are saved in 64-bits for SPE. (debug_stack_info): Add SPE info. (gen_frame_mem_offset): New. (rs6000_emit_prologue): Save GPRs in 64-bits for SPE abi. Change mode of frame pointer, when saving it, to Pmode. (rs6000_emit_epilogue): Restore GPRs in 64-bits for SPE abi. Misc cleanups and use gen_frame_mem_offset when appropriate. * config/rs6000/rs6000.h (processor_type): Add PROCESSOR_PPC8540. (TARGET_SPE_ABI): New. (TARGET_SPE): New. (TARGET_ISEL): New. (TARGET_FPRS): New. (FIXED_SCRATCH): New. (RTX_COSTS): Add PROCESSOR_PPC8540. (ASM_CPU_SPEC): Add case for 8540. (TARGET_OPTIONS): Add isel= case. (rs6000_spe_abi): New. (rs6000_isel): New. (rs6000_fprs): New. (rs6000_isel_string): New. (UNITS_PER_SPE_WORD): New. (LOCAL_ALIGNMENT): Adjust for SPE. (HARD_REGNO_MODE_OK): Same. (DATA_ALIGNMENT): Same. (MEMBER_TYPE_FORCES_BLK): New. (FIRST_PSEUDO_REGISTER): Set to 113. (FIXED_REGISTERS): Add SPE registers. (reg_class): Same. (REG_CLASS_NAMES): Same. (REG_CLASS_CONTENTS): Same. (REGNO_REG_CLASS): Same. (REGISTER_NAMES): Same. (DEBUG_REGISTER_NAMES): Same. (ADDITIONAL_REGISTER_NAMES): Same. (CALL_USED_REGISTERS): Same. (CALL_REALLY_USED_REGISTERS): Same. (SPE_ACC_REGNO): New. (SPEFSCR_REGNO): New. (SPE_SIMD_REGNO_P): New. (HARD_REGNO_NREGS): Adjust for SPE. (VECTOR_MODE_SUPPORTED_P): Same. (REGNO_REG_CLASS): Same. (FUNCTION_VALUE): Same. (LIBCALL_VALUE): Same. (LEGITIMATE_OFFSET_ADDRESS_P): Same. (SPE_VECTOR_MODE): New. (CONDITIONAL_REGISTER_USAGE): Disable FPRs when target does FP on the GPRs. Set FIXED_SCRATCH fixed in SPE case. (rs6000_stack): Add spe_gp_size, spe_padding_size, spe_gp_save_offset. (USE_FP_FOR_ARG_P): Check for TARGET_FPRS. (LEGITIMATE_LO_SUM_ADDRESS_P): Same. (SPE_CONST_OFFSET_OK): New. (rs6000_builtins): Add SPE builtins. * testsuite/gcc.dg/ppc-spe.c: New. * config/rs6000/eabispe.h: New. * config/rs6000/spe.h: New. * config/rs600/spe.md: New. * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Define __SIMD__ for TARGET_SPE. * config.gcc: Add powerpc-*-eabispe* case. Add spe.h to user headers for powerpc. From-SVN: r55734
2002-07-25* testsuite/gcc.dg/ppc-spe.c: New.Aldy Hernandez2-0/+691
From-SVN: r55733
2002-07-25eabi.h: Define TARGET_SPE_ABI, TARGET_SPE, TARGET_ISEL, and TARGET_FPRS.Aldy Hernandez1-0/+17
2002-07-24 Aldy Hernandez <aldyh@redhat.com> * config/rs6000/eabi.h: Define TARGET_SPE_ABI, TARGET_SPE, TARGET_ISEL, and TARGET_FPRS. * doc/invoke.texi (RS/6000 and PowerPC Options): Document -mabi=spe, -mabi=no-spe, and -misel=. * config/rs6000/rs6000-protos.h: Add output_isel. Move vrsave_operation prototype here. * config/rs6000/rs6000.md (sminsi3): Allow pattern for TARGET_ISEL. (smaxsi3): Same. (uminsi3): Same. (umaxsi3): Same. (abssi2_nopower): Disallow when TARGET_ISEL. (*ne0): Same. (negsf2): Change to expand and rename old pattern to *negsf2. (abssf2): Change to expand and rename old pattern to *abssf2. New expanders: fix_truncsfsi2, floatunssisf2, floatsisf2, fixunssfsi2. Change patterns that check for TARGET_HARD_FLOAT or TARGET_SOFT_FLOAT to also check TARGET_FPRS. * config/rs6000/rs6000.c: New globals: rs6000_spe_abi, rs6000_isel, rs6000_fprs, rs6000_isel_string. (rs6000_override_options): Add 8540 case to processor_target_table. Set rs6000_isel for the 8540. Call rs6000_parse_isel_option. (enable_mask_for_builtins): New. (rs6000_parse_isel_option): New. (rs6000_parse_abi_options): Add spe and no-spe. (easy_fp_constant): Treat !TARGET_FPRS as soft-float. (rs6000_legitimize_address): Check for TARGET_FPRS when checking for TARGET_HARD_FLOAT. Add case for SPE_VECTOR_MODE. (rs6000_legitimize_reload_address): Handle SPE vector modes. (rs6000_legitimate_address): Disallow PRE_INC/PRE_DEC for SPE vector modes. Check for TARGET_FPRS when checking for TARGET_HARD_FLOAT. (rs6000_emit_move): Check for TARGET_FPRS. Add cases for SPE vector modes. (function_arg_boundary): Return 64 for SPE vector modes. (function_arg_advance): Check for TARGET_FPRS and Handle SPE vectors. (function_arg): Same. (setup_incoming_varargs): Check for TARGET_FPRS. (rs6000_va_arg): Same. (struct builtin_description): Un-constify mask field. Move up in file. (bdesc_2arg): Un-constify and add SPE builtins. (bdesc_1arg): Same. (bdesc_spe_predicates): New. (bdesc_spe_evsel): New. (rs6000_expand_unop_builtin): Add SPE 5-bit literal builtins. (rs6000_expand_binop_builtin): Same. (bdesc_2arg_spe): New. (spe_expand_builtin): New. (spe_expand_predicate_builtin): New. (spe_expand_evsel_builtin): New. (rs6000_expand_builtin): Call spe_expand_builtin for SPE. (rs6000_init_builtins): Initialize SPE builtins. Call rs6000_common_init_builtins. (altivec_init_builtins): Move all non-altivec builtin code to... (rs6000_common_init_builtins): ...here. New function. (branch_positive_comparison_operator): Allow NE code for SPE. (ccr_bit): Return correct ccr bit for SPE fp. (print_operand): Emit crnor in 'D' case for SPE. New case 't'. Add SPE code for 'y' case. (rs6000_generate_compare): Generate rtl for SPE fp. (output_cbranch): Handle SPE hard floats. (rs6000_emit_cmove): Handle isel. (rs6000_emit_int_cmove): New. (output_isel): New. (rs6000_stack_info): Adjust stack frame so GPRs are saved in 64-bits for SPE. (debug_stack_info): Add SPE info. (gen_frame_mem_offset): New. (rs6000_emit_prologue): Save GPRs in 64-bits for SPE abi. Change mode of frame pointer, when saving it, to Pmode. (rs6000_emit_epilogue): Restore GPRs in 64-bits for SPE abi. Misc cleanups and use gen_frame_mem_offset when appropriate. * config/rs6000/rs6000.h (processor_type): Add PROCESSOR_PPC8540. (TARGET_SPE_ABI): New. (TARGET_SPE): New. (TARGET_ISEL): New. (TARGET_FPRS): New. (FIXED_SCRATCH): New. (RTX_COSTS): Add PROCESSOR_PPC8540. (ASM_CPU_SPEC): Add case for 8540. (TARGET_OPTIONS): Add isel= case. (rs6000_spe_abi): New. (rs6000_isel): New. (rs6000_fprs): New. (rs6000_isel_string): New. (UNITS_PER_SPE_WORD): New. (LOCAL_ALIGNMENT): Adjust for SPE. (HARD_REGNO_MODE_OK): Same. (DATA_ALIGNMENT): Same. (MEMBER_TYPE_FORCES_BLK): New. (FIRST_PSEUDO_REGISTER): Set to 113. (FIXED_REGISTERS): Add SPE registers. (reg_class): Same. (REG_CLASS_NAMES): Same. (REG_CLASS_CONTENTS): Same. (REGNO_REG_CLASS): Same. (REGISTER_NAMES): Same. (DEBUG_REGISTER_NAMES): Same. (ADDITIONAL_REGISTER_NAMES): Same. (CALL_USED_REGISTERS): Same. (CALL_REALLY_USED_REGISTERS): Same. (SPE_ACC_REGNO): New. (SPEFSCR_REGNO): New. (SPE_SIMD_REGNO_P): New. (HARD_REGNO_NREGS): Adjust for SPE. (VECTOR_MODE_SUPPORTED_P): Same. (REGNO_REG_CLASS): Same. (FUNCTION_VALUE): Same. (LIBCALL_VALUE): Same. (LEGITIMATE_OFFSET_ADDRESS_P): Same. (SPE_VECTOR_MODE): New. (CONDITIONAL_REGISTER_USAGE): Disable FPRs when target does FP on the GPRs. Set FIXED_SCRATCH fixed in SPE case. (rs6000_stack): Add spe_gp_size, spe_padding_size, spe_gp_save_offset. (USE_FP_FOR_ARG_P): Check for TARGET_FPRS. (LEGITIMATE_LO_SUM_ADDRESS_P): Same. (SPE_CONST_OFFSET_OK): New. (rs6000_builtins): Add SPE builtins. * testsuite/gcc.dg/ppc-spe.c: New. * config/rs6000/eabispe.h: New. * config/rs6000/spe.h: New. * config/rs600/spe.md: New. * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Define __SIMD__ for TARGET_SPE. * config.gcc: Add powerpc-*-eabispe* case. Add spe.h to user headers for powerpc. From-SVN: r55732
2002-07-25eabi.h: Define TARGET_SPE_ABI, TARGET_SPE, TARGET_ISEL, and TARGET_FPRS.Aldy Hernandez9-348/+5953
2002-07-24 Aldy Hernandez <aldyh@redhat.com> * config/rs6000/eabi.h: Define TARGET_SPE_ABI, TARGET_SPE, TARGET_ISEL, and TARGET_FPRS. * doc/invoke.texi (RS/6000 and PowerPC Options): Document -mabi=spe, -mabi=no-spe, and -misel=. * config/rs6000/rs6000-protos.h: Add output_isel. Move vrsave_operation prototype here. * config/rs6000/rs6000.md (sminsi3): Allow pattern for TARGET_ISEL. (smaxsi3): Same. (uminsi3): Same. (umaxsi3): Same. (abssi2_nopower): Disallow when TARGET_ISEL. (*ne0): Same. (negsf2): Change to expand and rename old pattern to *negsf2. (abssf2): Change to expand and rename old pattern to *abssf2. New expanders: fix_truncsfsi2, floatunssisf2, floatsisf2, fixunssfsi2. Change patterns that check for TARGET_HARD_FLOAT or TARGET_SOFT_FLOAT to also check TARGET_FPRS. * config/rs6000/rs6000.c: New globals: rs6000_spe_abi, rs6000_isel, rs6000_fprs, rs6000_isel_string. (rs6000_override_options): Add 8540 case to processor_target_table. Set rs6000_isel for the 8540. Call rs6000_parse_isel_option. (enable_mask_for_builtins): New. (rs6000_parse_isel_option): New. (rs6000_parse_abi_options): Add spe and no-spe. (easy_fp_constant): Treat !TARGET_FPRS as soft-float. (rs6000_legitimize_address): Check for TARGET_FPRS when checking for TARGET_HARD_FLOAT. Add case for SPE_VECTOR_MODE. (rs6000_legitimize_reload_address): Handle SPE vector modes. (rs6000_legitimate_address): Disallow PRE_INC/PRE_DEC for SPE vector modes. Check for TARGET_FPRS when checking for TARGET_HARD_FLOAT. (rs6000_emit_move): Check for TARGET_FPRS. Add cases for SPE vector modes. (function_arg_boundary): Return 64 for SPE vector modes. (function_arg_advance): Check for TARGET_FPRS and Handle SPE vectors. (function_arg): Same. (setup_incoming_varargs): Check for TARGET_FPRS. (rs6000_va_arg): Same. (struct builtin_description): Un-constify mask field. Move up in file. (bdesc_2arg): Un-constify and add SPE builtins. (bdesc_1arg): Same. (bdesc_spe_predicates): New. (bdesc_spe_evsel): New. (rs6000_expand_unop_builtin): Add SPE 5-bit literal builtins. (rs6000_expand_binop_builtin): Same. (bdesc_2arg_spe): New. (spe_expand_builtin): New. (spe_expand_predicate_builtin): New. (spe_expand_evsel_builtin): New. (rs6000_expand_builtin): Call spe_expand_builtin for SPE. (rs6000_init_builtins): Initialize SPE builtins. Call rs6000_common_init_builtins. (altivec_init_builtins): Move all non-altivec builtin code to... (rs6000_common_init_builtins): ...here. New function. (branch_positive_comparison_operator): Allow NE code for SPE. (ccr_bit): Return correct ccr bit for SPE fp. (print_operand): Emit crnor in 'D' case for SPE. New case 't'. Add SPE code for 'y' case. (rs6000_generate_compare): Generate rtl for SPE fp. (output_cbranch): Handle SPE hard floats. (rs6000_emit_cmove): Handle isel. (rs6000_emit_int_cmove): New. (output_isel): New. (rs6000_stack_info): Adjust stack frame so GPRs are saved in 64-bits for SPE. (debug_stack_info): Add SPE info. (gen_frame_mem_offset): New. (rs6000_emit_prologue): Save GPRs in 64-bits for SPE abi. Change mode of frame pointer, when saving it, to Pmode. (rs6000_emit_epilogue): Restore GPRs in 64-bits for SPE abi. Misc cleanups and use gen_frame_mem_offset when appropriate. * config/rs6000/rs6000.h (processor_type): Add PROCESSOR_PPC8540. (TARGET_SPE_ABI): New. (TARGET_SPE): New. (TARGET_ISEL): New. (TARGET_FPRS): New. (FIXED_SCRATCH): New. (RTX_COSTS): Add PROCESSOR_PPC8540. (ASM_CPU_SPEC): Add case for 8540. (TARGET_OPTIONS): Add isel= case. (rs6000_spe_abi): New. (rs6000_isel): New. (rs6000_fprs): New. (rs6000_isel_string): New. (UNITS_PER_SPE_WORD): New. (LOCAL_ALIGNMENT): Adjust for SPE. (HARD_REGNO_MODE_OK): Same. (DATA_ALIGNMENT): Same. (MEMBER_TYPE_FORCES_BLK): New. (FIRST_PSEUDO_REGISTER): Set to 113. (FIXED_REGISTERS): Add SPE registers. (reg_class): Same. (REG_CLASS_NAMES): Same. (REG_CLASS_CONTENTS): Same. (REGNO_REG_CLASS): Same. (REGISTER_NAMES): Same. (DEBUG_REGISTER_NAMES): Same. (ADDITIONAL_REGISTER_NAMES): Same. (CALL_USED_REGISTERS): Same. (CALL_REALLY_USED_REGISTERS): Same. (SPE_ACC_REGNO): New. (SPEFSCR_REGNO): New. (SPE_SIMD_REGNO_P): New. (HARD_REGNO_NREGS): Adjust for SPE. (VECTOR_MODE_SUPPORTED_P): Same. (REGNO_REG_CLASS): Same. (FUNCTION_VALUE): Same. (LIBCALL_VALUE): Same. (LEGITIMATE_OFFSET_ADDRESS_P): Same. (SPE_VECTOR_MODE): New. (CONDITIONAL_REGISTER_USAGE): Disable FPRs when target does FP on the GPRs. Set FIXED_SCRATCH fixed in SPE case. (rs6000_stack): Add spe_gp_size, spe_padding_size, spe_gp_save_offset. (USE_FP_FOR_ARG_P): Check for TARGET_FPRS. (LEGITIMATE_LO_SUM_ADDRESS_P): Same. (SPE_CONST_OFFSET_OK): New. (rs6000_builtins): Add SPE builtins. * testsuite/gcc.dg/ppc-spe.c: New. * config/rs6000/eabispe.h: New. * config/rs6000/spe.h: New. * config/rs600/spe.md: New. * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Define __SIMD__ for TARGET_SPE. * config.gcc: Add powerpc-*-eabispe* case. Add spe.h to user headers for powerpc. From-SVN: r55731
2002-07-24elf.h (STARTFILE_SPEC): Undo previous change.Chris Demetriou4-8/+15
2002-07-24 Chris Demetriou <cgd@broadcom.com> * config/mips/elf.h (STARTFILE_SPEC): Undo previous change. * config/mips/elf64.h (STARTFILE_SPEC): Likewise. * config/mips/isa3264.h (STARTFILE_SPEC): Likewise. From-SVN: r55729
2002-07-24In cp/ChangeLog:Geoffrey Keating4-4/+32
* tree.c (cp_build_qualified_type_real): When copying pointer-to-method types, unshare the record that holds the cached pointer-to-member-function type. In testsuite/ChangeLog: * g++.dg/other/ptrmem4.C: New testcase. From-SVN: r55725
2002-07-24* gcc.c-torture/execute/loop-2e.c: Rewrite for 64 bit and no mmap.Richard Henderson2-47/+30
From-SVN: r55724
2002-07-24expr.c (expand_expr): Use GOTO_SUBROUTINE_EXPR form when not optimizing.Richard Henderson2-1/+12
* expr.c (expand_expr) [TRY_FINALLY_EXPR]: Use GOTO_SUBROUTINE_EXPR form when not optimizing. From-SVN: r55723
2002-07-24ia64.c (gen_thread_pointer): Fix typo in marking thread_pointer_rtx as ↵David Mosberger2-1/+6
unchanging. * config/ia64/ia64.c (gen_thread_pointer): Fix typo in marking thread_pointer_rtx as unchanging. From-SVN: r55722
2002-07-24ra-colorize.c (INV_REG_ALLOC_ORDER): New macro.Michael Matz2-4/+16
* ra-colorize.c (INV_REG_ALLOC_ORDER): New macro. (free_reg): Use it. From-SVN: r55721
2002-07-24arm.md (arm_buneq, arm_bltgt): put '\' before ';' in output pattern.Richard Earnshaw2-6/+24
* arm.md (arm_buneq, arm_bltgt): put '\' before ';' in output pattern. (arm_buneq_reversed, arm_bltgt_reversed): Likewise. (movsicc, movsfcc, movdfcc): FAIL if UNEQ or LTGT. From-SVN: r55717
2002-07-24elf.h (STARTFILE_SPEC): Never include crt0.o.Chris Demetriou4-9/+14
2002-07-24 Chris Demetriou <cgd@broadcom.com> * config/mips/elf.h (STARTFILE_SPEC): Never include crt0.o. * config/mips/elf64.h (STARTFILE_SPEC): Likewise. * config/mips/isa3264.h (STARTFILE_SPEC): Do not redefine. From-SVN: r55714
2002-07-24stop recommending -fexternal-templatesJason Merrill1-35/+0
From-SVN: r55713
2002-07-24toplev.c (rest_of_compilation): Dump loops before clobbering the structure.Jan Hubicka2-3/+8
* toplev.c (rest_of_compilation): Dump loops before clobbering the structure. From-SVN: r55712
2002-07-24* rtlanal.c (keep_with_call_p): Avoid overflow in fixed_regs.Jan Hubicka2-0/+5
From-SVN: r55710
2002-07-24* g++.dg/ext/alignof1.C (main): Return 0 for success.Gabriel Dos Reis2-1/+5
From-SVN: r55708
2002-07-24[multiple changes]Roger Sayle4-1/+219
2002-07-24 Frank van der Linden <fvdl@wasabisystems.com> PR optimization/7291 * config/i386/i386.c (ix86_expand_clrstr): Fix bzero alignment problem on x86_64. 2002-07-24 Roger Sayle <roger@eyesopen.com> * gcc.c-torture/execute/memset-3.c: New testcase. From-SVN: r55704
2002-07-24pretty-print.h: Add macros from cp/error.c `:wGabriel Dos Reis2-14/+27
* pretty-print.h: Add macros from cp/error.c `:w From-SVN: r55703
2002-07-24rs6000-protos.h (mask_operand_wrap): Declare.Alan Modra5-172/+576
* config/rs6000/rs6000-protos.h (mask_operand_wrap): Declare. (mask64_2_operand): Declare. (build_mask64_2_operands): Declare. (and64_2_operand): Declare. (extract_MB): Declare. (extract_ME): Declare. * config/rs6000/rs6000.c (mask64_operand): Allow all ones. Remove CONST_DOUBLE code. (mask_operand_wrap): New insn predicate. (mask64_2_operand): Likewise. (and64_2_operand): Likewise. (build_mask64_2_operands): New function. (extract_MB): New function. (extract_ME): New function. (print_operand <case m,M>): Use extract_MB and extract_ME. (print_operand <case S>): Allow all ones. Remove CONST_DOUBLE support. * config/rs6000/rs6000.h (EXTRA_CONSTRAINT): Add 't'. (PREDICATE_CODES): Add and64_2_operand, mask_operand_wrap and mask64_2_operand. Remove CONST_DOUBLE from mask64_operand. * config/rs6000/rs6000.md (andsi3_internal3): New (andsi3_internal3+1): Enable split for powerpc64. (andsi3_internal3+2): New split. (andsi3_internal4): Renamed old andsi3_internal3. (andsi3_internal5): New. (andsi3_internal5+1): Enable split for powerpc64. (andsi3_internal5+2): New split. (andsi3_internal6, andsi3_internal7, andsi3_internal8): New. (anddi3): Handle 't' constraint. (anddi3+1): New split. (anddi3_internal2): Handle 't' constraint. (anddi3_internal2+1): New split. (anddi3_internal3): Handle 't' constraint. (anddi3_internal3+1): New split. From-SVN: r55701
2002-07-24Daily bump.GCC Administrator3-3/+3
From-SVN: r55700
2002-07-24rs6000.md: Remove scratch reg on insns using addze and similar (plus ↵Alan Modra2-201/+158
(comparison r1 r2)... * config/rs6000/rs6000.md: Remove scratch reg on insns using addze and similar (plus (comparison r1 r2) r3) insns. Add missing scratch reg in one case. Formatting fixes. From-SVN: r55695
2002-07-23linux.h (ASM_OUTPUT_DEFINE_LABEL_DIFFERENCE_SYMBOL): Remove.Neil Booth1-11/+0
* config/mips/linux.h (ASM_OUTPUT_DEFINE_LABEL_DIFFERENCE_SYMBOL): Remove. From-SVN: r55693
2002-07-23cppexp.c (parse_defined): Mark macro used.Neil Booth14-7/+177
* cppexp.c (parse_defined): Mark macro used. * cpphash.h (struct cpp_macro): New member "used". (_cpp_mark_macro_used, _cpp_warn_if_unused_macro): New. (struct cpp_reader): New member. * cppinit.c (cpp_finish_options): Set first_unused_line. (cpp_finish): Warn of unused macros if requested. (OPT_TABLE): New switches. (cpp_handle_option): Handle them. * cpplib.c (do_undef): Warn if macro unused. (do_ifdef, do_ifndef): Mark macro used. * cpplib.h (struct cpp_options): New member. * cppmacro.c (_cpp_warn_if_unused_macro): New. (enter_macro_context): Mark macro used. (_cpp_create_definition): Mark macro unused; warn if unused when redefined. * cpptrad.c (scan_out_logcial_line, push_replacement_text): Mark macros used. * doc/cppopts.texi: Update. testsuite: * gcc.dg/cpp/trad/Wunused.c, gcc.dg/cpp/trad/Wunused.h, gcc.dg/cpp/Wunused.c, gcc.dg/cpp/Wunused.h: New tests. From-SVN: r55692
2002-07-23* doc/tm.texi: Update documentation.Neil Booth2-9/+1
From-SVN: r55691
2002-07-23dwarf2out.c (SECTION_ASM_OP, [...]): Remove.Neil Booth10-64/+19
* dwarf2out.c (SECTION_ASM_OP, ASM_OUTPUT_DEFINE_LABEL_DIFFERENCE_SYMBOL): Remove. * system.h (SECTION_ASM_OP): Poison. * tree.c (FILE_FUNCTION_PREFIX_LEN): Remove. * config/alpha/alpha-interix.h, config/mips/linux.h (ASM_OUTPUT_DEFINE_LABEL_DIFFERENCE_SYMBOL): Remove. * config/mmix/mmix-protos.h, config/mmix/mmix.c (mmix_asm_output_define_label_difference_symbol): Remove. * config/mmix/mmix.h (ASM_OUTPUT_DEFINE_LABEL_DIFFERENCE_SYMBOL): Remove. cp: * cp-tree.h (FILE_FUNCTION_PREFIX_LEN): Remove. From-SVN: r55690
2002-07-23recog.c (asm_operand_ok): Allow float CONST_VECTORs for 'F'.J"orn Rennecke5-7/+23
* recog.c (asm_operand_ok): Allow float CONST_VECTORs for 'F'. (constrain_operands): Likewise. * regclass.c (record_reg_classes): Likewise. * reload.c (find_reloads): Likewise. * doc/md.texi: Likewise. From-SVN: r55689
2002-07-23va-arg-15.x, [...]: Delete.Kaveh R. Ghazi4-21/+5
* gcc.c-torture/execute/va-arg-15.x, va-arg-16.x, va-arg-17.x: Delete. From-SVN: r55688
2002-07-23reload.c (find_reloads_toplev): Use simplify_gen_subreg.J"orn Rennecke5-43/+44
gcc: * reload.c (find_reloads_toplev): Use simplify_gen_subreg. * simplify-rtx.c (simplify_subreg): When converting to a non-int mode, try to convert to an integer mode of matching size first. gcc/testsuite: * gcc.c-torture/compile/simd-4.c: New test. From-SVN: r55687
2002-07-23simplify-rtx.x (simplify_subreg): When constructing a CONST_VECTOR from ↵J"orn Rennecke2-1/+14
individual subregs... * simplify-rtx.x (simplify_subreg): When constructing a CONST_VECTOR from individual subregs, check that each subreg has been generated sucessfully. From-SVN: r55686
2002-07-23genautomata.c (VLA_HWINT_SHORTEN, [...]): Remove.Neil Booth7-45/+12
* genautomata.c (VLA_HWINT_SHORTEN, VLA_HWINT_LAST): Remove. * df.c (HANDLE_SUBREG, FOR_EACH_BB_IN_BITMAP_REV, FOR_EACH_BB_IN_SBITMAP): Remove. * gcse.c (NEVER_SET, FOLLOW_BACK_EDGES): Remove. * haifa-sched.c (DONE_PRIORITY, MAX_PRIORITY, TAIL_PRIORITY, LAUNCH_PRIORITY, DONE_PRIORITY_P, LOW_PRIORITY_P): Remove. * loop.c (PREFETCH_BLOACK_IN_LOOP_MIN, PREFETCH_LIMIT_TO_SIMULTANEOUS): Remove. * regrename.c (REGNO_MODE_OK_FOR_BASE_P): Remove. From-SVN: r55685
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