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Add vmaxnm_f64, vminnm_f64, vmax_f64, vmin_f64.
Committed on behalf of Tamar Christina <tamar.christina@arm.com> .
gcc/
* config/aarch64/aarch64-simd-builtins.def
(__builtin_aarch64_fmindf): Change BUILTIN_VDQF to BUILTIN_VDQF_DF.
(__builtin_aarch64_fmaxdf): Likewise.
(__builtin_aarch64_smin_nandf): Likewise.
(__builtin_aarch64_smax_nandf): Likewise.
* config/aarch64/aarch64-simd.md (<fmaxmin><mode>3): Remove.
* config/aarch64/aarch64.md (<fmaxmin><mode>3): Rename to...
(<fmaxmin><mode>3): ...this.
* config/aarch64/arm_neon.h (vmaxnm_f64): New.
(vminnm_f64): Likewise.
(vmin_f64): Likewise.
(vmax_f64): Likewise.
* config/aarch64/iterators.md (FMAXMIN): Merge with...
(FMAXMIN_UNS): ...this.
(fmaxmin): Merged with
(fmaxmin_op): ...this...
(maxmin_uns_op): ...in to this.
gcc/testsuite/
* gcc.target/aarch64/vminmaxnm.c: New.
* gcc.target/aarch64/simd/vminmaxnm_1.c (main): Added float64x1_t
tests.
From-SVN: r238977
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From-SVN: r238976
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on vector float...
[gcc]
2016-08-01 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
Add support for vec_extract on vector float, vector int, vector
short, and vector char vector types.
* config/rs6000/rs6000.c (rs6000_expand_vector_extract): Add
vector float, vector int, vector short, and vector char
optimizations on 64-bit ISA 2.07 systems for both constant and
variable element numbers.
(rs6000_split_vec_extract_var): Likewise.
* config/rs6000/vsx.md (vsx_xscvspdp_scalar2): Allow SFmode to be
Altivec registers on ISA 2.07 and above.
(vsx_extract_v4sf): Delete alternative that hard coded element 0,
which never was matched due to the split occuring before register
allocation (and the code would not have worked on little endian
systems if it did match). Allow extracts to go to the Altivec
registers if ISA 2.07 (power8). Change from using "" around the
C++ code to using {}'s.
(vsx_extract_v4sf_<mode>_load): New insn to optimize vector float
vec_extracts when the vector is in memory.
(vsx_extract_v4sf_var): New insn to optimize vector float
vec_extracts when the element number is variable on 64-bit ISA
2.07 systems.
(vsx_extract_<mode>, VSX_EXTRACT_I iterator): Add optimizations
for 64-bit ISA 2.07 as well as ISA 3.0.
(vsx_extract_<mode>_p9, VSX_EXTRACT_I iterator): Likewise.
(vsx_extract_<mode>_p8, VSX_EXTRACT_I iterator): Likewise.
(vsx_extract_<mode>_load, VSX_EXTRACT_I iterator): New insn to
optimize vector int, vector short, and vector char vec_extracts
when the vector is in memory.
(vsx_extract_<mode>_var, VSX_EXTRACT_I iterator): New insn to
optimize vector int, vector short, and vector char vec_extracts
when the element number is variable.
[gcc/testsuite]
2016-08-01 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/vec-extract-5.c: New tests to test
vec_extract for vector float, vector int, vector short, and vector
char.
* gcc.target/powerpc/vec-extract-6.c: Likewise.
* gcc.target/powerpc/vec-extract-7.c: Likewise.
* gcc.target/powerpc/vec-extract-8.c: Likewise.
* gcc.target/powerpc/vec-extract-9.c: Likewise.
From-SVN: r238971
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* mangle.c (mangle_decl): Warn about mangled name change even if
DECL_REALLY_EXTERN.
From-SVN: r238966
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* mangle.c (get_abi_tags): New.
(find_substitution, write_unqualified_name, write_abi_tags)
(maybe_check_abi_tags): Use it.
From-SVN: r238965
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From-SVN: r238964
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0x4000 to symbols)
PR target/71948
* config/avr/avr.c (AVR_SYMBOL_FLAG_TINY_PM): Use a value that
does not overlap with other symbol flags.
From-SVN: r238961
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instructions and avoid multiple writes to SP.
This patch optimizes the prolog and epilog code to reduce the number of
instructions and avoid multiple writes to SP. The key idea is that epilogs
are almost exact reverses of prologs, and thus all the decisions only need
to be taken once. The frame layout is decided in aarch64_layout_frame()
and decisions recorded in the new aarch64_frame fields initial_adjust,
callee_adjust, callee_offset and final_adjust.
A generic frame setup consists of 5 basic steps:
1. sub sp, sp, initial_adjust
2. stp reg1, reg2, [sp, -callee_adjust]! (push if callee_adjust != 0)
3. add fp, sp, callee_offset (if frame_pointer_needed)
4. stp reg3, reg4, [sp, callee_offset + N*16] (store remaining callee-saves)
5. sub sp, sp, final_adjust
The epilog reverses this, and may omit step 3 if alloca wasn't used.
gcc/
* config/aarch64/aarch64.h (aarch64_frame):
Remove padding0 and hardfp_offset. Add locals_offset,
initial_adjust, callee_adjust, callee_offset and final_adjust.
* config/aarch64/aarch64.c (aarch64_layout_frame):
Remove unused padding0 and hardfp_offset initializations.
Choose frame layout and set frame variables accordingly.
Use INVALID_REGNUM instead of FIRST_PSEUDO_REGISTER.
(aarch64_push_regs): Use INVALID_REGNUM, not FIRST_PSEUDO_REGISTER.
(aarch64_pop_regs): Likewise.
(aarch64_expand_prologue): Remove all decision code, just emit
prolog according to frame variables.
(aarch64_expand_epilogue): Remove all decision code, just emit
epilog according to frame variables.
(aarch64_initial_elimination_offset): Use offset to local/arg area.
testsuite/
* gcc.target/aarch64/test_frame_10.c: Fix test to check for a
single stack adjustment, no writeback.
* gcc.target/aarch64/test_frame_12.c: Likewise.
* gcc.target/aarch64/test_frame_13.c: Likewise.
* gcc.target/aarch64/test_frame_15.c: Likewise.
* gcc.target/aarch64/test_frame_6.c: Likewise.
* gcc.target/aarch64/test_frame_7.c: Likewise.
* gcc.target/aarch64/test_frame_8.c: Likewise.
* gcc.target/aarch64/test_frame_16.c: New test.
From-SVN: r238960
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* constexpr.c (cxx_eval_pointer_plus_expression): Check constancy
of nelts.
* cp-gimplify.c (cp_fully_fold): Only maybe_constant_value in
C++11 and up.
From-SVN: r238957
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TImode register referenced in debug insn can be converted to V1TImode by
scalar to vector optimization. When converting a TImode store to V1TImode,
we need to check all debug insns on its use chain to convert the V1TImode
register to SUBREG TImode if source register is undefined.
gcc/
PR target/72748
* config/i386/i386.c (timode_scalar_chain::convert_insn): Call
fix_debug_reg_uses after changing source register mode to
V1TImode if source register is undefined.
gcc/testsuite/
PR target/72748
* gcc.target/i386/pr72748.c: New test.
From-SVN: r238956
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-ftree-vectorize)
2016-08-01 Alan Hayward <alan.hayward@arm.com>
gcc/
PR tree-optimization/71818
* tree-vect-loop-manip.c (vect_can_advance_ivs_p): Don't advance IVs
with non invariant evolutions
testsuite/
PR tree-optimization/71818
* gcc.dg/vect/pr71818.c: New
From-SVN: r238955
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PR tree-optimization/71857
* gcc.dg/tree-ssa/ivopt_mult_4.c: Change expectation.
From-SVN: r238953
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PR target/72767
* config/avr/avr.md (length) [branch]: Correct insn length
attribute for forward branches.
From-SVN: r238948
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* doc/extend.texi (AVR Built-in Functions): Document
__builtin_avr_nops.
* config/avr/builtins.def (NOPS): New.
* config/avr/avr.c (avr_expand_nops): New static function.
(avr_expand_builtin): Use it to handle AVR_BUILTIN_NOPS.
From-SVN: r238947
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* config/aarch64/aarch64.c (aarch64_classify_address): Use DImode when
performing aarch64_offset_7bit_signed_scaled_p check for TImode LDP/STP
addresses.
* gcc.target/aarch64/ldp_stp_unaligned_1.c: New test.
From-SVN: r238938
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2016-08-01 Virendra Pathak <virendra.pathak@broadcom.com>
* config/aarch64/aarch64.c (vulcan_tunings): Update
vulcan L1 cache_line_size.
From-SVN: r238937
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gcc/c/
2016-08-01 Jan Beulich <jbeulich@suse.com>
* c-fold.c (c_fully_fold_internal): Also emit shift count
warnings for vector types.
* c-typeck.c (build_binary_op): Likewise.
gcc/testsuite/
2016-08-01 Jan Beulich <jbeulich@suse.com>
* gcc.dg/vshift-6.c, gcc.dg/vshift-7.c: New.
From-SVN: r238936
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From-SVN: r238933
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From-SVN: r238922
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2016-07-31 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* gcc.target/powerpc/divkc3-1.c: Require POWER8 hardware.
* gcc.target/powerpc/mulkc3-1.c: Likewise.
From-SVN: r238919
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* lib/target-supports.exp (check_effective_target_c): Fix indentation.
(check_effective_target_c++): Likewise. Also match for libstdc++.
From-SVN: r238916
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initialized EQUIVALENCEd character vars)
2016-07-30 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/41922
* target-memory.c (expr_to_char): Pass in locus and use it in error
messages.
(gfc_merge_initializers): Ditto.
* target-memory.h: Update prototype for gfc_merge_initializers ().
* trans-common.c (get_init_field): Use the correct locus.
2016-07-30 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/41922
* gfortran.dg/equiv_constraint_5.f90: Adjust the error message.
* gfortran.dg/equiv_constraint_7.f90: Ditto.
* gfortran.dg/pr41922.f90: New test.
From-SVN: r238915
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From-SVN: r238914
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corruption))
2016-07-30 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/68566
* check.c (gfc_check_reshape): Check for constant expression.
2016-07-30 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/68566
* gfortran.dg/pr68566.f90: new test.
From-SVN: r238911
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PR c++/60760 - arithmetic on null pointers should not be allowed in constant
PR c++/71091 - constexpr reference bound to a null pointer dereference
gcc/cp/ChangeLog:
PR c++/60760
PR c++/71091
* constexpr.c (cxx_eval_binary_expression): Reject invalid expressions
involving null pointers.
(cxx_eval_component_reference): Reject null pointer dereferences.
(cxx_eval_indirect_ref): Reject indirecting through null pointers.
(cxx_eval_constant_expression): Reject invalid expressions involving
null pointers.
gcc/testsuite/ChangeLog:
PR c++/60760
PR c++/71091
* g++.dg/cpp0x/constexpr-cast.C: New test.
* g++.dg/cpp0x/constexpr-nullptr-2.C: New test.
* g++.dg/cpp1y/constexpr-sfinae.C: Correct.
* g++.dg/ubsan/pr63956.C: Correct.
From-SVN: r238909
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vector memory address...
[gcc]
2016-07-30 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000-protos.h (rs6000_adjust_vec_address): New
function that takes a vector memory address, a hard register, an
element number and a temporary base register, and recreates an
address that points to the appropriate element within the vector.
* config/rs6000/rs6000.c (rs6000_adjust_vec_address): Likewise.
(rs6000_split_vec_extract_var): Add support for the target of a
vec_extract with variable element number being a scalar memory
location.
(rtx_is_swappable_p): VLSO insns (UNSPEC_VSX_VSLOW) are not
swappable.
* config/rs6000/vsx.md (vsx_extract_<mode>_load): Replace
vsx_extract_<mode>_load insn with a new insn that optimizes
storing either element to a memory location, using scratch
registers to pick apart the vector and reconstruct the address.
(vsx_extract_<P:mode>_<VSX_D:mode>_load): Likewise.
(vsx_extract_<mode>_store): Rework alternatives to more correctly
support Altivec registers. Add support for ISA 3.0 Altivec d-form
store instruction.
(vsx_extract_<mode>_var): Add support for extracting a variable
element number from memory.
[gcc/testsuite]
2016-07-30 Michael Meissner <meissner@linux.vnet.ibm.com>
* gcc.target/powerpc/vec-extract-2.c: New tests for vec_extract of
vector double or vector long where the vector is in memory.
* gcc.target/powerpc/vec-extract-3.c: Likewise.
* gcc.target/powerpc/vec-extract-4.c: Likewise.
From-SVN: r238908
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incompatible data)
2016-07-30 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/69867
* decl.c (build_struct): Ensure that pointers point to something.
2016-07-30 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/69867
* gfortran.dg/pr69867.f90: New test.
From-SVN: r238907
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gfc_set_constant_character_len)
2016-07-30 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/69962
* decl.c (gfc_set_constant_character_len): if expr is not
constant issue an error instead of an ICE.
2016-07-30 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/69962
* gfortran.dg/pr69962.f90: New test.
From-SVN: r238906
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2016-07-30 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/70006
* io.c (gfc_resolve_dt): Use correct locus.
* resolve.c (resolve_branch): Ditto.
2016-07-30 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/70006
* gfortran.dg/pr70006.f90: New test.
From-SVN: r238905
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undefined variable)
2016-07-30 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/71730
* decl.c (char_len_param_value): Check return value of
gfc_reduce_init_expr().
2016-07-30 Steven G. Kargl <kargl@gcc.gnu.org>
PR fortran/71730
* gfortran.dg/pr71730.f90: New test.
* gfortran.dg/bounds_check_strlen_2.f90: Fix invalid code.
* gfortran.dg/array_constructor_27.f03: Update dg-error message.
* gfortran.dg/array_constructor_26.f03: Ditto.
From-SVN: r238904
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From-SVN: r238902
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2016-07-29 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* g++.dg/pr70098.C: Remove XFAIL for powerpc64_no_dm.
* gcc.target/powerpc/pr71763.c: Likewise.
From-SVN: r238891
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PR c/71926
* c-common.c (c_common_truthvalue_conversion): Use LOCATION for the
parentheses warning.
* semantics.c (maybe_convert_cond): Use the location of COND for the
parentheses warning.
* g++.dg/warn/Wparentheses-30.C: New test.
* gcc.dg/Wparentheses-14.c: New test.
From-SVN: r238886
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expected function_decl, have var_decl in implicitly_declare))
PR c/71573
* c-decl.c (implicitly_declare): Return decl early not only for
error_mark_nodes, but for anything that is not a FUNCTION_DECL.
* gcc.dg/noncompile/pr71573.c: New test.
From-SVN: r238885
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PR c/71853
* c-parser.c (c_parser_switch_statement): Initialize ce.original_type
to error node for invalid code.
* gcc.dg/noncompile/pr71853.c: New test.
From-SVN: r238884
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otherwise empty struct")
PR c/71742
* c-decl.c (finish_struct): Rephrase an error message.
* gcc.dg/940510-1.c: Adjust dg-error.
* gcc.dg/c99-flex-array-1.c: Likewise.
* gcc.dg/c99-flex-array-typedef-1.c: Likewise.
From-SVN: r238883
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compares against constants of the...
* config/avr/avr.c (avr_out_compare): Use const0_rtx instead of 0
when testing for compares against constants of the form 0xabab.
From-SVN: r238879
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* gcc.dg/pr59833.c: Use dg-add-options ieee.
From-SVN: r238878
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be infinite)
PR tree-optimization/57558
* tree-vect-loop-manip.c (vect_create_cond_for_niters_checks): New
function.
(vect_loop_versioning): Support versioning with niter assumptions.
* tree-vect-loop.c (tree-ssa-loop.h): Include header file.
(vect_get_loop_niters): New parameter. Reimplement to support
assumptions in loop niter info.
(vect_analyze_loop_form_1, vect_analyze_loop_form): Ditto.
(new_loop_vec_info): Init LOOP_VINFO_NITERS_ASSUMPTIONS.
(vect_estimate_min_profitable_iters): Use LOOP_REQUIRES_VERSIONING.
Support loop versioning for niters.
* tree-vectorizer.c (tree-ssa-loop-niter.h): Include header file.
(vect_free_loop_info_assumptions): New function.
(vectorize_loops): Free loop niter info for loops with flag
LOOP_F_ASSUMPTIONS set if vectorization failed.
* tree-vectorizer.h (struct _loop_vec_info): New field
num_iters_assumptions.
(LOOP_VINFO_NITERS_ASSUMPTIONS): New macro.
(LOOP_REQUIRES_VERSIONING_FOR_NITERS): New macro.
(LOOP_REQUIRES_VERSIONING): New macro.
(vect_free_loop_info_assumptions): New decl.
gcc/testsuite
PR tree-optimization/57558
* gcc.dg/vect/pr57558-1.c: New test.
* gcc.dg/vect/pr57558-2.c: New test.
From-SVN: r238877
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* cfgloop.h (struct loop): New field constraints.
(LOOP_C_INFINITE, LOOP_C_FINITE): New macros.
(loop_constraint_set, loop_constraint_clr, loop_constraint_set_p): New
functions.
* cfgloop.c (alloc_loop): Initialize new field.
* cfgloopmanip.c (copy_loop_info): Copy constraints.
* tree-ssa-loop-niter.c (number_of_iterations_exit_assumptions):
Adjust niter analysis wrto loop constraints.
* doc/loop.texi (@node Number of iterations): Add description for loop
constraints.
From-SVN: r238876
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testsuite/
gcc.dg/pr70920-4.c: Restrict to lp64 targets and make scan-tree-dump
to scan forwprop1 dump pass.
From-SVN: r238874
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From-SVN: r238873
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From-SVN: r238871
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2016-07-29 Paolo Carlini <paolo.carlini@oracle.com>
PR c++/51488
* g++.dg/template/pr51488.C: New.
From-SVN: r238870
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* init.c (expand_aggr_init_1): Only handle value-init of bases.
* constexpr.c (build_data_member_initialization): Handle multiple
initializers for the same field.
From-SVN: r238867
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PR c/7652
* config/i386/i386.c (ix86_expand_args_builtin): Add break.
(ix86_expand_round_builtin): Likewise.
From-SVN: r238864
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gcc/
PR rtl-optimization/71976
* combine.c (get_last_value): Return 0 if the argument for which
the function is called has a wider mode than the recorded value.
Co-Authored-By: Georg-Johann Lay <avr@gjlay.de>
From-SVN: r238863
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PR c/71969
* c-decl.c (finish_function): Only set DECL_DISREGARD_INLINE_LIMITS
on GNU extern inline functions.
* gcc.dg/alias-11.c (add_cfi, new_cfi): Change __inline__ to
static __inline__.
* gcc.dg/pr71969-1.c: New test.
* gcc.dg/pr71969-2.c: New test.
* gcc.dg/pr71969-3.c: New test.
From-SVN: r238862
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c_parser_postfix_expression_after_paren_type, at c/c-parser.c:8192))
PR c/71583
* c-parser.c (c_parser_postfix_expression_after_paren_type): Also
check expr.value.
* gcc.dg/noncompile/pr71583.c: New test.
From-SVN: r238861
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in default_conversion, at c/c-typeck.c:2126)
PR c/71574
* c-common.c (handle_alloc_align_attribute): Also check FUNCTION_DECL.
* c-c++-common/pr71574.c: New test.
From-SVN: r238859
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