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2018-03-13PR c/46921 Lost side effect when struct initializer expression uses comma ↵David Pagan4-2/+55
operator This patch fixes improper handling of comma operator expression in a struct field initializer as described in: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=46921 Currently, function output_init_element () does not evaluate the left hand expression in a comma operator that's used for a struct initializer field if the right hand side is zero-sized. However, the left hand expression must be evaluated if it's found to have side effects (for example, a function call). Patch was successfully bootstrapped and tested on x86_64-linux. gcc/c: 2018-03-13 David Pagan <dave.pagan@oracle.com> PR c/46921 * c-typeck.c (output_init_element): Ensure field initializer expression is always evaluated if there are side effects. gcc/testsuite: 2018-03-13 David Pagan <dave.pagan@oracle.com> PR c/46921 * gcc.dg/pr46921.c: New test. From-SVN: r258497
2018-03-13re PR target/84743 (default widths for parallel reassociation now hurt ↵Aaron Sawdey2-1/+7
rather than help) 2018-03-13 Aaron Sawdey <acsawdey@linux.vnet.ibm.com> PR target/84743 * config/rs6000/rs6000.c (rs6000_reassociation_width): Disable parallel reassociation for int modes. From-SVN: r258495
2018-03-13Pedwarn about auto parameter even without -Wpedantic.Jason Merrill25-41/+40
* parser.c (cp_parser_simple_type_specifier): Pedwarn about auto parameter even without -Wpedantic. From-SVN: r258494
2018-03-13PR c++/84798 - ICE with auto in abstract function declarator.Jason Merrill4-3/+20
* parser.c (cp_parser_parameter_declaration_clause): Check parser->default_arg_ok_p. From-SVN: r258493
2018-03-13PR tree-optimization/84725 - enable attribute nonstring for all narrow ↵Martin Sebor6-12/+287
character types gcc/c-family/ChangeLog: PR tree-optimization/84725 * c-attribs.c (handle_nonstring_attribute): Allow attribute nonstring with all three narrow character types, including their qualified forms. gcc/testsuite/ChangeLog: PR tree-optimization/84725 * c-c++-common/Wstringop-truncation-4.c: New test. * c-c++-common/attr-nonstring-5.c: New test. From-SVN: r258492
2018-03-13[SLP/AArch64] Fix unpack handling for big-endian SVERichard Sandiford8-47/+123
I hadn't realised that on big-endian targets, VEC_UNPACK*HI_EXPR unpacks the low-numbered lanes and VEC_UNPACK*LO_EXPR unpacks the high-numbered lanes. This meant that both the SVE patterns and the handling of fully-masked loops were wrong. The patch deals with that by making sure that all vec_unpack* optabs are define_expands, using BYTES_BIG_ENDIAN to choose the appropriate define_insn. This in turn meant that we can get rid of the duplication between the signed and unsigned patterns for predicates. (We provide implementations of both the signed and unsigned optabs because the sign doesn't matter for predicates: every element contains only one significant bit.) Also, the float unpacks need to unpack one half of the input vector, but the unpacked upper bits are "don't care". There are two obvious ways of handling that: use an unpack (filling with zeros) or use a ZIP (filling with a duplicate of the low bits). The code previously used unpacks, but the sequence involved a subreg that is semantically an element reverse on big-endian targets. Using the ZIP patterns avoids that, and at the moment there's no reason to prefer one over the other for performance reasons, so the patch switches to ZIP unconditionally. As the comment says, it would be easy to optimise this later if UUNPK turns out to be better for some implementations. 2018-03-13 Richard Sandiford <richard.sandiford@linaro.org> gcc/ * tree-vect-loop-manip.c (vect_maybe_permute_loop_masks): Reverse the choice between VEC_UNPACK_LO_EXPR and VEC_UNPACK_HI_EXPR for big-endian. * config/aarch64/iterators.md (hi_lanes_optab): New int attribute. * config/aarch64/aarch64-sve.md (*aarch64_sve_<perm_insn><perm_hilo><mode>): Rename to... (aarch64_sve_<perm_insn><perm_hilo><mode>): ...this. (*extend<mode><Vwide>2): Rename to... (aarch64_sve_extend<mode><Vwide>2): ...this. (vec_unpack<su>_<perm_hilo>_<mode>): Turn into a define_expand, renaming the old pattern to... (aarch64_sve_punpk<perm_hilo>_<mode>): ...this. Only define unsigned packs. (vec_unpack<su>_<perm_hilo>_<SVE_BHSI:mode>): Turn into a define_expand, renaming the old pattern to... (aarch64_sve_<su>unpk<perm_hilo>_<SVE_BHSI:mode>): ...this. (*vec_unpacku_<perm_hilo>_<mode>_no_convert): Delete. (vec_unpacks_<perm_hilo>_<mode>): Take BYTES_BIG_ENDIAN into account when deciding which SVE instruction the optab should use. (vec_unpack<su_optab>_float_<perm_hilo>_vnx4si): Likewise. gcc/testsuite/ * gcc.target/aarch64/sve/unpack_fcvt_signed_1.c: Expect zips rather than unpacks. * gcc.target/aarch64/sve/unpack_fcvt_unsigned_1.c: Likewise. * gcc.target/aarch64/sve/unpack_float_1.c: Likewise. From-SVN: r258489
2018-03-13[AArch64] Add a tlsdesc call pattern for SVERichard Sandiford5-3/+140
tlsdesc calls are guaranteed to preserve all Advanced SIMD registers, but are not guaranteed to preserve the SVE extension of them. The calls also don't preserve the SVE predicate registers. The long-term plan for handling the SVE vector registers is CLOBBER_HIGH, which adds a clobber equivalent of TARGET_HARD_REGNO_CALL_PART_CLOBBERED. The pattern can then directly model the fact that the low 128 bits are preserved and the upper bits are clobbered. However, it's too late now for that to be included in GCC 8, so this patch conservatively treats the whole vector register as being clobbered. This has the obvious disadvantage that compiling for SVE can make NEON code worse, but I don't think there's much we can do about that until CLOBBER_HIGH is in. 2018-03-13 Richard Sandiford <richard.sandiford@linaro.org> gcc/ * config/aarch64/aarch64.md (V4_REGNUM, V8_REGNUM, V12_REGNUM) (V20_REGNUM, V24_REGNUM, V28_REGNUM, P1_REGNUM, P2_REGNUM, P3_REGNUM) (P4_REGNUM, P5_REGNUM, P6_REGNUM, P8_REGNUM, P9_REGNUM, P10_REGNUM) (P11_REGNUM, P12_REGNUM, P13_REGNUM, P14_REGNUM): New define_constants. (tlsdesc_small_<mode>): Turn a define_expand and use tlsdesc_small_sve_<mode> for SVE. Rename original define_insn to... (tlsdesc_small_advsimd_<mode>): ...this. (tlsdesc_small_sve_<mode>): New pattern. gcc/testsuite/ * gcc.target/aarch64/sve/tls_1.c: New test. * gcc.target/aarch64/sve/tls_2.C: Likewise. From-SVN: r258488
2018-03-13[AArch64] Add SVE mul_highpart patternsRichard Sandiford6-1/+104
One advantage of the new permute handling compared to the old way is that we can now easily take advantage of the vectoriser's divmod patterns for SVE. 2018-03-13 Richard Sandiford <richard.sandiford@linaro.org> gcc/ * config/aarch64/iterators.md (UNSPEC_SMUL_HIGHPART) (UNSPEC_UMUL_HIGHPART): New constants. (MUL_HIGHPART): New int iteraor. (su): Handle UNSPEC_SMUL_HIGHPART and UNSPEC_UMUL_HIGHPART. * config/aarch64/aarch64-sve.md (<su>mul<mode>3_highpart): New define_expand. (*<su>mul<mode>3_highpart): New define_insn. gcc/testsuite/ * gcc.target/aarch64/sve/mul_highpart_1.c: New test. * gcc.target/aarch64/sve/mul_highpart_1_run.c: Likewise. From-SVN: r258487
2018-03-13re PR lto/84805 (ICE in get_odr_type, at ipa-devirt.c:2096 since r258133)Eric Botcazou2-2/+10
PR lto/84805 * ipa-devirt.c (odr_subtypes_equivalent_p): Do not get the ODR type of incomplete types. From-SVN: r258481
2018-03-13Fix PTA info in IPA ICF (PR ipa/84658).Martin Liska5-20/+150
2018-03-13 Martin Liska <mliska@suse.cz> PR ipa/84658. * (sem_item_optimizer::sem_item_optimizer): Initialize new vector. (sem_item_optimizer::~sem_item_optimizer): Release it. (sem_item_optimizer::merge_classes): Register variable aliases. (sem_item_optimizer::fixup_pt_set): New function. (sem_item_optimizer::fixup_points_to_sets): Likewise. * ipa-icf.h: Declare new variables and functions. 2018-03-13 Martin Liska <mliska@suse.cz> PR ipa/84658. * g++.dg/ipa/pr84658.C: New test. From-SVN: r258480
2018-03-13re PR middle-end/84834 (ICE: tree check: expected integer_cst, have ↵Jakub Jelinek4-12/+38
complex_cst in to_wide, at tree.h:5527) PR middle-end/84834 * match.pd ((A & C) != 0 ? D : 0): Use INTEGER_CST@2 instead of integer_pow2p@2 and test integer_pow2p in condition. (A < 0 ? C : 0): Similarly for @1. * gcc.dg/pr84834.c: New test. From-SVN: r258479
2018-03-13re PR middle-end/84831 (Invalid memory read in parse_output_constraint)Jakub Jelinek2-49/+60
PR middle-end/84831 * stmt.c (parse_output_constraint): If the CONSTRAINT_LEN (*p, p) characters starting at p contain '\0' character, don't look beyond that. From-SVN: r258478
2018-03-13re PR target/84827 (ICE in extract_insn, at recog.c:2311)Jakub Jelinek4-1/+30
PR target/84827 * config/i386/i386.md (round<mode>2): For 387 fancy math, disable pattern if -ftrapping-math -fno-fp-int-builtin-inexact. * gcc.target/i386/pr84827.c: New test. From-SVN: r258477
2018-03-13re PR target/84828 (ICE in verify_flow_info at gcc/cfghooks.c:265)Jakub Jelinek4-3/+33
PR target/84828 * reg-stack.c (change_stack): Change update_end var from int to rtx_insn *, if non-NULL don't update just BB_END (current_block), but also call set_block_for_insn on the newly added insns and rescan. * g++.dg/ext/pr84828.C: New test. From-SVN: r258476
2018-03-13re PR target/84786 ([miscompilation] vunpcklpd accessing xmm16-22 targeting KNL)Jakub Jelinek5-3/+52
PR target/84786 * config/i386/sse.md (sse2_loadhpd): Use Yv constraint rather than v on the last operand. * gcc.target/i386/avx512f-pr84786-1.c: New test. * gcc.target/i386/avx512f-pr84786-2.c: New test. From-SVN: r258475
2018-03-13Daily bump.GCC Administrator1-1/+1
From-SVN: r258474
2018-03-13re PR c++/84808 (ICE with constexpr and array)Jakub Jelinek4-5/+44
PR c++/84808 * constexpr.c (find_array_ctor_elt): Don't use elt reference after first potential CONSTRUCTOR_ELTS reallocation. Convert dindex to sizetype. Formatting fixes. * g++.dg/cpp1y/constexpr-84808.C: New test. From-SVN: r258471
2018-03-13re PR c++/84704 (internal compiler error: gimplification failed)Jakub Jelinek4-0/+27
PR c++/84704 * tree.c (stabilize_reference_1): Return save_expr (e) for STATEMENT_LIST even if it doesn't have side-effects. * g++.dg/debug/pr84704.C: New test. From-SVN: r258470
2018-03-12re PR ada/82813 (warning: '.builtin_memcpy' writing between 2 and 6 bytes ↵Eric Botcazou2-0/+9
into a region of size 0 overflows the destination [-Wstringop-overflow=]) PR ada/82813 * gcc-interface/misc.c (gnat_post_options): Disable string overflow warnings. From-SVN: r258466
2018-03-12Fix spelling of -mclflushopt in manualJonathan Wakely2-2/+6
* doc/invoke.texi (-mclflushopt): Fix spelling of option. From-SVN: r258462
2018-03-12[PATCH][AARCH64]Fix immediate alternative of movhf_aarch64 pattern.Renlin Li6-13/+26
gcc/ 2018-03-12 Renlin Li <renlin.li@arm.com> * config/aarch64/aarch64.md (movhf_aarch64): Fix mode argument to aarch64_output_scalar_simd_mov_immediate. gcc/testsuite/ 2018-03-12 Renlin Li <renlin.li@arm.com> * gcc.target/aarch64/movi_hf.c: New. * gcc.target/aarch64/f16_mov_immediate_1.c: Update. * gcc.target/aarch64/f16_mov_immediate_2.c: Update. From-SVN: r258459
2018-03-12PR tree-optimization/83456 - -Wrestrict false positive on a non-overlapping ↵Martin Sebor12-93/+380
memcpy in an inline function gcc/ChangeLog: PR tree-optimization/83456 * gimple-fold.c (gimple_fold_builtin_memory_op): Avoid warning for perfectly overlapping calls to memcpy. (gimple_fold_builtin_memory_chk): Same. (gimple_fold_builtin_strcpy): Handle no-warning. (gimple_fold_builtin_stxcpy_chk): Same. * tree-ssa-strlen.c (maybe_diag_stxncpy_trunc): Handle no-warning. gcc/c-family/ChangeLog: PR tree-optimization/83456 * gcc/c-family/c-common.c (check_function_restrict): Return bool. Restore checking of bounded built-in functions. (check_function_arguments): Also return the result of warn_for_restrict. * gcc/c-family/c-common.c (check_function_restrict): Return bool. * gcc/c-family/c-warn.c (warn_for_restrict): Return bool. gcc/testsuite/ChangeLog: PR tree-optimization/83456 * c-c++-common/Wrestrict-2.c: Remove test cases. * c-c++-common/Wrestrict.c: Same. * gcc.dg/Wrestrict-12.c: New test. * gcc.dg/Wrestrict-14.c: New test. From-SVN: r258455
2018-03-12rs6000: sysv: Don't pass SFmode in varargs in FPRsSegher Boessenkool2-6/+14
This makes the float32-basic.c testcase work on sysv (32-bit Linux). "float" is promoted to "double" for varargs. The ABI also only defines the use of double precision in varargs. But _Float32 is not promoted. Since there is no way of passing single-precision float in FPRs we should pass SFmode in GPRs (or memory) instead. This is similar to the 64-bit ABI. From-SVN: r258454
2018-03-12* de.po, es.po, sv.po: Update.Joseph Myers4-1048/+701
From-SVN: r258453
2018-03-12combine: Fix PR84780 (more LOG_LINKS trouble)Segher Boessenkool2-0/+8
There still are situations where we have stale LOG_LINKS. This causes combine to try two-insn combinations I2->I3 where the register set by I2 is used before I3 as well. Not good. This patch fixes it by checking for this situation in can_combine_p (similar to what we already do for three and four insn combinations). From-SVN: r258452
2018-03-12PR c++/84355 - ICE with deduction for member class template.Jason Merrill3-2/+27
* pt.c (tsubst) [TEMPLATE_TYPE_PARM]: Always substitute into CLASS_PLACEHOLDER_TEMPLATE. From-SVN: r258451
2018-03-12Add a testcase for PR 84821H.J. Lu2-0/+59
This was introduced by r258390 and fixed by r258415. * g++.dg/pr84821.C: New test. From-SVN: r258449
2018-03-12Add a testcase for PR 84799H.J. Lu2-0/+33
This was introduced by r258390 and fixed by r258415. * gcc.dg/pr84799.c: New test. From-SVN: r258448
2018-03-12PR c++/84802 - ICE capturing uninstantiated class.Jason Merrill3-0/+18
* lambda.c (build_capture_proxy): Call complete_type. From-SVN: r258447
2018-03-12re PR tree-optimization/84803 (ICE from ifcvt_memrefs_wont_trap with -O3)Richard Biener4-0/+46
2018-03-12 Richard Biener <rguenther@suse.de> PR tree-optimization/84803 * tree-if-conv.c (ifcvt_memrefs_wont_trap): Don't do anything for refs DR analysis didn't process. * gcc.dg/torture/pr84803.c: New testcase. From-SVN: r258446
2018-03-12re PR c++/84813 (internal compiler error: Segmentation fault with lambdas ↵Jakub Jelinek2-1/+39
and constexpr variables) PR c++/84813 * g++.dg/debug/pr84813.C: New test. From-SVN: r258445
2018-03-12re PR tree-optimization/84777 (-Os inhibits all vectorization)Richard Biener2-1/+8
2018-03-12 Richard Biener <rguenther@suse.de> PR tree-optimization/84777 * tree-ssa-loop-ch.c (should_duplicate_loop_header_p): For force-vectorize loops ignore whether we are optimizing for size. From-SVN: r258444
2018-03-12[NDS32] Implement TARGET_MD_ASM_ADJUST hook.Chung-Ju Wu2-1/+20
gcc/ * config/nds32/nds32.c (nds32_md_asm_adjust): New function. (TARGET_MD_ASM_ADJUST): Define. From-SVN: r258443
2018-03-12[NDS32] Refine prologue and epilogue code generation.Monk Chiang4-309/+252
gcc/ * config/nds32/nds32.c (nds32_compute_stack_frame, nds32_emit_stack_push_multiple, nds32_emit_stack_pop_multiple, nds32_emit_stack_v3push, nds32_emit_stack_v3pop, nds32_emit_adjust_frame, nds32_expand_prologue, nds32_expand_epilogue, nds32_expand_prologue_v3push, nds32_expand_epilogue_v3pop): Refine. * config/nds32/nds32.h (NDS32_FIRST_CALLEE_SAVE_GPR_REGNUM, NDS32_LAST_CALLEE_SAVE_GPR_REGNUM, NDS32_V3PUSH_AVAILABLE_P): New. * config/nds32/nds32.md (prologue, epilogue): Use macro NDS32_V3PUSH_AVAILABLE_P to do checking. Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com> Co-Authored-By: Kito Cheng <kito.cheng@gmail.com> From-SVN: r258442
2018-03-12Daily bump.GCC Administrator1-1/+1
From-SVN: r258441
2018-03-11re PR fortran/84546 (Bad sourced allocation of CLASS(*) with source with ↵Paul Thomas6-12/+154
CLASS(*) component) 2018-03-11 Paul Thomas <pault@gcc.gnu.org> PR fortran/84546 * trans-array.c (structure_alloc_comps): Make sure that the vptr is copied and that the unlimited polymorphic _len is used to compute the size to be allocated. * trans-expr.c (gfc_get_class_array_ref): If unlimited, use the unlimited polymorphic _len for the offset to the element. (gfc_copy_class_to_class): Set the new 'unlimited' argument. * trans.h : Add the boolean 'unlimited' to the prototype. 2018-03-11 Paul Thomas <pault@gcc.gnu.org> PR fortran/84546 * gfortran.dg/unlimited_polymorphic_29.f90 : New test. From-SVN: r258438
2018-03-11re PR fortran/83939 (Constraint C1290 (elemental function cannot be ↵Steven G. Kargl4-0/+36
allocatable) not enforced) 2018-03-11 Steven G. Kargl <kargl@gcc.gnu.org> PR fortran/83939 * resolve.c (resolve_fl_procedure): Enforce F2018:C15100. 2018-03-11 Steven G. Kargl <kargl@gcc.gnu.org> PR fortran/83939 * gfortran.dg/pr83939.f90 From-SVN: r258437
2018-03-11check.c (gfc_check_kill): Check pid and sig are scalar.Steven G. Kargl5-52/+88
2018-03-11 Steven G. Kargl <kargls@gcc.gnu.org> * check.c (gfc_check_kill): Check pid and sig are scalar. (gfc_check_kill_sub): Restrict kind to 4 and 8. * intrinsic.c (add_function): Sort keyword list. Add pid and sig keywords for KILL. Remove redundant *back="back" in favor of the original *bck="back". (add_subroutines): Sort keyword list. Add pid and sig keywords for KILL. * intrinsic.texi: Fix documentation to consistently use pid and sig. * iresolve.c (gfc_resolve_kill): Kind can only be 4 or 8. Choose the correct function. (gfc_resolve_rename_sub): Add comment. From-SVN: r258436
2018-03-11re PR fortran/66128 (ICE for some intrinsics with zero sized array parameter)Thomas Koenig4-158/+72
2018-03-11 Thomas Koenig <tkoenig@gcc.gnu.org> PR fortran/66128 * simplify.c (simplify_transformation): Return default result for empty array argument. (gfc_simplify_all): Remove special-case handling for zerosize. (gfc_simplify_any): Likewise. (gfc_simplify_count): Likewise. (gfc_simplify_iall): Likewise. (gfc_simplify_iany): Likewise. (gfc_simplify_iparity): Likewise. (gfc_simplify_minval): Likewise. (gfc_simplify_maxval): Likewise. (gfc_simplify_norm2): Likewise. (gfc_simplify_product): Likewise. (gfc_simplify_sum): Likewise. 2018-03-11 Thomas Koenig <tkoenig@gcc.gnu.org> PR fortran/66128 * gfortran.dg/zero_sized_9.f90: New test. From-SVN: r258435
2018-03-11re PR debug/58150 (debug info about definition of enum class not emitted if ↵Jakub Jelinek4-15/+67
the declaration was already used in a class) PR debug/58150 * dwarf2out.c (gen_enumeration_type_die): Don't guard adding DW_AT_declaration for ENUM_IS_OPAQUE on -gdwarf-4 or -gno-strict-dwarf, but on TYPE_SIZE. Don't do anything for ENUM_IS_OPAQUE if not creating a new die. Don't set TREE_ASM_WRITTEN if ENUM_IS_OPAQUE. Guard addition of most attributes on !orig_type_die or the attribute not being present already. Assert TYPE_VALUES is NULL for ENUM_IS_OPAQUE. * g++.dg/debug/dwarf2/enum2.C: New test. From-SVN: r258434
2018-03-11[NDS32] Add new option -mvh.Kito Cheng3-0/+13
gcc/ * config/nds32/nds32.c (nds32_cpu_cpp_builtins): Modify to define __NDS32_VH__ macro. * config/nds32/nds32.opt (mvh): New option. Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com> From-SVN: r258427
2018-03-11[NDS32] Add new function nds32_cpu_cpp_builtins and use it for ↵Kito Cheng4-32/+62
TARGET_CPU_CPP_BUILTINS. gcc/ * config/nds32/nds32-protos.h (nds32_cpu_cpp_builtins): Declare function. * config/nds32/nds32.c (nds32_cpu_cpp_builtins): New function. * config/nds32/nds32.h (TARGET_CPU_CPP_BUILTINS): Modify its definition. Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com> From-SVN: r258426
2018-03-11[NDS32] Implement strlensi pattern.Kito Cheng4-0/+85
gcc/ * config/nds32/nds32-memory-manipulation.c (nds32_expand_strlen): New function. * config/nds32/nds32-multiple.md (strlensi): New pattern. * config/nds32/nds32-protos.h (nds32_expand_strlen): Declare function. Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com> From-SVN: r258425
2018-03-11[NDS32] Add intrinsic function for ffb, ffmism and flmism.Monk Chiang5-0/+75
gcc/ * config/nds32/constants.md (unspec_element): Add UNSPEC_FFB, UNSPEC_FFMISM and UNSPEC_FLMISM. * config/nds32/nds32-intrinsic.c (bdesc_2arg): Add builtin description for ffb, ffmism and flmism. * config/nds32/nds32-intrinsic.md (unspec_ffb): Define new pattern. (unspec_ffmism): Ditto. (unspec_flmism): Ditto. (nds32_expand_builtin_impl): Check if string extension is available. * config/nds32/nds32.h (nds32_builtins): Add NDS32_BUILTIN_FFB, NDS32_BUILTIN_FFMISM and NDS32_BUILTIN_FLMISM. Co-Authored-By: Chung-Ju Wu <jasonwucj@gmail.com> Co-Authored-By: Kito Cheng <kito.cheng@gmail.com> From-SVN: r258424
2018-03-11Daily bump.GCC Administrator1-1/+1
From-SVN: r258423
2018-03-10re PR fortran/84734 (Compiling codes with insane array dimensions gives an ↵Steven G. Kargl4-3/+22
ICE after r257971) 2018-03-09 Steven G. Kargl <kargl@gcc.gnu.org> PR fortran/84734 * arith.c (check_result, eval_intrinsic): If result overflows, pass the expression up the chain instead of a NULL pointer. 2018-03-09 Steven G. Kargl <kargl@gcc.gnu.org> PR fortran/84734 * gfortran.dg/pr84734.f90: New test. From-SVN: r258416
2018-03-10revert: re PR target/83712 ("Unable to find a register to spill" when ↵Vladimir Makarov5-264/+137
compiling for thumb1) 2018-03-10 Vladimir Makarov <vmakarov@redhat.com> Reverting patch: 2018-03-09 Vladimir Makarov <vmakarov@redhat.com> PR target/83712 * lra-assigns.c (assign_by_spills): Return a flag of reload assignment failure. Do not process the reload assignment failures. Do not spill other reload pseudos if they has the same reg class. (lra_assign): Add a return arg. Set up from the result of assign_by_spills call. (find_reload_regno_insns, lra_split_hard_reg_for): New functions. * lra-constraints.c (split_reg): Add a new arg. Use it instead of usage_insns if it is not NULL. (spill_hard_reg_in_range): New function. (split_if_necessary, inherit_in_ebb): Pass a new arg to split_reg. * lra-int.h (spill_hard_reg_in_range, lra_split_hard_reg_for): New function prototypes. (lra_assign): Change prototype. * lra.c (lra): Add code to deal with fails by splitting hard reg live ranges. From-SVN: r258415
2018-03-10i386: Fix a typo: Enforcment -> EnforcementH.J. Lu2-3/+8
PR target/84807 * config/i386/i386.opt: Replace Enforcment with Enforcement. From-SVN: r258414
2018-03-10trans.c (node_has_volatile_full_access): Consider only entities for objects.Eric Botcazou6-0/+53
* gcc-interface/trans.c (node_has_volatile_full_access) <N_Identifier>: Consider only entities for objects. From-SVN: r258412
2018-03-10[IEPM] [PR debug/84620] use constant form for DW_AT_GNU_entry_viewAlexandre Oliva3-7/+119
When outputting entry views in symbolic mode, we used to use a lbl_id, but that outputs the view as an addr, perhaps even in an indirect one, which is all excessive and undesirable for a small assembler-computed constant. Introduce a new value class for symbolic views, so that we can output the labels as constant data, using as narrow forms as possible, but wide enough for any symbolic views output in the compilation. We don't know exactly where the assembler will reset views, but we count the symbolic views since known reset points and use that as an upper bound for view numbers. Ideally, we'd use uleb128, but then the compiler would have to defer .debug_info offset computation to the assembler. I'm not going there for now, so a symbolic uleb128 assembler constant in an attribute is not something GCC can deal with ATM. for gcc/ChangeLog PR debug/84620 * dwarf2out.h (dw_val_class): Add dw_val_class_symview. (dw_val_node): Add val_symbolic_view. * dwarf2out.c (dw_line_info_table): Add symviews_since_reset. (symview_upper_bound): New. (new_line_info_table): Initialize symviews_since_reset. (dwarf2out_source_line): Count symviews_since_reset and set symview_upper_bound. (dw_val_equal_p): Handle symview. (add_AT_symview): New. (print_dw_val): Handle symview. (attr_checksum, attr_checksum_ordered): Likewise. (same_dw_val_p, size_of_die): Likewise. (value_format, output_die): Likewise. (add_high_low_attributes): Use add_AT_symview for entry_view. (dwarf2out_finish): Reset symview_upper_bound, clear zero_view_p. From-SVN: r258411
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