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2020-07-22c++: Shrink lambda-exprNathan Sidwell1-2/+2
I noticed the default capture mode and the discriminator both used ints. That seems excessive. This shrinks them to 8 bits and 16 bits respectively. I suppose the discriminator could use the remaining 24 bits of an int allocation unit, if we're worried about more that 64K lambdas per function. I know, users are strange :) On a 64 bit system this saves 64 bits, because we also had 32 bits of padding added. gcc/cp/ * cp-tree.h (struct tree_lambda_expr): Shrink default_capture_mode & discriminator.
2020-07-22preprocessor: add_path simplificationsNathan Sidwell1-3/+5
I noticed add_path was calling strlen more than once on the same string. Let's not do that. gcc/ * incpath.c (add_path): Avoid multiple strlen calls.
2020-07-22c++: mangling cleanupsNathan Sidwell1-49/+26
I noticed the mangler's handling of templates could be simplified. We know template_info is non-null, which is sufficiently boolean -- no need for an explicit bool return. also some of the internals of template_args_equal had crept into find_substitution. Let's not do that. gcc/cp/ * mangle.c (decl_is_template_id): Rename to ... (maybe_template_info): ... here. Return the template info, rather than use a pointer. Adjust all callers. (find_substitution): Use template_args_equal, rather than local check.
2020-07-22Limit pr95237-6.c to x86 targetsH.J. Lu1-2/+2
Since c-c++-common/pr95237-6.c is x86 specific, limit it to x86 targets. PR target/95237 * c-c++-common/pr95237-6.c: Only run for x86 targets.
2020-07-22expmed: Fix possible use of NULL_RTX return value from emit_store_flagJozef Lawrynowicz1-14/+21
MSP430 does not support have any store-flag instructions, so emit_store_flag can return NULL_RTX. Catch the NULL_RTX in expmed.c:expand_sdiv_pow2. gcc/ChangeLog: * expmed.c (expand_sdiv_pow2): Check return value from emit_store_flag is not NULL_RTX before use.
2020-07-22expr: Allow scalar_int_mode target mode when converting a constantJozef Lawrynowicz1-2/+2
is_int_mode does not allow MODE_PARTIAL_INT modes, so convert_modes was not allowing a constant value to be converted to a MODE_PARTIAL_INT for use as operand 2 in patterns such as ashlpsi3. The constant had to be copied into a register before it could be used, but now can be used directly as an operand without any copying. gcc/ChangeLog: * expr.c (convert_modes): Allow a constant integer to be converted to any scalar int mode.
2020-07-22critical-hint-*.{c,f90}: Move from gcc/testsuite to libgomp/testsuiteTobias Burnus4-242/+0
libgomp/ChangeLog: * testsuite/libgomp.c-c++-common/critical-hint-1.c: New; moved from gcc/testsuite/c-c++-common/gomp/. * testsuite/libgomp.c-c++-common/critical-hint-2.c: Likewise. * testsuite/libgomp.fortran/critical-hint-1.f90: New; moved from gcc/testsuite/gfortran.dg/gomp/. * testsuite/libgomp.fortran/critical-hint-2.f90: Likewise. gcc/testsuite/ChangeLog: * c-c++-common/gomp/critical-hint-1.c: Moved to libgomp/. * c-c++-common/gomp/critical-hint-2.c: Moved to libgomp/. * gfortran.dg/gomp/critical-hint-1.f90: Moved to libgomp/. * gfortran.dg/gomp/critical-hint-2.f90: Moved to libgomp/.
2020-07-22Generation of adjusted ldp/stp for vector typesPrzemyslaw Wirkus10-6/+151
Introduce simple peephole2 optimization which substitutes a sequence of four consecutive load or store (LDR, STR) instructions with two load or store pair (LDP, STP) instructions for 2 element supported vector modes (V2SI, V2SF, V2DI, and V2DF). Generated load / store pair instruction offset is adjusted accordingly. Bootstrapped and tested on aarch64-none-linux-gnu. Example: $ cat stp_vec_v2sf.c typedef float __attribute__((vector_size(8))) vec; void store_adjusted(vec *out, vec x, vec y) { out[400] = x; out[401] = y; out[402] = y; out[403] = x; } Example compiled with: $ ./aarch64-none-linux-gnu-gcc -S -O2 stp_vec_v2sf.c -dp Before the patch: store_adjusted: str d0, [x0, 3200] // 9 [c=4 l=4] *aarch64_simd_movv2si/2 str d1, [x0, 3208] // 11 [c=4 l=4] *aarch64_simd_movv2si/2 str d1, [x0, 3216] // 13 [c=4 l=4] *aarch64_simd_movv2si/2 str d0, [x0, 3224] // 15 [c=4 l=4] *aarch64_simd_movv2si/2 ret // 26 [c=0 l=4] *do_return After the patch: store_adjusted: add x1, x0, 3200 // 27 [c=4 l=4] *adddi3_aarch64/0 stp d0, d1, [x1] // 28 [c=0 l=4] vec_store_pairv2siv2si stp d1, d0, [x1, 16] // 29 [c=0 l=4] vec_store_pairv2siv2si ret // 22 [c=0 l=4] *do_return gcc/ChangeLog: * config/aarch64/aarch64-ldpstp.md: Add two peepholes for adjusted vector V2SI, V2SF, V2DI, V2DF load pair and store pair modes. * config/aarch64/aarch64-protos.h (aarch64_gen_adjusted_ldpstp): Change mode parameter to machine_mode. (aarch64_operands_adjust_ok_for_ldpstp): Change mode parameter to machine_mode. * config/aarch64/aarch64.c (aarch64_operands_adjust_ok_for_ldpstp): Change mode parameter to machine_mode. (aarch64_gen_adjusted_ldpstp): Change mode parameter to machine_mode. * config/aarch64/iterators.md (VP_2E): New iterator for 2 element vectors. gcc/testsuite/ChangeLog: * gcc.target/aarch64/ldp_vec_v2sf.c: New test. * gcc.target/aarch64/ldp_vec_v2si.c: New test. * gcc.target/aarch64/stp_vec_v2df.c: New test. * gcc.target/aarch64/stp_vec_v2di.c: New test. * gcc.target/aarch64/stp_vec_v2sf.c: New test. * gcc.target/aarch64/stp_vec_v2si.c: New test.
2020-07-22doc: fix a typo in languages.texiWei Wentao1-1/+1
gcc/ * doc/languages.texi: Fix “then”/“than” typo.
2020-07-22OpenMP: Fixes for omp critical + hintTobias Burnus12-43/+350
gcc/c-family/ChangeLog: * c-omp.c (c_finish_omp_critical): Check for no name but nonzero hint provided. gcc/c/ChangeLog: * c-parser.c (c_parser_omp_clause_hint): Require nonnegative hint clause. (c_parser_omp_critical): Permit hint(0) clause without named critical. (c_parser_omp_construct): Don't assert if error_mark_node is returned. gcc/cp/ChangeLog: * parser.c (cp_parser_omp_clause_hint): Require nonnegative hint. (cp_parser_omp_critical): Permit hint(0) clause without named critical. * pt.c (tsubst_expr): Re-check the latter for templates. gcc/fortran/ChangeLog: * openmp.c (gfc_match_omp_critical): Fix handling hints; permit hint clause without named critical. (resolve_omp_clauses): Require nonnegative constant integer for the hint clause. (gfc_resolve_omp_directive): Check for no name but nonzero value for hint clause. * parse.c (parse_omp_structured_block): Fix same-name check for critical. * trans-openmp.c (gfc_trans_omp_critical): Handle hint clause properly. libgomp/ChangeLog: * omp_lib.f90.in: Add omp_sync_hint_* and omp_sync_hint_kind. * omp_lib.h.in: Likewise. gcc/testsuite/ChangeLog: * g++.dg/gomp/critical-3.C: Add nameless critical with hint testcase. * c-c++-common/gomp/critical-hint-1.c: New test. * c-c++-common/gomp/critical-hint-2.c: New test. * gfortran.dg/gomp/critical-hint-1.f90: New test. * gfortran.dg/gomp/critical-hint-2.f90: New test.
2020-07-22gcc.dg/no_profile_instrument_function-attr-1.c: Adjust for NO_DOT_IN_LABELHans-Peter Nilsson1-1/+1
mmix-knuth-mmixware is a NO_DOT_IN_LABEL target, so it gets a "_" instead of the "." in the identifier of interest. Also tested and compared to the output for cris-elf which is "regular" regarding labels: there are no "false positive" identifiers there. The "." in a TCL bracket expression matches only a literal ".". Committed as obvious. gcc/testsuite: * gcc.dg/no_profile_instrument_function-attr-1.c: Adjust scanned regex for NO_DOT_IN_LABEL.
2020-07-22Daily bump.GCC Administrator6-1/+251
2020-07-21Add TARGET_LOWER_LOCAL_DECL_ALIGNMENT [PR95237]Sunil K Pandey16-3/+170
Default for this hook is NOP. For x86, in 32 bit mode, this hook sets alignment of long long on stack to 32 bits if preferred stack boundary is 32 bits. - This patch prevents lowering of alignment from following macros. LOCAL_ALIGNMENT STACK_SLOT_ALIGNMENT LOCAL_DECL_ALIGNMENT - This patch fixes gcc.target/i386/pr69454-2.c gcc.target/i386/stackalign/longlong-1.c - Regression test on x86-64, no new fail introduced. Tested on x86-64. gcc/c/ChangeLog: PR target/95237 * c-decl.c (finish_decl): Call target hook lower_local_decl_alignment to lower local decl alignment. gcc/ChangeLog: PR target/95237 * config/i386/i386-protos.h (ix86_local_alignment): Add another function parameter may_lower alignment. Default is false. * config/i386/i386.c (ix86_lower_local_decl_alignment): New function. (ix86_local_alignment): Amend ix86_local_alignment to accept another parameter may_lower. If may_lower is true, new align may be lower than incoming alignment. If may_lower is false, new align will be greater or equal to incoming alignment. (TARGET_LOWER_LOCAL_DECL_ALIGNMENT): Define. * doc/tm.texi: Regenerate. * doc/tm.texi.in (TARGET_LOWER_LOCAL_DECL_ALIGNMENT): New hook. * target.def (lower_local_decl_alignment): New hook. gcc/cp/ChangeLog: PR target/95237 * decl.c (cp_finish_decl): Call target hook lower_local_decl_alignment to lower local decl alignment. gcc/testsuite/ChangeLog: PR target/95237 * c-c++-common/pr95237-1.c: New test. * c-c++-common/pr95237-2.c: New test. * c-c++-common/pr95237-3.c: New test. * c-c++-common/pr95237-4.c: New test. * c-c++-common/pr95237-5.c: New test. * c-c++-common/pr95237-6.c: New test. * c-c++-common/pr95237-7.c: New test. * c-c++-common/pr95237-8.c: New test. * c-c++-common/pr95237-9.c: New test.
2020-07-21rs6000: Update test case count when compiling for power9Peter Bergner1-1/+1
2020-07-21 Peter Bergner <bergner@linux.ibm.com> gcc/testsuite/ PR target/92488 * gcc.target/powerpc/convert-fp-128.c (bl): Update POWER9 count.
2020-07-21c++: Fix scan forward over pragma [PR96257]Nathan Sidwell2-8/+27
It turns out that the paren scanning code is used for speculatively searching to see if we're looking at a compound_literal. So we shouldn't always purge pragma tokens. gcc/cp/ * parser.c (cp_lexer_consume_token): Drop PRAGMA_EOL assert. (cp_parser_skip_to_closing_parenthesis_1): Only pass start token to pragma skipper if recovering. (cp_parser_skip_to_pragma_eol): Only purge and change pragma state when recovering. gcc/testsuite/ * g++.dg/parse/pr96257.C: New.
2020-07-21PR fortran/89574 - ICE in conv_function_val, at fortran/trans-expr.c:3792Harald Anlauf2-1/+35
When checking for an external procedure from the same file, do not consider symbols from different modules. gcc/fortran/ PR fortran/89574 * trans-decl.c (gfc_get_extern_function_decl): Check whether a symbol belongs to a different module.
2020-07-21i386: Fix insn conditions of mfence patterns [PR95750]Uros Bizjak1-4/+2
2020-07-21 Uroš Bizjak <ubizjak@gmail.com> gcc/ChangeLog: PR target/95750 * config/i386/sync.md (mfence_sse2): Enable for TARGET_64BIT and TARGET_SSE2. (mfence_nosse): Always enable.
2020-07-21MSP430: Remove do_no_relax_short_jumpsJozef Lawrynowicz3-41/+4
This is an old cludge from from when the Binutils linker could not relax BR to JMP and vice-versa when shuffling "either" sections between upper and lower memory. This has been fixed since at least Binutils 2.30. gcc/ChangeLog: * config/msp430/msp430-protos.h (msp430_do_not_relax_short_jumps): Remove. * config/msp430/msp430.c (msp430_do_not_relax_short_jumps): Likewise. * config/msp430/msp430.md (cbranchhi4_real): Remove special case for msp430_do_not_relax_short_jumps.
2020-07-21MSP430: Define extendqipsi2Jozef Lawrynowicz1-0/+9
The SXT instruction extends the sign of the low byte of the operand through the entire PSImode register. SXTX.A can be used to sign extend the low byte of a memory operand through to the 19th bit. Bits 31:20 are cleared. gcc/ChangeLog: * config/msp430/msp430.md: New "extendqipsi2" define_insn.
2020-07-21MSP430: Define NO_FUNCTION_CSEJozef Lawrynowicz1-0/+5
Calling a constant function address costs the same number of clock cycles as calling an address stored in a register. However, in terms of instruction length, calling a constant address is more expensive. Set NO_FUNCTION_CSE to true, only when optimizing for speed. gcc/ChangeLog: * config/msp430/msp430.h (NO_FUNCTION_CSE): Set to true at -O2 and above.
2020-07-21Scale down long-running tree-prof.exp tests for non-FDO testing.Sandra Loosemore8-9/+51
2020-07-21 Sandra Loosemore <sandra@codesourcery.com> gcc/testsuite/ * lib/profopt.exp (auto-profopt-execute): Pass -DFOR_AUTOFDO_TESTING on command line for both compiles. * gcc.dg/tree-prof/cold_partition_label.c: Scale down for non-FDO testing. * gcc.dg/tree-prof/crossmodule-indir-call-topn-1.c: Likewise. * gcc.dg/tree-prof/crossmodule-indir-call-topn-2.c: Likewise. * gcc.dg/tree-prof/indir-call-prof-topn.c: Likewise. * gcc.dg/tree-prof/section-attr-1.c: Likewise. * gcc.dg/tree-prof/section-attr-2.c: Likewise. * gcc.dg/tree-prof/section-attr-3.c: Likewise.
2020-07-21testsuite: Add default_packed filtersDimitar Dimitrov2-2/+3
Fix test cases assumptions that target has alignment constraints. gcc/testsuite/ChangeLog: * gcc.dg/attr-copy-4.c: Unpacked may still have alignment of 1 on targets with default_packed. * gcc.dg/c11-align-9.c: Remove AVR target filter and replace with default_packed filter. Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
2020-07-21testsuite: Relax pattern to include "packed" targetsDimitar Dimitrov1-2/+2
The actual warning message depends on the default alignment of the target. With this update the test correctly passes on AVR and PRU targets. gcc/testsuite/ChangeLog: * gcc.dg/pr53037-1.c: Relax warning pattern. Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
2020-07-21testsute: Add expected warning for packed attributeDimitar Dimitrov10-4/+35
Targets which pack structures by default get warnings for packed structure attributes. This is expected, so add markers in the test cases. gcc/testsuite/ChangeLog: * c-c++-common/Waddress-of-packed-member-2.c: Add dg-warning for ignored attribute if target is default_packed. * c-c++-common/Wattributes.c: Ditto. * c-c++-common/attr-copy.c: Ditto. * c-c++-common/builtin-has-attribute-4.c: Ditto. * c-c++-common/pr51628-29.c: Ditto. * c-c++-common/pr51628-30.c: Ditto. * c-c++-common/pr51628-32.c: Ditto. * gcc.dg/Wattributes-6.c: Ditto. * gcc.dg/attr-copy-4.c: Ditto. * gcc.dg/attr-copy-8.c: Ditto. Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
2020-07-21testsuite: Filter unaligned pointer value warningDimitar Dimitrov30-117/+117
Targets which pack structures by default will not get warnings about unaligned access to structure members. gcc/testsuite/ChangeLog: * c-c++-common/Waddress-of-packed-member-1.c: Filter dg-warning for targets who pack by default. * c-c++-common/Waddress-of-packed-member-2.c: Ditto. * c-c++-common/pr51628-13.c: Ditto. * c-c++-common/pr51628-15.c: Ditto. * c-c++-common/pr51628-16.c: Ditto. * c-c++-common/pr51628-26.c: Ditto. * c-c++-common/pr51628-27.c: Ditto. * c-c++-common/pr51628-28.c: Ditto. * c-c++-common/pr51628-29.c: Ditto. * c-c++-common/pr51628-3.c: Ditto. * c-c++-common/pr51628-30.c: Ditto. * c-c++-common/pr51628-31.c: Ditto. * c-c++-common/pr51628-32.c: Ditto. * c-c++-common/pr51628-33.c: Ditto. * c-c++-common/pr51628-35.c: Ditto. * c-c++-common/pr51628-4.c: Ditto. * c-c++-common/pr51628-5.c: Ditto. * c-c++-common/pr51628-6.c: Ditto. * c-c++-common/pr51628-8.c: Ditto. * c-c++-common/pr51628-9.c: Ditto. * c-c++-common/pr88664-2.c: Ditto. * gcc.dg/pr51628-17.c: Ditto. * gcc.dg/pr51628-19.c: Ditto. * gcc.dg/pr51628-20.c: Ditto. * gcc.dg/pr51628-21.c: Ditto. * gcc.dg/pr51628-22.c: Ditto. * gcc.dg/pr51628-24.c: Ditto. * gcc.dg/pr51628-25.c: Ditto. * gcc.dg/pr51628-34.c: Ditto. * gcc.dg/pr88928.c: Ditto. Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
2020-07-21testsuite: Add signal checking for signal related testcase in analyzer.Kito Cheng8-0/+8
- Verifed on RISC-V and x86. gcc/testsuite/ChangeLog: * gcc.dg/analyzer/signal-1.c: Add dg-require-effective-target signal. * gcc.dg/analyzer/signal-2.c: Ditto. * gcc.dg/analyzer/signal-3.c: Ditto. * gcc.dg/analyzer/signal-4a.c: Ditto. * gcc.dg/analyzer/signal-4b.c: Ditto. * gcc.dg/analyzer/signal-5.c: Ditto. * gcc.dg/analyzer/signal-6.c: Ditto. * gcc.dg/analyzer/signal-exit.c: Ditto.
2020-07-20rs6000: Define movsf_from_si2 to extract high part SF element from ↵Xionghu Luo2-0/+48
DImode[PR89310] For extracting high part element from DImode register like: {%1:SF=unspec[r122:DI>>0x20#0] 86;clobber scratch;} split it before reload with "and mask" to avoid generating shift right 32 bit then shift left 32 bit. This pattern also exists in PR42475 and PR67741, etc. srdi 3,3,32 sldi 9,3,32 mtvsrd 1,9 xscvspdpn 1,1 => rldicr 3,3,0,31 mtvsrd 1,3 xscvspdpn 1,1 Bootstrap and regression tested pass on Power8-LE. gcc/ChangeLog: 2020-07-21 Xionghu Luo <luoxhu@linux.ibm.com> PR rtl-optimization/89310 * config/rs6000/rs6000.md (movsf_from_si2): New define_insn_and_split. gcc/testsuite/ChangeLog: 2020-07-21 Xionghu Luo <luoxhu@linux.ibm.com> PR rtl-optimization/89310 * gcc.target/powerpc/pr89310.c: New test.
2020-07-20rs6000/test: Add vector with length test casesKewen Lin49-0/+904
This patch is to add the test coverage for vector with length feature on rs6000. Tested on P9 LE, P7 BE and P9 BE (aix), the results looked fine. gcc/testsuite/ChangeLog: * gcc.target/powerpc/p9-vec-length-1.h: New test. * gcc.target/powerpc/p9-vec-length-2.h: New test. * gcc.target/powerpc/p9-vec-length-3.h: New test. * gcc.target/powerpc/p9-vec-length-4.h: New test. * gcc.target/powerpc/p9-vec-length-5.h: New test. * gcc.target/powerpc/p9-vec-length-6.h: New test. * gcc.target/powerpc/p9-vec-length-7.h: New test. * gcc.target/powerpc/p9-vec-length-8.h: New test. * gcc.target/powerpc/p9-vec-length-epil-1.c: New test. * gcc.target/powerpc/p9-vec-length-epil-2.c: New test. * gcc.target/powerpc/p9-vec-length-epil-3.c: New test. * gcc.target/powerpc/p9-vec-length-epil-4.c: New test. * gcc.target/powerpc/p9-vec-length-epil-5.c: New test. * gcc.target/powerpc/p9-vec-length-epil-6.c: New test. * gcc.target/powerpc/p9-vec-length-epil-7.c: New test. * gcc.target/powerpc/p9-vec-length-epil-8.c: New test. * gcc.target/powerpc/p9-vec-length-epil-run-1.c: New test. * gcc.target/powerpc/p9-vec-length-epil-run-2.c: New test. * gcc.target/powerpc/p9-vec-length-epil-run-3.c: New test. * gcc.target/powerpc/p9-vec-length-epil-run-4.c: New test. * gcc.target/powerpc/p9-vec-length-epil-run-5.c: New test. * gcc.target/powerpc/p9-vec-length-epil-run-6.c: New test. * gcc.target/powerpc/p9-vec-length-epil-run-7.c: New test. * gcc.target/powerpc/p9-vec-length-epil-run-8.c: New test. * gcc.target/powerpc/p9-vec-length-full-1.c: New test. * gcc.target/powerpc/p9-vec-length-full-2.c: New test. * gcc.target/powerpc/p9-vec-length-full-3.c: New test. * gcc.target/powerpc/p9-vec-length-full-4.c: New test. * gcc.target/powerpc/p9-vec-length-full-5.c: New test. * gcc.target/powerpc/p9-vec-length-full-6.c: New test. * gcc.target/powerpc/p9-vec-length-full-7.c: New test. * gcc.target/powerpc/p9-vec-length-full-8.c: New test. * gcc.target/powerpc/p9-vec-length-full-run-1.c: New test. * gcc.target/powerpc/p9-vec-length-full-run-2.c: New test. * gcc.target/powerpc/p9-vec-length-full-run-3.c: New test. * gcc.target/powerpc/p9-vec-length-full-run-4.c: New test. * gcc.target/powerpc/p9-vec-length-full-run-5.c: New test. * gcc.target/powerpc/p9-vec-length-full-run-6.c: New test. * gcc.target/powerpc/p9-vec-length-full-run-7.c: New test. * gcc.target/powerpc/p9-vec-length-full-run-8.c: New test. * gcc.target/powerpc/p9-vec-length-run-1.h: New test. * gcc.target/powerpc/p9-vec-length-run-2.h: New test. * gcc.target/powerpc/p9-vec-length-run-3.h: New test. * gcc.target/powerpc/p9-vec-length-run-4.h: New test. * gcc.target/powerpc/p9-vec-length-run-5.h: New test. * gcc.target/powerpc/p9-vec-length-run-6.h: New test. * gcc.target/powerpc/p9-vec-length-run-7.h: New test. * gcc.target/powerpc/p9-vec-length-run-8.h: New test. * gcc.target/powerpc/p9-vec-length.h: New test.
2020-07-21gcc.dg/independent-cloneids-1.c: Skip for mmix.Hans-Peter Nilsson1-0/+1
Regular ELF label definitions for this test-case, matched by the regexps, e.g.: /* { dg-final { scan-assembler-times {(?n)^_*bar[.$_]constprop[.$_]0:} 1 } } */ typically look like this: bar_constprop.0: For MMIX, they look like this: bar_constprop::0 IS @ I think it's better to just skip the test for MMIX than further uglifying the matching regexps, since the test is IIUC general enough that nothing in the target port can reasonably make a difference: it passes for all targets or fail for all targets. gcc/testsuite: * gcc.dg/independent-cloneids-1.c: Skip for mmix. flag_stack_usage_info.
2020-07-21gcc.dg/cdce3.c: Update matched line-number.Hans-Peter Nilsson1-1/+1
I missed updating the line-number when adding that dg-skip-if. Committed as obvious. * gcc.dg/cdce3.c: Update matched line-number.
2020-07-21Daily bump.GCC Administrator6-1/+228
2020-07-21mmix: support -fstack-usageHans-Peter Nilsson1-0/+16
MMIX has two stacks; the regular one using register $254 as a convention and the register-stack, pushed and popped by call instructions (usually). The decision to only report the stack usage of the regular stack (and not of the register stack) may be updated, perhaps the sum is better. This initial decision is helped a little bit by the order of passes: the size of the register-stack is calculated only later (in the machine-dependent reorg pass), long after finalization of the stack-usage info (in the prologue/epilogue pass). No regressions for mmix-knuth-mmixware (but a whole lot more PASSes), committed. gcc: * config/mmix/mmix.c (mmix_expand_prologue): Calculate the total allocated size and set current_function_static_stack_size, if flag_stack_usage_info.
2020-07-20c++: Pseudo-destructor ends object lifetime.Jason Merrill3-9/+31
P0593R6 is mostly about a new object model whereby malloc and the like are treated as implicitly starting the lifetime of whatever trivial types are necessary to give the program well-defined semantics; that seems only relevant to TBAA, and is not implemented here. The paper also specifies that a pseudo-destructor call (a destructor call for a non-class type) ends the lifetime of the object like a destructor call for an object of class type, even though it doesn't call a destructor; this patch implements that change. The paper was voted as a DR, so I'm applying this change to all standard levels. Like class end-of-life clobbers, it is controlled by -flifetime-dse. gcc/cp/ChangeLog: * pt.c (type_dependent_expression_p): A pseudo-dtor can be dependent. * semantics.c (finish_call_expr): Use build_trivial_dtor_call for pseudo-destructor. (finish_pseudo_destructor_expr): Leave type NULL for dependent arg. gcc/testsuite/ChangeLog: * g++.dg/opt/flifetime-dse7.C: New test.
2020-07-20c++: Allow subobject references in C++20.Jason Merrill10-14/+126
The last new thing allowed by P1907R1: subobject addresses as template arguments. The ABI group has discussed mangling for this; there has been some talk of a compressed subobject mangling, but it hasn't been finalized, so for now I'm using normal expression mangling. In order for two array subobject references to compare as equal template arguments, the offsets need to have the same type, so I convert them to always be the same type, currently ptrdiff_t. Base class conversions are represented as a cast to reference type, only if necessary to resolve an ambiguity. This patch also updates the value of __cpp_nontype_template_args, since the paper is fully implemented. gcc/cp/ChangeLog: * mangle.c (write_base_ref): New. (write_expression): Use it for base field COMPONENT_REFs. * pt.c (invalid_tparm_referent_p): Canonicalize the type of array offsets. Allow subobjects. gcc/c-family/ChangeLog: * c-cppbuiltin.c (c_cpp_builtins): Update __cpp_nontype_template_args for C++20. gcc/testsuite/ChangeLog: * g++.dg/cpp1z/nontype2.C: No error in C++20. * g++.dg/template/nontype25.C: No error in C++20. * g++.dg/template/nontype8.C: No error in C++20. * g++.dg/cpp2a/nontype-subob1.C: New test. * g++.dg/cpp2a/nontype-subob2.C: New test. * g++.dg/cpp1z/nontype3.C: Now C++17-only. * g++.dg/cpp2a/feat-cxx2a.C: Adjust expected value.
2020-07-20c++: Aggregate CTAD and string constants.Jason Merrill2-2/+21
In CWG discussion, it was suggested that deduction from a string literal should be to reference-to-const, so that we deduce 'char' rather than 'const char' for T. gcc/cp/ChangeLog: * pt.c (collect_ctor_idx_types): Add 'const' when deducing from a string constant. gcc/testsuite/ChangeLog: * g++.dg/cpp2a/class-deduction-aggr7.C: New test.
2020-07-20sparc/sparc64: use crtendS.o for default-pie executables [PR96190]Sergei Trofimovich2-16/+4
In --enable-default-pie mode compiler should switch from using crtend.o to crtendS.o. On sparc it is especially important because crtend.o contains PIC-unfriendly code. We use GNU_USER_TARGET_ENDFILE_SPEC as a baseline spec to get crtendS.o instead of crtend.o in !no-pie mode. gcc: 2020-07-14 Sergei Trofimovich <siarheit@google.com> PR target/96190 * config/sparc/linux.h (ENDFILE_SPEC): Use GNU_USER_TARGET_ENDFILE_SPEC to get crtendS.o for !no-pie mode. * config/sparc/linux64.h (ENDFILE_SPEC): Ditto.
2020-07-20vect: Fix an ICE in vectorizable_simd_clone_cally005201632-3/+39
In vectorizable_simd_clone_call, type compatibility is handled based on the number of elements and the type compatibility of elements, which is not enough. This patch add VIEW_CONVERT_EXPRs if the arguments types and return type of simd clone function are distinct with the vectype of stmt. 2020-07-20 Yang Yang <yangyang305@huawei.com> gcc/ChangeLog: * tree-vect-stmts.c (vectorizable_simd_clone_call): Add VIEW_CONVERT_EXPRs if the arguments types and return type of simd clone function are distinct with the vectype of stmt. gcc/testsuite/ChangeLog: * gcc.target/aarch64/sve/pr96195.c: New test.
2020-07-20i386: Use lock prefixed insn instead of MFENCE [PR95750]Uros Bizjak4-11/+36
Currently, __atomic_thread_fence(seq_cst) on x86 and x86-64 generates mfence instruction. A dummy atomic instruction (a lock-prefixed instruction or xchg with a memory operand) would provide the same sequential consistency guarantees while being more efficient on most current CPUs. The mfence instruction additionally orders non-temporal stores, which is not relevant for atomic operations and are not ordered by seq_cst atomic operations anyway. 2020-07-20 Uroš Bizjak <ubizjak@gmail.com> gcc/ChangeLog: PR target/95750 * config/i386/i386.h (TARGET_AVOID_MFENCE): Rename from TARGET_USE_XCHG_FOR_ATOMIC_STORE. * config/i386/sync.md (mfence_sse2): Disable for TARGET_AVOID_MFENCE. (mfence_nosse): Enable also for TARGET_AVOID_MFENCE. Emit stack referred memory in word_mode. (mem_thread_fence): Do not generate mfence_sse2 pattern when TARGET_AVOID_MFENCE is true. (atomic_store<mode>): Update for rename. * config/i386/x86-tune.def (X86_TUNE_AVOID_MFENCE): Rename from X86_TUNE_USE_XCHG_FOR_ATOMIC_STORE. gcc/testsuite/ChangeLog: PR target/95750 * gcc.target/i386/pr95750.c: New test.
2020-07-20Correct handling of constant representations containing embedded nuls.Martin Sebor8-110/+345
Resolves: PR middle-end/95189 - memcmp being wrongly stripped like strcm PR middle-end/95886 - suboptimal memcpy with embedded zero bytes gcc/ChangeLog: PR middle-end/95189 PR middle-end/95886 * builtins.c (inline_expand_builtin_string_cmp): Rename... (inline_expand_builtin_bytecmp): ...to this. (builtin_memcpy_read_str): Don't expect data to be nul-terminated. (expand_builtin_memory_copy_args): Handle object representations with embedded nul bytes. (expand_builtin_memcmp): Same. (expand_builtin_strcmp): Adjust call to naming change. (expand_builtin_strncmp): Same. * expr.c (string_constant): Create empty strings with nonzero size. * fold-const.c (c_getstr): Rename locals and update comments. * tree.c (build_string): Accept null pointer argument. (build_string_literal): Same. * tree.h (build_string): Provide a default. (build_string_literal): Same. gcc/testsuite/ChangeLog: PR middle-end/95189 PR middle-end/95886 * gcc.dg/memcmp-pr95189.c: New test. * gcc.dg/strncmp-3.c: New test. * gcc.target/i386/memcpy-pr95886.c: New test.
2020-07-20Regenerate .pot files.Joseph Myers1-8956/+9519
gcc/po/ * gcc.pot: Regenerate. libcpp/po/ * cpplib.pot: Regenerate.
2020-07-20Remove stray text from option description (PR c/96249).Martin Sebor1-1/+0
gcc/c-family/ChangeLog: PR c/96249 * c.opt: Remove stray text.
2020-07-20jit: Fix truncation of testsuite output [PR69435]Alex Coplan1-10/+10
This fixes a bug in jit.exp which causes the DejaGnu output of the libgccjit testsuite to be nondeterministically truncated. This bug was copied from DejaGnu's own implementation of the host_execute function. See the upstream bug report [0] where the maintainers point out that the regex patterns in host_execute should (but don't currently) explicitly match newlines to avoid relying on DejaGnu not reading more than one line of the output (which is not guaranteed). This should make it easier to test jit patches in the future, since it makes it possible to reliably compare the output of two jit.sum files (as with the other tests in GCC). [0] : https://debbugs.gnu.org/cgi/bugreport.cgi?bug=42399 gcc/testsuite/ PR jit/69435 * jit.dg/jit.exp (fixed_host_execute): Fix regex patterns to always explicitly match newlines.
2020-07-20remove write-only array in rev_post_order_and_mark_dfs_back_semeRichard Biener1-8/+5
This removes a write-only array in rev_post_order_and_mark_dfs_back_seme. 2020-07-20 Richard Biener <rguenther@suse.de> * cfganal.c (rev_post_order_and_mark_dfs_back_seme): Remove write-only post array.
2020-07-20gimple-fold: Handle bitfields in fold_const_aggregate_ref_1 [PR93121]Jakub Jelinek2-2/+80
When working on __builtin_bit_cast that needs to handle bitfields too, I've made the following change to handle at least some bitfields in fold_const_aggregate_ref_1 (those that have integral representative). It already handles some, but only those that start and end at byte boundaries. 2020-07-20 Jakub Jelinek <jakub@redhat.com> PR libstdc++/93121 * gimple-fold.c (fold_const_aggregate_ref_1): For COMPONENT_REF of a bitfield not aligned on byte boundaries try to fold_ctor_reference DECL_BIT_FIELD_REPRESENTATIVE if any and adjust it depending on endianity. * gcc.dg/tree-ssa/pr93121-2.c: New test.
2020-07-20fold-const: Handle bitfields in native_encode_initializer [PR93121]Jakub Jelinek2-3/+167
When working on __builtin_bit_cast that needs to handle bitfields too, I've made the following change to handle at least some bitfields in native_encode_initializer (those that have integral representative). 2020-07-20 Jakub Jelinek <jakub@redhat.com> PR libstdc++/93121 * fold-const.c (native_encode_initializer): Handle bit-fields. * gcc.dg/tree-ssa/pr93121-1.c: New test.
2020-07-20gcc.dg/const-uniq-1.c: Adjust scanned pattern for mmix.Hans-Peter Nilsson1-1/+1
Apparently local labels end up in the gimple dumps. For mmix, local labels that for other targets look like ".LC0" or "LC.0" instead look like "LC:0". Committed as obvious. gcc/testsuite: * gcc.dg/const-uniq-1.c: Adjust scanned pattern for mmix.
2020-07-20gcc.dg/cdce3.c: Skip for mmix.Hans-Peter Nilsson1-0/+1
The test is gated on effective-target hard_float but what it really requires is a sqrtf insn (SFmode, not DFmode). (It indeed passes for mmix-knuth-mmixware if the sqrtf is changed to sqrt and float to double; there is a DFmode sqrt insn.) Committed. gcc/testsuite: * gcc.dg/cdce3.c: Skip for mmix.
2020-07-19vect: Support length-based partial vectors approachKewen Lin9-95/+552
Power9 supports vector load/store instruction lxvl/stxvl which allow us to operate partial vectors with one specific length. This patch extends some of current mask-based partial vectors support code for length-based approach, also adds some length specific support code. So far it assumes that we can only have one partial vectors approach at the same time, it will disable to use partial vectors if both approaches co-exist. Like the description of optab len_load/len_store, the length-based approach can have two flavors, one is length in bytes, the other is length in lanes. This patch is mainly implemented and tested for length in bytes, but as Richard S. suggested, most of code has considered both flavors. This also introduces one parameter vect-partial-vector-usage allow users to control when the loop vectorizer considers using partial vectors as an alternative to falling back to scalar code. gcc/ChangeLog: * config/rs6000/rs6000.c (rs6000_option_override_internal): Set param_vect_partial_vector_usage to 0 explicitly. * doc/invoke.texi (vect-partial-vector-usage): Document new option. * optabs-query.c (get_len_load_store_mode): New function. * optabs-query.h (get_len_load_store_mode): New declare. * params.opt (vect-partial-vector-usage): New. * tree-vect-loop-manip.c (vect_set_loop_controls_directly): Add the handlings for vectorization using length-based partial vectors, call vect_gen_len for length generation, and rename some variables with items instead of scalars. (vect_set_loop_condition_partial_vectors): Add the handlings for vectorization using length-based partial vectors. (vect_do_peeling): Allow remaining eiters less than epilogue vf for LOOP_VINFO_USING_PARTIAL_VECTORS_P. * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Init epil_using_partial_vectors_p. (_loop_vec_info::~_loop_vec_info): Call release_vec_loop_controls for lengths destruction. (vect_verify_loop_lens): New function. (vect_analyze_loop): Add handlings for epilogue of loop when it's marked to use vectorization using partial vectors. (vect_analyze_loop_2): Add the check to allow only one vectorization approach using partial vectorization at the same time. Check param vect-partial-vector-usage for partial vectors decision. Mark LOOP_VINFO_EPIL_USING_PARTIAL_VECTORS_P if the epilogue is considerable to use partial vectors. Call release_vec_loop_controls for lengths destruction. (vect_estimate_min_profitable_iters): Adjust for loop vectorization using length-based partial vectors. (vect_record_loop_mask): Init factor to 1 for vectorization using mask-based partial vectors. (vect_record_loop_len): New function. (vect_get_loop_len): Likewise. * tree-vect-stmts.c (check_load_store_for_partial_vectors): Add checks for vectorization using length-based partial vectors. Factor some code to lambda function get_valid_nvectors. (vectorizable_store): Add handlings when using length-based partial vectors. (vectorizable_load): Likewise. (vect_gen_len): New function. * tree-vectorizer.h (struct rgroup_controls): Add field factor mainly for length-based partial vectors. (vec_loop_lens): New typedef. (_loop_vec_info): Add lens and epil_using_partial_vectors_p. (LOOP_VINFO_EPIL_USING_PARTIAL_VECTORS_P): New macro. (LOOP_VINFO_LENS): Likewise. (LOOP_VINFO_FULLY_WITH_LENGTH_P): Likewise. (vect_record_loop_len): New declare. (vect_get_loop_len): Likewise. (vect_gen_len): Likewise.
2020-07-20gcc.dg/pr87485.c: Require schedulingHans-Peter Nilsson1-0/+1
Committed as obvious, fixing one failure for mmix-knuth-mmixware. gcc/testsuite: * gcc.dg/pr87485.c: Require scheduling.
2020-07-20mmix: When debug-dump, revert to "standard" pseudos for emitting integersHans-Peter Nilsson1-4/+31
The sole purpose of not providing pseudos and forcing use of TARGET_ASM_INTEGER is to arrange for assembly output that people can, instead of using gas, usefullt feed to mmixal (Knuth's assembler). It uses pseudos with slightly different semantics (BYTE, WYDE, TETRA, OCTA). Nice when it works, but that only happens for limited use-cases and debug-information is excluded. The dwarf2out.c shortcuts, looking up the pseudo-strings and doing the output on its own, has the result that in absence of such integer-emitting pseudos, the target TARGET_ASM_INTEGER hook is called, which by definition outputs a newline, and then the dwarf2out.c code redundantly adds another. That uglifies output and breaks the expectations of the dwarf2 parts of the test-suite. The wart by which an extra newline is emitted is ripe for a cleanup, and I started out thinking I'd add a default argument for emitting a newline to the assemble_integer family of functions, but then reconsidered. I also can't bring myself to use different pseudos with/without -g so instead I check for options for the more detailed dumps, as used by the test-suite to get those DW_* strings in detailed assembly output. This eliminates all FAILs in the dwarf2-specific parts of the gcc test-suite for mmix-knuth-mmixware, with no regressions. Committed. gcc: * config/mmix/mmix.c (mmix_option_override): Reinstate default integer-emitting targetm.asm_out pseudos when dumping detailed assembly-code. (mmix_assemble_integer): Update comment.
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