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2016-10-11ctrl_c.c: Do not use macro SA_RESTART for DJGPP.Andris Pavenis7-7/+58
2016-10-11 Andris Pavenis <andris.pavenis@iki.fi> * ctrl_c.c: Do not use macro SA_RESTART for DJGPP. * gsocket.h: Do not support sockets for DJGPP. * init.c (__gnat_install_handler): Implememt for DJGPP * sysdep.c: Include <io.h> for DJGPP (_setmode): Define to setmode for DJGPP (__gnat_set_mode): Add implementation for DJGPP (__gnat_localtime_tzoff): Use localtime_r for DJGPP * terminals.c: Add DJGPP to list of unsupported platforms. * env.c (__gnat_clearenv): use _gnat_unsetenv on all entries for DJGPP From-SVN: r240997
2016-10-11alpha-passes.def: New file.Uros Bizjak6-22/+71
* config/alpha/alpha-passes.def: New file. * config/alpha/t-alpha: New file. * config/alpha/alpha-protos.h (gcc::context, rtl_opt_pass): Declare. (make_pass_handle_trap_shadows): New prototype. (make_pass_align_insns): Ditto. * config/alpha/alpha.c (alpha_option_override): Don't register passes here. * config.gcc (alpha*-*-*) Add alpha/t-alpha to tmake_file. From-SVN: r240996
2016-10-11re PR target/77924 (-mfloat128-type change broke AIX)Michael Meissner2-4/+11
2016-10-11 Michael Meissner <meissner@linux.vnet.ibm.com> PR target/77924 * config/rs6000/rs6000.c (rs6000_init_builtins): Only create the distinct __ibm128 IBM extended double type if long doubles are 128-bits and the default format for long double is IEEE 128-bit. From-SVN: r240994
2016-10-11configure: redirect -fsplit-stack compilation to dev/nullIan Lance Taylor1-1/+1
Avoid an error message in the middle of the configure output. Patch by Eric Botcazou. Reviewed-on: https://go-review.googlesource.com/30813 From-SVN: r240993
2016-10-11dwarf2out.c (DEBUG_STR_OFFSETS_SECTION): Remove conditional.Richard Biener2-10/+61
2016-10-11 Richard Biener <rguenther@suse.de> * dwarf2out.c (DEBUG_STR_OFFSETS_SECTION): Remove conditional. (init_sections_and_labels): Use DEBUG_DWO_STR_OFFSETS_SECTION. (verify_die): New function. (dwarf2out_finish): Call it. (output_line_info): Handle case of -gsplit-dwarf without DWARF2_ASM_LINE_DEBUG_INFO. From-SVN: r240992
2016-10-11re PR debug/77931 (PASS->FAIL: gdb.cp/namespace.exp: print ina)Richard Biener2-7/+16
2016-10-11 Richard Biener <rguenther@suse.de> PR debug/77931 * gimple-low.c (lower_gimple_bind): Handle arbitrary common sub-chains of BLOCK_VARS and gimple_bind_vars. From-SVN: r240991
2016-10-11Fix integer load reservation for -march=znver1 Venkataramanan Kumar2-4/+8
2016-10-11 Venkataramanan Kumar <Venkataramanan.kumar@amd.com> * config/i386/znver1.md : Fix imov/imovx load type reservations. From-SVN: r240990
2016-10-11New flag -fdec-math for COTAN and degree trig intrinsics.Fritz Reese13-5/+1463
2016-10-11 Fritz Reese <fritzoreese@gmail.com> New flag -fdec-math for COTAN and degree trig intrinsics. gcc/fortran/ * lang.opt: New flag -fdec-math. * options.c (set_dec_flags): Enable with -fdec. * invoke.texi, gfortran.texi, intrinsic.texi: Update documentation. * intrinsics.c (add_functions, do_simplify): New intrinsics with -fdec-math. * gfortran.h (gfc_isym_id): New isym GFC_ISYM_COTAN. * gfortran.h (gfc_resolve_atan2d, gfc_resolve_cotan, gfc_resolve_trigd, gfc_resolve_atrigd): New prototypes. * iresolve.c (resolve_trig_call, get_degrees, get_radians, is_trig_resolved, gfc_resolve_cotan, gfc_resolve_trigd, gfc_resolve_atrigd, gfc_resolve_atan2d): New functions. * intrinsics.h (gfc_simplify_atan2d, gfc_simplify_atrigd, gfc_simplify_cotan, gfc_simplify_trigd): New prototypes. * simplify.c (simplify_trig_call, degrees_f, radians_f, gfc_simplify_cotan, gfc_simplify_trigd, gfc_simplify_atrigd, gfc_simplify_atan2d): New functions. gcc/testsuite/gfortran.dg/ * dec_math.f90: New testsuite. From-SVN: r240989
2016-10-11Minor tweaksEric Botcazou1-5/+5
From-SVN: r240988
2016-10-11Fix gcc.dg/tree-ssa/pr59597.c failure for avrSenthil Kumar Selvaraj2-1/+8
Declare loop index variable j as a 32 bit int instead of assuming ints are 32 bits. The smaller int size on the avr makes prior passes optimize away the loop exit check (j < 10000000), as the constant is outside the range of a 16 bit int. gcc/testsuite/ChangeLog 2016-10-11 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com> * gcc.dg/tree-ssa/pr59597.c: Typedef __INT32_TYPE__ to i32. (main): Declare j as i32 instead of int. From-SVN: r240986
2016-10-11exp_dbug.adb (Debug_Renaming_Declaration): Process underlying types.Pierre-Marie de Rodat6-7/+98
* exp_dbug.adb (Debug_Renaming_Declaration): Process underlying types. Emit GNAT encodings for object renamings involving record components whose normalized bit offset is not null. * uintp.h (UI_No_Uint): Declare. * gcc-interface/gigi.h (can_materialize_object_renaming_p): New. * gcc-interface/utils.c (can_materialize_object_renaming_p): New function. * gcc-interface/trans.c (gnat_to_gnu) <N_Object_Renaming_Declaration>: In code generation mode, materialize all renamings as long as they need debug info and we are not optimizing. From-SVN: r240985
2016-10-11PR77710: fix triplet in builtin-sprintf-warn-4.cThomas Preud'homme2-4/+10
2016-10-11 Thomas Preud'homme <thomas.preudhomme@arm.com> gcc/testsuite/ PR testsuite/PR77710 * gcc.dg/tree-ssa/builtin-sprintf-warn-4.c: Use *-*-* as catch-all target triplet instead of *-*-*-*. From-SVN: r240979
2016-10-11utils2.c (build_binary_op): Add a NO_FOLD argument.Pierre-Marie de Rodat4-21/+47
* gcc-interface/utils2.c (build_binary_op): Add a NO_FOLD argument. Disable folding when true. * gcc-interface/gigi.h (choices_to_gnu): Remove declaration. (build_binary_op): Update signature and comment. * gcc-interface/decl.c (choices_to_gnu): Make static. Disable folding for all calls to build_binary_op. From-SVN: r240978
2016-10-11fe.h (Constant_Value): Declare.Tristan Gingold3-1/+18
* fe.h (Constant_Value): Declare. * gcc-interface/decl.c (compile_time_known_address_p): Also consider references to constants. From-SVN: r240977
2016-10-11trans.c (gnat_to_gnu): Adjust comment.Eric Botcazou2-6/+14
* gcc-interface/trans.c (gnat_to_gnu) <N_Op_Add>: Adjust comment. <N_Op_Minus>: Add comment and missing guard. * gcc-interface/trans.c (build_binary_op_trapv): Use an explicit test. From-SVN: r240976
2016-10-11utils.c (type_unsigned_for_rm): New predicate.Eric Botcazou6-24/+189
* gcc-interface/utils.c (type_unsigned_for_rm): New predicate. (make_type_from_size): Use it. (unchecked_convert): Likewise. Do not skip the extension step if the source type is not integral. From-SVN: r240975
2016-10-11c-common.c (warning_candidate_p): Change the return type to bool and return ↵Marek Polacek2-12/+19
true/false instead of 1/0. * c-common.c (warning_candidate_p): Change the return type to bool and return true/false instead of 1/0. (vector_mode_valid_p): Likewise. From-SVN: r240974
2016-10-11system-linux-ppc64.ads: Delete.Eric Botcazou4-190/+26
* system-linux-ppc64.ads: Delete. * system-linux-ppc.ads: Make 32-bit/64-bit neutral. * gcc-interface/Makefile.in (PowerPC/Linux): Simplify. Co-Authored-By: Tristan Gingold <gingold@adacore.com> From-SVN: r240973
2016-10-11Add missing fileEric Botcazou1-0/+23
From-SVN: r240972
2016-10-11sparc.opt (msubxc): New option.Eric Botcazou24-868/+1530
* config/sparc/sparc.opt (msubxc): New option. * doc/invoke.texi (SPARC options): Document it and tidy up. * doc/tm.texi.in (Condition Codes): Adjust SPARC example. * doc/tm.texi: Regenerate. * config/sparc/sparc-modes.def (CC_NOOV): Rename into... (CCNZ): ...this. (CCX_NOOV): Rename into... (CCXNZ): ...this. (CCC): New. (CCXC): Likewise. * config/sparc/predicates.m (fcc_register_operand): Simplify. (fcc0_register_operand): Likewise. (icc_register_operand): New. (icc_or_fcc_register_operand): Simplify. (nz_comparison_operator): New. (c_comparison_operator): Likewise. (noov_compare_operator): Rename into... (icc_comparison_operator): ...this. Use above predicates. (noov_compare64_operator): Rename into... (v9_comparison_operator): ...this and tidy up. (fcc_comparison_operator): New. (icc_or_fcc_comparison_operator): Likewise. (v9_register_compare_operator): Rename info... (v9_register_comparison_operator): ...this. * config/sparc/sparc.c (TARGET_FIXED_CONDITION_CODE_REGS): Define. (sparc_option_override): Remove redundant VIS masks and add MASK_SUBXC for Niagara-7. (sparc_fixed_condition_code_regs): New function. (select_cc_mode): Remove ATTRIBUTE_UNUSED. Adjust for CCNZ/CCXNZ renaming and add support for CCC/CCXC. (output_cbranch): Likewise. (sparc_print_operand): Likewise. (gen_v9_scc): Remove obsolete assertion. (emit_scc_insn): Emit RTL directly for EQ and NE. Add direct support for EQ in DImode if TARGET_SUBXC. Remove test on TARGET_VIS3 for GEU. (output_cbcond): Remove bogus handling of CC modes. (sparc_register_move_cost): Return 100 for NO_REGS. * config/sparc/sparc.md (W): New mode iterator. (length): Adjust for noov_compare64_operator renaming. (cmpsi_sne): New instruction. (cmpdi_sne): Likewise. (seqdi_special): Delete. (seqdi_special): Likewise. (snesi<P:mode>_special): Likewise. (snedi_special): Likewise. (snedi_special_vis3): Likewise. (snesi patterns): Use W iterator. (snedi patterns): Likewise. Add TARGET_SUBXC patterns. (sltu patterns): Likewise. (sgeu patterns): Likewise. (scc splitter): Do not split GEU in DImode if TARGET_SUBXC. (normal_branch): Use icc_comparison_operator predicate. (inverted_branch): Likewise. (cbcond_sp32): Use comparison_operator predicate. (cbcond_sp64): Likewise. (normal_int_branch_sp64): Adjust for renaming (inverted_int_branch_sp64): Likewise. (mov<I:mode>_cc_reg_sp64): Likewise. (movsf_cc_reg_sp6): Likewise. (movdf_cc_reg_sp64): Likewise. (movtf_cc_reg_hq_sp64): Likewise. (movtf_cc_reg_sp64): Likewise. (mov<I:mode>_cc_v9): Use icc_or_fcc_comparison_operator predicate. (movsf_cc_v9): Likewise. (movdf_cc_v9): Likewise. (movtf_cc_hq_v9): Likewise. (movtf_cc_v9): Likewise. (adddi3): Call gen_adddi3_sp32. (adddi3_insn_sp32): Rename to... (adddi3_sp32): ...this. Accept only register_operand as operand #1 and use CCCmode for the carry. (addx_extend_sp32): Use CCCmode for the carry. (addx_extend_sp64): Delete. (adddi3_extend_sp32): Use CCCmode for the carry. (cmp_plus patterns): Use CCNZ/CCXNZ mode and add C variants. (subdi3): Call gen_subdi3_sp32. (subdi3_insn_sp32): Rename to... (subdi3_sp32): ...this and use CCmode for the carry. (subx_extend_sp32): Use CCCmode for the carry. (subx_extend_sp64): Delete. (subdi3_extend_sp32): Use CCmode for the carry. (cmp_minus patterns): Use CCNZ/CCXNZ mode and add C variants. (negdi3): Call gen_negdi3_sp32. (negdi3_sp32): Use CCCmode for the carry. (cmp_neg patterns): Use CCNZ/CCXNZ mode and add C variants. (cmp_nz_ashift_1): Use CCNZ mode. (cmp_nz_set_ashift_1): Likewise. (ctrapsi4): Use comparison_operator predicate. (ctrapdi4): Likewise. (trapsi_insn): Use icc_comparison_operator predicate. (trapdi_insn): Likewise. (edge8 patterns): Use CCNZmode. (edge16 patterns): Likewise. (edge32 patterns): Likewise. From-SVN: r240971
2016-10-11visium-modes.def (CC_NOOV): Rename into...Eric Botcazou5-64/+152
* config/visium/visium-modes.def (CC_NOOV): Rename into... (CCNZ): ...this. (CC_BTST): Rename into... (CCC): ...this. * config/visium/predicates.md (real_add_operand): New. (visium_btst_operator): Rename into... (visium_equality_comparison_operator): ...this. (visium_noov_operator): Rename into... (visium_nz_comparison_operator): ...this. (visium_c_comparison_operator): New. (visium_branch_operator): Adjust and deal with all CC modes. * config/visium/visium.c (visium_adjust_cost): Adjust. (visium_split_double_add): Use the *_set_carry patterns. (visium_select_cc_mode): Add support for CCC mode and adjust. (output_cbranch): Adjust and use the carry-based operators for floating-point comparisons. * config/visium/visium.md (flags_subst_arith): Adjust. (addsi3_insn_set_carry): New instruction. (subsi3_insn_set_carry): Likewise. (negsi2_insn_set_carry): Likewise. (btst): Adjust. (cmp<mode>_sne): Likewise. (cbranch<mode>4): Use ordered_comparison_operator. (cbranch<mode>4_insn): Likewise. (cbranchsi4_btst_insn): Adjust. From-SVN: r240969
2016-10-11Remove RECORD_TYPE special-casing in std_canonical_va_list_typeTom de Vries2-4/+8
2016-10-11 Tom de Vries <tom@codesourcery.com> PR middle-end/77558 * builtins.c (std_canonical_va_list_type): Remove RECORD_TYPE special-casing. From-SVN: r240968
2016-10-11tree.h (build_complex_type): Add second parameter with default.Eric Botcazou3-9/+22
* tree.h (build_complex_type): Add second parameter with default. * tree.c (build_complex_type): Add NAMED second parameter and adjust recursive call. Create a TYPE_DECL only if NAMED is true. (build_common_tree_nodes): Pass true in calls to build_complex_type. From-SVN: r240967
2016-10-11New avr-passes.def to register AVR specific passes.Georg-Johann Lay5-17/+53
* config/avr/avr-passes.def: New file. * config/avr/t-avr (PASSES_EXTRA): Add avr-passes.def. * config/avr/avr-protos.h (gcc::context, rtl_opt_pass): Declare. (make_avr_pass_recompute_note): New proto. * config/avr/avr.c (make_avr_pass_recompute_notes): New function. (avr_pass_recompute_notes): Use anonymous namespace. (avr_register_passes): Remove function... (avr_option_override): ...and its call. From-SVN: r240966
2016-10-11[MIPS] Disable -mbranch-likely for -Os when targetting generic archRobert Suchanek4-35/+66
gcc/ * config/mips/mips-cpus.def: Replace PTF_AVOID_BRANCHLIKELY with PTF_AVOID_BRANCHLIKELY_ALWAYS for generic architecture and with PTF_AVOID_BRANCHLIKELY_SPEED for others. (mips2, mips3, mips4): Add PTF_AVOID_BRANCHLIKELY_SIZE to tune flags. * config/mips/mips.c (mips_option_override): Enable the branch likely depending on the tune flags and optimization level. * config/mips/mips.h (PTF_AVOID_BRANCHLIKELY): Remove. (PTF_AVOID_BRANCHLIKELY_SPEED): Define. (PTF_AVOID_BRANCHLIKELY_SIZE): Likewise. (PTF_AVOID_BRANCHLIKELY_ALWAYS): Likewise. From-SVN: r240965
2016-10-11lto-streamer-out.c (collect_block_tree_leafs): New helper.Richard Biener3-3/+30
2016-10-11 Richard Biener <rguenther@suse.de> * lto-streamer-out.c (collect_block_tree_leafs): New helper. (output_function): Properly stream the whole block tree. * lto-streamer-in.c (input_function): Likewise. From-SVN: r240964
2016-10-11Makefile.in (C_COMMON_OBJS): Add c-family/c-warn.o.Marek Polacek6-2192/+2275
* Makefile.in (C_COMMON_OBJS): Add c-family/c-warn.o. * c-common.c (fold_for_warn): No longer static. (bool_promoted_to_int_p): Likewise. (c_common_get_narrower): Likewise. (constant_expression_warning): Move to c-warn.c. (constant_expression_error): Likewise. (overflow_warning): Likewise. (warn_logical_operator): Likewise. (find_array_ref_with_const_idx_r): Likewise. (warn_tautological_cmp): Likewise. (expr_has_boolean_operands_p): Likewise. (warn_logical_not_parentheses): Likewise. (warn_if_unused_value): Likewise. (strict_aliasing_warning): Likewise. (sizeof_pointer_memaccess_warning): Likewise. (check_main_parameter_types): Likewise. (conversion_warning): Likewise. (warnings_for_convert_and_check): Likewise. (match_case_to_enum_1): Likewise. (match_case_to_enum): Likewise. (c_do_switch_warnings): Likewise. (warn_for_omitted_condop): Likewise. (readonly_error): Likewise. (lvalue_error): Likewise. (invalid_indirection_error): Likewise. (warn_array_subscript_with_type_char): Likewise. (warn_about_parentheses): Likewise. (warn_for_unused_label): Likewise. (warn_for_div_by_zero): Likewise. (warn_for_memset): Likewise. (warn_for_sign_compare): Likewise. (do_warn_double_promotion): Likewise. (do_warn_unused_parameter): Likewise. (record_locally_defined_typedef): Likewise. (maybe_record_typedef_use): Likewise. (maybe_warn_unused_local_typedefs): Likewise. (maybe_warn_bool_compare): Likewise. (maybe_warn_shift_overflow): Likewise. (warn_duplicated_cond_add_or_warn): Likewise. (diagnose_mismatched_attributes): Likewise. * c-common.h: Move the declarations from c-warn.c to its own section. * c-warn.c: New file. From-SVN: r240963
2016-10-11Daily bump.GCC Administrator1-1/+1
From-SVN: r240962
2016-10-11compiler: move Backend/Linemap creation out of front end.Than McIntosh10-14/+58
Push the calls to create Backend and Linemap object out of the front end into the back end, and instead pass pointers to these objects in the go_create_gogo_args struct. This allows for more flexibility in the interfaces used to create the objects. Reviewed-on: https://go-review.googlesource.com/30698 * go-gcc.h: New file. * go-c.h (struct go_create_gogo_args): Add backend and linemap fields. * go-lang.c: Include "go-gcc.h". (go_langhook_init): Set linemap and backend fields of args. * go-gcc.cc: Include "go-gcc.h". * go-linemap.cc: Include "go-gcc.h". From-SVN: r240959
2016-10-10Infer and push new value ranges for x in y < x.Kugan Vivekanandarajah2-14/+45
gcc/ChangeLog: 2016-10-11 Kugan Vivekanandarajah <kuganv@linaro.org> * tree-vrp.c (evrp_dom_walker::try_add_new_range): New. (evrp_dom_walker::before_dom_children): Infer and push new value ranges for x in y < x. From-SVN: r240957
2016-10-10runtime: copy print/println support from Go 1.7Ian Lance Taylor3-43/+61
Update the compiler to use the new names. Add calls to printlock and printunlock around print statements. Move expression evaluation before the call to printlock. Update g's writebuf field to a slice, and adjust C code accordingly. Reviewed-on: https://go-review.googlesource.com/30717 From-SVN: r240956
2016-10-10Always support float128 on ia64 (PR target/77586).Joseph Myers5-42/+10
Bug 77586, and previously <https://gcc.gnu.org/ml/gcc-bugs/2016-08/msg03233.html>, reports ia64-elf failing to build because of float128_type_node being NULL, but being used by the back end for __float128. The global float128_type_node is only available conditionally, if target hooks indicate TFmode is not only available as a scalar mode and of the right format, but also supported in libgcc. The back-end support, however, expects the type always to be available for __float128 even if the libgcc support is missing. Although a target-specific node could be restored in the case where libgcc support is missing, it seems better to address the missing libgcc support. Thus, this patch enables TFmode soft-fp in libgcc globally for all ia64 targets. Support for XFmode in libgcc (that is, for libgcc2.c XFmode functions, not soft-fp) is also enabled for all ia64 targets so that ia64 no longer needs to define the TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P hook. I've confirmed that ia64-elf builds cc1 with this patch and it passes -fself-test. I have not otherwise tested the patch. It's plausible that ia64-elf and ia64-freebsd might work as-is, but ia64-vms probably needs further changes, by someone familiar with VMS shared libraries, to implement an equivalent of ia64/t-softfp-compat in that case (avoiding conflicts between __divtf3 from soft-fp and the old alias for __divxf3). PR target/77586 gcc: * config/ia64/ia64.c (ia64_libgcc_floating_mode_supported_p) (TARGET_LIBGCC_FLOATING_MODE_SUPPORTED_P): Remove. * config/ia64/elf.h (IA64_NO_LIBGCC_TFMODE): Likewise. * config/ia64/freebsd.h (IA64_NO_LIBGCC_TFMODE): Likewise. * config/ia64/vms.h (IA64_NO_LIBGCC_XFMODE) (IA64_NO_LIBGCC_TFMODE): Likewise. libgcc: * config.host (ia64*-*-elf*, ia64*-*-freebsd*, ia64-hp-*vms*): Use soft-fp. From-SVN: r240955
2016-10-10* sv.po: Update.Joseph Myers2-5/+9
From-SVN: r240953
2016-10-10Allocate bitmap before copyingKugan Vivekanandarajah2-1/+9
Allocate bitmap before copying gcc/ChangeLog: 2016-10-11 Kugan Vivekanandarajah <kuganv@linaro.org> * tree-vrp.c (vrp_intersect_ranges_1): Allocate bitmap before copying. From-SVN: r240950
2016-10-10configure.ac: Add aarch64-*-freebsd*.Andreas Tobler5-1/+128
toplevel: 2016-10-10 Andreas Tobler <andreast@gcc.gnu.org> * configure.ac: Add aarch64-*-freebsd*. * configure: Regenerate. gcc: 2016-10-10 Andreas Tobler <andreast@gcc.gnu.org> * config.gcc: Add aarch64-*-freebsd* support. * config.host: Likewise. * config/aarch64/aarch64-freebsd.h: New file. * config/aarch64/t-aarch64-freebsd: Ditto. libgcc: 2016-10-10 Andreas Tobler <andreast@gcc.gnu.org> * config.host: Add support for aarch64-*-freebsd*. From-SVN: r240949
2016-10-10C++17 class deduction issuesJason Merrill4-5/+58
PR c++/77890 PR c++/77912 * pt.c (do_class_deduction): Set cp_unevaluated_operand. (tsubst) [TEMPLATE_TYPE_PARM]: Copy CLASS_PLACEHOLDER_TEMPLATE. From-SVN: r240948
2016-10-10re PR tree-optimization/71947 (x ^ y not folded to 0 if x == y by DOM)Jeff Law9-1/+140
PR tree-optimization/71947 * tree-ssa-dom.c (cprop_into_stmt): Avoid replacing A with B, then B with A within a single statement. PR tree-optimization/71947 * gcc.dg/tree-ssa/pr71947-1.c: New test. * gcc.dg/tree-ssa/pr71947-2.c: New test. * gcc.dg/tree-ssa/pr71947-3.c: New test. * gcc.dg/tree-ssa/pr71947-4.c: New test. * gcc.dg/tree-ssa/pr71947-5.c: New test. * gcc.dg/tree-ssa/pr71947-6.c: New test. From-SVN: r240947
2016-10-10re PR tree-optimization/77824 (unreachable code in SLSR GIMPLE pass)Bill Schmidt2-4/+17
2016-10-10 Bill Schmidt <wschmidt@linux.vnet.ibm.com> PR tree-optimization/77824 * gimple-ssa-strength-reduction.c (stmt_cost): Explicitly return zero cost for copies. (find_candidates_dom_walker::before_dom_children): Replace MODIFY_EXPR with SSA_NAME. (replace_mult_candidate): Likewise. (replace_profitable_candidates): Likewise. From-SVN: r240945
2016-10-10compiler: prune away gcc-specific linemap usageThan McIntosh5-2/+28
Add an interface to the go Linemap class to allow clients to ask for the line number for a Location (for debugging dumps), so as to move some gcc-specific location code into the back end. Reviewed-on: https://go-review.googlesource.com/30699 * go-linemap.cc (Gcc_linemap::location_line): New method. From-SVN: r240942
2016-10-10runtime: copy channel code from Go 1.7 runtimeIan Lance Taylor7-57/+118
Change the compiler to use the new routines. Drop the separation of small and large values when sending on a channel. Allocate the select struct on the stack. Remove the old C implementation of channels. Adjust the garbage collector for the new data structure. Bring in part of the tracing code, enough for the channel code to call. Bump the permitted number of allocations in one of the tests in context_test.go. The difference is that now receiving from a channel allocates a sudog, which the C code used to simply put on the stack. This will be somewhat better when we port proc.go. Reviewed-on: https://go-review.googlesource.com/30714 From-SVN: r240941
2016-10-10S/390: Wrap more macro args into ()Andreas Krebbel2-43/+49
Turned out that there where a few () around macro args uses missing. One real problem with it was detected with the int-in-bool-context in the definition of DBX_REGISTER_NUMBER. But while being at it I've also tried to fix other places where brackets might be missing. gcc/ChangeLog: 2016-10-10 Andreas Krebbel <krebbel@linux.vnet.ibm.com> * config/s390/s390.h: Wrap more macros args in brackets and fix some formatting. From-SVN: r240930
2016-10-10re PR fortran/77915 (Internal error for matmul() in forall with optimization)Thomas Koenig4-0/+30
2016-10-10 Thomas Koenig <tkoenig@gcc.gnu.org> PR fortran/77915 * frontend-passes.c (inline_matmul_assign): Return early if inside a FORALL statement. 2016-10-10 Thomas Koenig <tkoenig@gcc.gnu.org> PR fortran/77915 * gfortran.dg/matmul_11.f90: New test. From-SVN: r240928
2016-10-10gen-avr-mmcu-texi.c (string.h): Include.Georg-Johann Lay2-0/+5
* config/avr/gen-avr-mmcu-texi.c (string.h): Include. From-SVN: r240925
2016-10-10[4/4] ARMv8.2-A testsuite for new scalar intrinsicsJiong Wang60-0/+1916
gcc/testsuite/ * gcc.target/aarch64/advsimd-intrinsics/unary_scalar_op.inc: Support FMT64. * gcc.target/aarch64/advsimd-intrinsics/vabdh_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcageh_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcagth_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcaleh_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcalth_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vceqh_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vceqzh_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcgeh_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcgezh_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcgth_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcgtzh_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcleh_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vclezh_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vclth_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcltzh_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcvtah_s16_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcvtah_s64_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcvtah_u16_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcvtah_u64_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_s64_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcvth_f16_u64_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_s64_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_f16_u64_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s16_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_s64_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u16_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcvth_n_u64_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcvth_s16_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcvth_s64_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcvth_u16_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcvth_u64_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s16_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcvtmh_s64_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u16_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcvtmh_u64_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s16_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcvtnh_s64_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u16_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcvtnh_u64_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcvtph_s16_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcvtph_s64_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcvtph_u16_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vcvtph_u64_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vfmash_lane_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vmaxh_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vminh_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vmulh_lane_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vmulxh_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vmulxh_lane_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vrecpeh_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vrecpsh_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vrecpxh_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vrsqrteh_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vrsqrtsh_f16_1.c: New. From-SVN: r240924
2016-10-10[3/4] ARMv8.2-A testsuite for new vector intrinsicsJiong Wang15-0/+3428
gcc/testsuite/ * gcc.target/aarch64/advsimd-intrinsics/vdiv_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vfmas_lane_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vfmas_n_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vmaxnmv_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vmaxv_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vminnmv_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vminv_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vmul_lane_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vmulx_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vmulx_lane_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vmulx_n_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vpminmaxnm_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vrndi_f16_1.c: New. * gcc.target/aarch64/advsimd-intrinsics/vsqrt_f16_1.c: New. From-SVN: r240923
2016-10-10[2/4] ARMv8.2-A testsuite for new data movement intrinsicsJiong Wang7-15/+1053
gcc/testsuite/ * gcc.target/aarch64/advsimd-intrinsics/arm-neon-ref.h (FP16_SUPPORTED): Enable AArch64. * gcc.target/aarch64/advsimd-intrinsics/vdup_lane.c: Add support for vdup*_laneq. * gcc.target/aarch64/advsimd-intrinsics/vduph_lane.c: New. * gcc.target/aarch64/advsimd-intrinsics/vtrn_half.c: New. * gcc.target/aarch64/advsimd-intrinsics/vuzp_half.c: New. * gcc.target/aarch64/advsimd-intrinsics/vzip_half.c: New. From-SVN: r240922
2016-10-10[1/4] ARMv8.2-A FP16 testsuite selectorJiong Wang2-13/+53
gcc/testsuite/ * target-supports.exp (add_options_for_arm_v8_2a_fp16_scalar): Mention AArch64 support. (add_options_for_arm_v8_2a_fp16_neon): Likewise. (check_effective_target_arm_v8_2a_fp16_scalar_ok_nocache): Support AArch64 targets. (check_effective_target_arm_v8_2a_fp16_neon_ok_nocache): Support AArch64 targets. (check_effective_target_arm_v8_2a_fp16_scalar_hw): Support AArch64 targets. (check_effective_target_arm_v8_2a_fp16_neon_hw): Likewise. From-SVN: r240921
2016-10-10re PR target/77738 (Invalid initialisation of ar.lc register)Andreas Schwab2-6/+15
PR target/77738 * config/ia64/ia64.md ("doloop_end"): Reject if mode of loop pseudo is not DImode. From-SVN: r240918
2016-10-10[ARC] Disable compact casesi patterns for arcv2Claudiu Zissulescu4-3/+21
gcc/ 2016-05-09 Claudiu Zissulescu <claziss@synopsys.com> * common/config/arc/arc-common.c (arc_option_optimization_table): Remove compact casesi option. * config/arc/arc.c (arc_override_options): Use compact casesi option only for pre-ARCv2 cores. * doc/invoke.texi (mcompact-casesi): Update text. From-SVN: r240916
2016-10-10decl.c (gnat_to_gnu_entity): Put volatile qualifier on types at the very end ↵Eric Botcazou4-14/+40
of the processing. * gcc-interface/decl.c (gnat_to_gnu_entity): Put volatile qualifier on types at the very end of the processing. (gnat_to_gnu_param): Remove redundant test. (change_qualified_type): Do nothing for unconstrained array types. From-SVN: r240915
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