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2016-12-15[arm] Add missing arm-isa.hRichard Earnshaw1-0/+156
From-SVN: r243718
2016-12-15extend.texi: Clean up @xref{...} uses.Jakub Jelinek3-5/+10
* doc/extend.texi: Clean up @xref{...} uses. * doc/invoke.texi: Likewise. From-SVN: r243717
2016-12-15[arm] Permit 'auto' in -mfpuRichard Earnshaw8-67/+140
Now we finally have the infrastructure in place we can now derive details of the FPU from a CPU entry. This patch enables this for the existing cores that already have an explicit FPU in their product names. * arm-fpus.def: Add CNAME field to all FPU definitions. * genopt.sh: Use explicit enumeration tags for FPU entries. * arm-tables.opt: Regenerated. * arm.opt (mfpu): Provide initial value. * arm-opts.h (enum fpu_type): Build the enumeration from the list of available FPUs. Add 'auto' entry on the end. * arm.c (arm_configure_build_target): Only do explicit configuration of the FPU features if the selected FPU is not 'auto'. (arm_option_override): Adjust initialization of arm_fpu_index. Emit an error if we have a hard float ABI request, but the processor does not support floating-point. (arm_option_print): Handle -mfpu=auto. (arm_valid_target_attribute_rec): Don't permit fpu=auto in pragmas or function attributes. (arm_identify_fpu_from_isa): Handle effective soft-float when the FPU is automatically detected. * arm-cores.def (arm1136jf-s): Add feature ISA_FP_DBL. (arm1176jzf-s): Likewise. (mpcore): Likewise. (arm1156t2f-s): Likewise. From-SVN: r243716
2016-12-15[arm] Remove FEATURES field from FPU descriptionsRichard Earnshaw4-58/+52
Now that everything uses the new ISA features, we can remove the FEATURES field from the FPU descriptions, along with all the macros and definitions associated with it. * arm-fpus.def (ARM_FPU): Remove features field from all definitions. * arm.h (arm_fpu_feature_set): Delete typedef. (FPU_FL_NONE): Delete. (FPU_FL_NEON): Delete. (FPU_FL_FP16): Delete. (FPU_FL_CRYPTO): Delete. (FPU_FL_DBL): Delete. (FPU_FL_D32): Delete. (FPU_FL_VFPv2): Delete. (FPU_FL_VFPv3): Delete. (FPU_FL_VFPv4): Delete. (FPU_FL_VFPv5): Delete. (FPU_FL_AMRv8): Delete. (FPU_VFPv2): Delete. (FPU_VFPv3): Delete. (FPU_VFPv4): Delete. (FPU_VFPv5): Delete. (FPU_ARMv8): Delete. (FPU_DBL): Delete. (FPU_D32): Delete. (FPU_NEON): Delete. (FPU_CRYPTO): Delete. (FPU_FP16): Delete. (arm_fpu_desc): Delete features field. * arm.c (all_fpus): Don't initialize feature field. From-SVN: r243715
2016-12-15[arm] Use ISA feature sets for determining inlinabilityRichard Earnshaw2-8/+24
Now that we can construct the build target isa from the cl_target_options data we can use this to determine inlinability. This eliminates the final remaining use of the FPU features field. * arm.c (arm_can_inline_p): Use ISA features for determining inlinability. From-SVN: r243714
2016-12-15[arm] Use cl_target_options for configuring the active targetRichard Earnshaw4-14/+41
It now becomes apparent that it would be better to use the the cl_target_options as the basis for calling arm_configure_build_target; it already contains exactly the same fields that we need. I chose not to rewrite the earlier patches as that would make the progression of changes seem less logical than it currently is, with several early changes having no immediate justification. * arm-protos.h (arm_configure_build_target): Change second argument to cl_target_options. * arm.c (arm_configure_build_target): Likewise. (arm_option_restore): Update accordingly. (arm_option_override): Create the target_option_default_node before calling arm_configure_build_target. Use it in call of latter. Resynchronize after all other overrides have been calculated. (arm_valid_target_attribute_tree): Use the target options for reconfiguration. Resynchronize after performing override checks. * arm-c.c (arm_pragma_target_parse): Use target optiosn from cur_tree to reconfigure the build target. From-SVN: r243713
2016-12-15[arm] Use arm_active_target for most FP feature testsRichard Earnshaw3-21/+32
Now that the isa feature bits are all available in arm_active_target we can use that for most of the feature tests that are needed. * arm.h (TARGET_VFPD32): Use arm_active_target. (TARGET_VFP3): Likewise. (TARGET_VFP5): Likewise. (TARGET_VFP_SINGLE): Likewise. (TARGET_VFP_DOUBLE): Likewise. (TARGET_NEON_FP16): Likewise. (TARGET_FP16): Likewise. (TARGET_FMA): Likewise. (TARGET_FPU_ARMV8): Likewise. (TARGET_CRYPTO): Likewise. (TARGET_NEON): Likewise. (TARGET_FPU_FEATURES): Delete. * arm.c (arm_option_check_internal): Check for iwmmxt conflict with Neon using arm_active_target. From-SVN: r243712
2016-12-15[arm] Eliminate TARGET_FPU_NAMERichard Earnshaw3-3/+30
Rather than assuming a specific fpu name has been selected, we work out the FPU from the ISA properties. This is necessary since once we have default FPUs selected by the processor, there will be no explicit entry in the table of fpus to refer to. This also fixes a bug with the code I added recently to permit new aliases for existing FPU names: the new names cannot be passed to the assembler since it does not recognize them. By mapping the ISA features back to the canonical names we avoid having to teach the assembler about the new names. * arm.h (TARGET_FPU_NAME): Delete. * arm.c (arm_identify_fpu_from_isa): New function. (arm_declare_function_name): Use it to get the name for the FPU. From-SVN: r243711
2016-12-15[arm] Initialize fpu capability bits in arm_active_targetRichard Earnshaw5-26/+76
Now that we can describe the FPU with the standard ISA bits we need to initialize them. However, the FPU settings can be changed with target build attributes, so we also need to reset them if things change. This requires a bit of juggling about with the existing code to ensure that the active target is reconfigured after each change to the target options. * arm-protos.h: Include sbitmap.h (arm_configure_build_target): Make public. * arm.c (arm_configure_build_target): Now not static. (arm_valid_target_attribute_rec): Move internal option check to... (arm_valid_target_attribute_tree0: ... here. Also reconfingure the active target. (arm_override_options_after_change): Call arm_configure_build_target. (isa_all_fpubits): Renamed from isa_fpubits. (arm_option_restore): New function. (TARGET_OPTION_RESTORE): Register it. (arm_configure_build_target): Initialize the FPU capability bits in the isa. (arm_option_override): Move the code that forces the setting of the FPU option before the call to arm_configure_build_target. * arm.opt (march): Mark as Save. (mcpu, mtune): Likewise. * arm-c.c (arm_pragma_target_parse): Reconfigure the build target after pragmas change the target options. From-SVN: r243710
2016-12-15[arm] Add isa features to FPU descriptionsRichard Earnshaw5-29/+42
Similar to the new CPU and architecture ISA feature lists, we now add similar capabilities to each FPU description. We don't use these yet, that will come in later patches. These follow the same style as the newly modified flag sets, but use slightly different defaults that more accurately reflect the ISA specifications. * arm-isa.h (isa_feature): Add bits for VFPv4, FPv5, fp16conv, fP_dbl, fp_d32 and fp_crypto. (ISA_ALL_FPU): Add all the new bits. (ISA_VFPv2, ISA_VFPv3, ISA_VFPv4, ISA_FPv5): New macros. (ISA_FP_ARMv8, ISA_FP_DBL, ISA_FP_D32, ISA_NEON, ISA_CRYPTO): Likewise. * arm-fpus.def: Add ISA features to all FPUs. * arm.h: (arm_fpu_desc): Add new field for ISA bits. * arm.c (all_fpus): Initialize it. * arm-tables.opt: Regenerated. From-SVN: r243709
2016-12-15[arm] Remove FPU rev fieldRichard Earnshaw4-30/+62
Similar to the main ISA, we convert the FPU revision into a set of feature bits. This permits a more complex set of capability relationships to be expressed more easily. For now we continue to use the traditional bitmasks. * arm.h (FPU_FL_VFPv2) New feature bit. (FPU_FL_VFPv3, FPU_FL_VFPv4, FPU_FL_VFPv5, FPU_FL_ARMv8): Likewise. (FPU_VFPv2, FPU_VFPv3, FPU_VFPv4, FPU_VFPv5, FPU_ARMv8): New helper macros. (FPU_DBL, FPU_D32, FPU_NEON, FPU_CRYPTO, FPU_FP16): Likewise. (TARGET_FPU_REV): Delete. (TARGET_VFP3): Use feature bits. (TARGET_VFP5): Likewise. (TARGET_FMA): Likewise. (TARGET_FPU_ARMV8): Likewise. (struct arm_fpu_desc): Delete rev field. * arm-fpus.def: Delete REV entry, use new feature bits and macros. * arm.c (all_fpus): Delete rev field. From-SVN: r243708
2016-12-15[arm] Eliminate vfp_reg_typeRichard Earnshaw4-45/+48
Remove the VFP_REGS field by converting its meanings into flag attributes. The new flag attributes build on each other describing increasing capabilities. This allows us to do a better job when inlining functions with differing requiremetns on the fpu environment: we can now inline A into B if B has at least the same register set properties as B (previously we required identical register set properties). * arm.h (vfp_reg_type): Delete. (TARGET_FPU_REGS): Delete. (arm_fpu_desc): Delete regs field. (FPU_FL_NONE, FPU_FL_NEON, FPU_FL_FP16, FPU_FL_CRYPTO): Use unsigned values. (FPU_FL_DBL, FPU_FL_D32): Define. (TARGET_VFPD32): Use feature test. (TARGET_VFP_SINGLE): Likewise. (TARGET_VFP_DOUBLE): Likewise. * arm-fpus.def: Update all entries for new feature bits. * arm.c (all_fpus): Update initializer macro. (arm_can_inline_p): Remove test on fpu regs. From-SVN: r243707
2016-12-15[arm] Delete unused arm_fp_modelRichard Earnshaw2-8/+4
The arm_fp_model enumeration type has only had one useful value since the FPA support was removed, and it's no-longer used anywhere. This patch just cleans that up by removing it. * arm.h (arm_fp_model): Delete. From-SVN: r243706
2016-12-15[arm] Remove remaining references to arm feature setsRichard Earnshaw7-347/+171
Nothing uses the old feature sets now, so we can delete them entirely. * arm-cores.def: Remove FLAGS field from all core definitions. * arm-arches.def: Likewise. * arm-opts.h (enum processor_type): Remove FLAGS parameter from ARM_CORES macro. (arm_arch_core_flags): Likewise, plus ARM_ARCH macro. * arm-protos.h (FL_*): Delete. (arm_feature_set): Delete. (ARM_FSET_*): Delete. * arm.c (struct processors): Delete flags field. (all_cores): Delete FLAGS parameter from macro, don't initialize flags. (all architectures): Likewise. From-SVN: r243705
2016-12-15[arm] Rework arm-common to use new feature bits.Richard Earnshaw3-4/+29
This converts the recently added implicit -mthumb support code to use the new data structures. Since we have a very simple query and no initialized copies of the sbitmaps, for now we simply scan the list of features to look for the one of interest. * arm-opts.h (struct arm_arch_core_flag): Add new field ISA. Initialize it. (arm_arch_core_flag): Delete flags field. (arm_arch_core_flags): Don't initialize flags field. * common/config/arm/arm-common.c (check_isa_bits_for): New function. (arm_target_thumb_only): Use new isa bits arrays. From-SVN: r243704
2016-12-15[arm] Remove insn_flags.Richard Earnshaw4-56/+71
This patch finishes the job of removing insn_flags and moves the logic over to using the new data structures. I've added a new boolean variable to detect when we have ARMv7ve-like capabilities and thus have 64-bit atomic operations since that would be a complex query and expensive to do in full. It might be better to add a specific bit to the ISA data structures to indicate this capability directly. * arm-protos.h (insn_flags): Delete declaration. (arm_arch7ve): Declare. * arm.c (insn_flags): Delete. (arm_arch7ve): New variable. (arm_selected_cpu): Delete. (arm_option_check_internal): Use new ISA bitmap. (arm_option_override_internal): Likewise. (arm_configure_build_target): Declare arm_selected_cpu locally. (arm_option_override): Use new ISA bitmap. Initialize arm_arch7ve. Rearrange variable intialization by general function. * arm.h (TARGET_HAVE_LPAE): Use arm_arch7ve. From-SVN: r243703
2016-12-15[arm] Use arm_active_target when configuring builtinsRichard Earnshaw2-17/+34
This patch uses the new ISA data structure to determine which builtins to add. It entirely eliminates the need for insn_flags to be a global variable, but we're about to delete that in the following patches, so for now we leave it as a global. * arm-builtins.c: Include sbitmap.h. (def_mbuiltin): Change first parameter to a flag bit. Use it to test available features in the current target. (struct builtin_description): Change type of feature field. (IWMMXT_BUILTIN): Use the isa_features types. (IWMMXT2_BUILTIN): Likewise. (IWMMXT_BUILTIN2): Likewise. (IWMMXT2_BUILTIN2): Likewise. (CRC32_BUILTIN): Likewise. (CRYPTO_BUILTIN): Likewise. (iwmmx_builtin): Likewise. (iwmmx2_builtin): Likewise. (arm_iwmmxt_builtin): Check for specific feature bits. From-SVN: r243702
2016-12-15[arm] Add new isa quirk bit for Cortex-M3 ldrd issue.Richard Earnshaw3-2/+21
With the new data structures it is trivial to add a new field and we aren't (too) limited as to the number we have. This patch adds a new bit to describe the need for a particular compiler behaviour modification: in this case a quirk in the cortex-m3. * arm-isa.h (enum isa_feature): Add isa_quirk_cm3_ldrd. (ISA_ALL_QUIRKS): New macro. * arm-cores.def (cortex-m3): Add isa_quirk_cm3_ldrd to isa feature list. * arm.c (isa_quirkbits): New feature-list bitmap. (arm_configure_build_target): Ignore quirk bits when comparing an architecture feature list with a CPU feature list. (arm_option_override): Initialize_isa_quirkbits. If the user has not specified -m[no-]fix-cortex-m3-ldrd, automatically enable the feature if isa_quirk_cm3_ldrd appears in the isa feature list. From-SVN: r243701
2016-12-15[arm] Reduce usage of arm_selected_cpu.Richard Earnshaw2-5/+12
Make more use of the new data structure for initializing existing variables. * arm.c (arm_option_override): Use arm_active_target as source of information for arm_base_arch and arm_arch_name. * (arm_file_start): Use arm_active_target for core name. From-SVN: r243700
2016-12-15[arm] Use arm_active_target for architecture and tuneRichard Earnshaw2-17/+52
We now start to make more use of the new data structure. This allows us to eliminate two of the existing static variables, arm_selected_arch and arm_selected tune. * arm.c (arm_selected_tune): Delete static variable. (arm_selected_arch): Likewise. (arm_configure_build_target): Declare local versions of arm_selected target and arm_selected_arch. Initialize more fields in target data structure. (arm_option_override): Use arm_active_target instead of arm_selected_tune and arm_selected_arch. (asm_file_start): Use arm_active_target. From-SVN: r243699
2016-12-15[arm] Introduce arm_active_target.Richard Earnshaw3-60/+181
This patch creates a new data structure for carrying around the data relating to the current compilation target. The idea behind this is that this data structure can be updated to reflect the overall compilation target as new information is gathered (from command line options) or architectural extensions. We will no-longer have to grub around looking in multiple places for this information. There are some small behaviour changes around how we handle selecting a default CPU if thumb or interworking are specified on the command line and the default CPU does not support thumb, but I believe the existing code was broken in that respect. This code will go away once we obsolete pre-armv4t devices. * arm-protos.h (arm_build_target): New structure. (arm_active_target): Declare it. * arm.c (arm_active_target): New variable. (bitmap_popcount): New function. (feature_count): Delete. (arm_initialize_isa): New function. isa_fpubits): New variable. (arm_configure_build_target): New function. (arm_option_override): Initialize isa_fpubits and arm_active_target.isa. Use arm_configure_build_target. From-SVN: r243698
2016-12-15This patch adds the new ISA data structures.Richard Earnshaw9-184/+201
This patch adds the new ISA data structures. The idea is to use an sbitmap for carrying these around internally. We don't make much use of this yet, but will increasingly migrate over to this in the following patches. All cores and architectures currently have both old and new encodings for now. For simplicity and clarity we introduce internally the concept of ARMv7ve. It doesn't change any visible behaviour. There's also a bit of tidying up of the various supported cores, sorting them by profile. * arm-isa.h: New file. * arm-protos.h: Include it. * arm-arches.def: Add new ISA field to all entries. Drop bogus armv8.1-a+crc architecture. * arm-cores.def: Similarly. Group ARMv8 cores by profile. * arm-opts.h (enum processor_type): Adjust for new field. * arm.c (struct processors): New field 'isa_bits'. (all_cores, all_architectures): Initialize new field. * arm-tables.opt: Regenerated. * arm-tune.md: Regenerated. From-SVN: r243697
2016-12-15We start out by separating the 'tuning flags' in a CPU or architecture...Richard Earnshaw8-186/+199
We start out by separating the 'tuning flags' in a CPU or architecture specification into a new field in the data structures. Because there aren't very many of these (and we'd like to get rid of them entirely, eventually, moving to entries in the tuning tables), we just use a simple unsigned word. This frees up a number of bits in the main flags data structure, but we don't consolidate them as we'll be getting rid of them entirely shortly. There's one small user-visible change, the slow multiply flag is moved from being treated as an architectural flag to a tuning flag. This has two consequences: it's now ignored for architectural matching to a CPU and specifying a -mtune option will now correctly apply the multiply performance to the decision as to which sequences to synthesise. * arm-arches.def (ARM_ARCH): Add extra field TUNE_FLAGS, move tuning properties from architectural FLAGS field. * arm-cores.def (ARM_CORE): Likewise. * arm-protos.h (TF_LDSCHED, TF_WBUF, TF_CO_PROC): New macros. (TF_SMALLMUL, TF_STRONG, TF_SCALE, TF_NOMODE32): New macros. (FL_LDSCHED, FL_STRONG, FL_WBUF, FL_SMALLMUL): Delete. (FL_TUNE): Remove deleted elements. (tune_flags): Convert type to unsigned int. * arm.c (struct processors): Add new field tune_flags. (all_cores, all_arches): Initialize it. (arm_option_override): Adapt uses of tune_flags. Use tune_flags for deciding when we should have slow multiply operations. From-SVN: r243696
2016-12-15Fix ChangeLog formatting.David Edelsohn1-6/+6
From-SVN: r243695
2016-12-15ssa-fre-55.c: Add -Wno-psabi.David Edelsohn3-4/+7
* gcc.dg/tree-ssa/ssa-fre-55.c: Add -Wno-psabi. * gcc.dg/tree-ssa/pr71179.c: Same. From-SVN: r243694
2016-12-15re PR fortran/78800 ([OOP] ICE in compare_parameter, at ↵Janus Weil4-9/+40
fortran/interface.c:2246) 2016-12-15 Janus Weil <janus@gcc.gnu.org> PR fortran/78800 * interface.c (compare_allocatable): Avoid additional errors on bad class declarations. (compare_parameter): Put the result of gfc_expr_attr into a variable, in order to avoid calling it multiple times. Exit early on bad class declarations to avoid ICE. 2016-12-15 Janus Weil <janus@gcc.gnu.org> PR fortran/78800 * gfortran.dg/unlimited_polymorphic_27.f90: New test case. From-SVN: r243691
2016-12-15MIPS: Upgrade to R2 for -mmicromips.Toma Tabacu2-1/+7
gcc/testsuite * gcc.target/mips/mips.exp (mips-dg-options): Upgrade to R2 for -mmicromips. From-SVN: r243687
2016-12-15forwprop-35.c: Use -Wno-psabi everywhere.Jakub Jelinek4-6/+10
* gcc.dg/tree-ssa/forwprop-35.c: Use -Wno-psabi everywhere. * gcc.dg/torture/pr78515.c: Likewise. * gcc.dg/pr69634.c: Likewise. From-SVN: r243686
2016-12-14PR middle-end/78519 - missing warning for sprintf %s with null pointerMartin Sebor4-5/+156
gcc/ChangeLog: PR middle-end/78519 * gimple-ssa-sprintf.c (format_string): Handle null pointers. (format_directive): Diagnose null pointer arguments. (pass_sprintf_length::handle_gimple_call): Diagnose null destination pointers. Correct location of null format string in diagnostics. gcc/testsuite/ChangeLog: PR middle-end/78519 * gcc.dg/tree-ssa/builtin-sprintf-warn-7.c: New test. From-SVN: r243684
2016-12-14PR c++/78774 - [6/7 Regression] ICE in constexpr string literals and templatesMartin Sebor4-3/+24
gcc/cp/ChangeLog: PR c++/78774 * pt.c (convert_template_argument): Avoid assuming operand type is non-null since that of SCOPE_REF is not. gcc/testsuite/ChangeLog: PR c++/78774 * g++.dg/cpp1y/pr78774.C: New test. From-SVN: r243683
2016-12-15compiler: remove unneeded zero-length slice value initIan Lance Taylor2-7/+1
Prune away a bit of unnecessary code from the helper routine Slice_construction_expression::create_array_val() that was adding an extra NULL value to empty slices (no longer needed). Reviewed-on: https://go-review.googlesource.com/34410 From-SVN: r243682
2016-12-15Introduce selftest::locate_fileDavid Malcolm10-7/+91
gcc/ChangeLog: * Makefile.in (SELFTEST_FLAGS): Add path argument to -fself-test. (s-selftest): Add dependency on the selftests data directory. * common.opt (fself-test): Rename to... (fself-test=): ...this, documenting the meaning of the argument. * selftest-run-tests.c (along): Likewise. * selftest-run-tests.c: Include "options.h". (selftest::run_tests): Initialize selftest::path_to_selftest_files from flag_self_test. * selftest.c (selftest::path_to_selftest_files): New global. (selftest::locate_file): New function. (selftest::test_locate_file): New function. (selftest_c_tests): Likewise. (selftest::selftest_c_tests): Call test_locate_file. * selftest.h (selftest::locate_file): New decl. (selftest::path_to_selftest_files): New decl. gcc/testsuite/ChangeLog: PR target/78213 * gcc.dg/cpp/pr71591.c: Add a fake value for the argument of -fself-test. * gcc.dg/pr78213.c: Disable this test. * selftests/example.txt: New file. From-SVN: r243681
2016-12-15* es.po: Update.Joseph Myers2-413/+86
From-SVN: r243679
2016-12-15Daily bump.GCC Administrator1-1/+1
From-SVN: r243678
2016-12-14aarch64-cores.def: Add -1 as the variant to all of the cores.Andrew Pinski9-63/+110
2016-12-14 Andrew Pinski <apinski@cavium.com> * config/aarch64/aarch64-cores.def: Add -1 as the variant to all of the cores. (thunderx): Update to include LSE by default. (thunderxt88p1): New core. (thunderxt88): New core. (thunderxt81): New core. (thunderxt83): New core. * config/aarch64/driver-aarch64.c (struct aarch64_core_data): Add variant field. (ALL_VARIANTS): New define. (AARCH64_CORE): Support VARIANT operand. (cpu_data): Likewise. (host_detect_local_cpu): Parse variant field of /proc/cpuinfo. Combine the arch and single core case and support variant searching. * common/config/aarch64/aarch64-common.c (AARCH64_CORE): Add VARIANT operand. * config/aarch64/aarch64-opts.h (AARCH64_CORE): Likewise. * config/aarch64/aarch64.c (AARCH64_CORE): Likewise. * config/aarch64/aarch64.h (AARCH64_CORE): Likewise. * config/aarch64/aarch64-tune.md: Regenerate. * doc/invoke.texi (AARCH64/mtune): Document thunderxt88, thunderxt88p1, thunderxt81, thunderxt83 as available options. From-SVN: r243675
2016-12-14Coding style fixesMartin Jambor6-103/+117
2016-12-14 Martin Jambor <mjambor@suse.cz> * omp-offload.c: Fix coding style. * omp-expand.c: Likewise. * omp-general.c: Likewise. * omp-grid.c: Likewise. * omp-low.c: Fix coding style of parts touched by the previous splitting patch. From-SVN: r243674
2016-12-14Split omp-low into multiple filesMartin Jambor34-12080/+12662
2016-12-14 Martin Jambor <mjambor@suse.cz> * omp-general.h: New file. * omp-general.c: New file. * omp-expand.h: Likewise. * omp-expand.c: Likewise. * omp-offload.h: Likewise. * omp-offload.c: Likewise. * omp-grid.c: Likewise. * omp-grid.c: Likewise. * omp-low.h: Include omp-general.h and omp-grid.h. Removed includes of params.h, symbol-summary.h, lto-section-names.h, cilk.h, tree-eh.h, ipa-prop.h, tree-cfgcleanup.h, cfgloop.h, except.h, expr.h, stmt.h, varasm.h, calls.h, explow.h, dojump.h, flags.h, tree-into-ssa.h, tree-cfg.h, cfganal.h, alias.h, emit-rtl.h, optabs.h, expmed.h, alloc-pool.h, cfghooks.h, rtl.h and memmodel.h. (omp_find_combined_for): Declare. (find_omp_clause): Renamed to omp_find_clause and moved to omp-general.h. (free_omp_regions): Renamed to omp_free_regions and moved to omp-expand.h. (replace_oacc_fn_attrib): Renamed to oacc_replace_fn_attrib and moved to omp-general.h. (set_oacc_fn_attrib): Renamed to oacc_set_fn_attrib and moved to omp-general.h. (build_oacc_routine_dims): Renamed to oacc_build_routine_dims and moved to omp-general.h. (get_oacc_fn_attrib): Renamed to oacc_get_fn_attrib and moved to omp-general.h. (oacc_fn_attrib_kernels_p): Moved to omp-general.h. (get_oacc_fn_dim_size): Renamed to oacc_get_fn_dim_size and moved to omp-general.c. (omp_expand_local): Moved to omp-expand.h. (make_gimple_omp_edges): Renamed to omp_make_gimple_edges and moved to omp-expand.h. (omp_finish_file): Moved to omp-offload.h. (default_goacc_validate_dims): Renamed to oacc_default_goacc_validate_dims and moved to omp-offload.h. (offload_funcs, offload_vars): Moved to omp-offload.h. * omp-low.c: Include omp-general.h, omp-offload.h and omp-grid.h. (omp_region): Moved to omp-expand.c. (omp_for_data_loop): Moved to omp-general.h. (omp_for_data): Likewise. (oacc_loop): Moved to omp-offload.c. (oacc_loop_flags): Moved to omp-general.h. (offload_funcs, offload_vars): Moved to omp-offload.c. (root_omp_region): Moved to omp-expand.c. (omp_any_child_fn_dumped): Likewise. (find_omp_clause): Renamed to omp_find_clause and moved to omp-general.c. (is_combined_parallel): Moved to omp-expand.c. (is_reference): Renamed to omp_is_reference and and moved to omp-general.c. (adjust_for_condition): Renamed to omp_adjust_for_condition and moved to omp-general.c. (get_omp_for_step_from_incr): Renamed to omp_get_for_step_from_incr and moved to omp-general.c. (extract_omp_for_data): Renamed to omp_extract_for_data and moved to omp-general.c. (workshare_safe_to_combine_p): Moved to omp-expand.c. (omp_adjust_chunk_size): Likewise. (get_ws_args_for): Likewise. (get_base_type): Removed. (dump_omp_region): Moved to omp-expand.c. (debug_omp_region): Likewise. (debug_all_omp_regions): Likewise. (new_omp_region): Likewise. (free_omp_region_1): Likewise. (free_omp_regions): Renamed to omp_free_regions and moved to omp-expand.c. (find_combined_for): Renamed to omp_find_combined_for, made global. (build_omp_barrier): Renamed to omp_build_barrier and moved to omp-general.c. (omp_max_vf): Moved to omp-general.c. (omp_max_simt_vf): Likewise. (gimple_build_cond_empty): Moved to omp-expand.c. (parallel_needs_hsa_kernel_p): Likewise. (expand_omp_build_assign): Moved declaration to omp-expand.c. (expand_parallel_call): Moved to omp-expand.c. (expand_cilk_for_call): Likewise. (expand_task_call): Likewise. (vec2chain): Likewise. (remove_exit_barrier): Likewise. (remove_exit_barriers): Likewise. (optimize_omp_library_calls): Likewise. (expand_omp_regimplify_p): Likewise. (expand_omp_build_assign): Likewise. (expand_omp_taskreg): Likewise. (oacc_collapse): Likewise. (expand_oacc_collapse_init): Likewise. (expand_oacc_collapse_vars): Likewise. (expand_omp_for_init_counts): Likewise. (expand_omp_for_init_vars): Likewise. (extract_omp_for_update_vars): Likewise. (expand_omp_ordered_source): Likewise. (expand_omp_ordered_sink): Likewise. (expand_omp_ordered_source_sink): Likewise. (expand_omp_for_ordered_loops): Likewise. (expand_omp_for_generic): Likewise. (expand_omp_for_static_nochunk): Likewise. (find_phi_with_arg_on_edge): Likewise. (expand_omp_for_static_chunk): Likewise. (expand_cilk_for): Likewise. (expand_omp_simd): Likewise. (expand_omp_taskloop_for_outer): Likewise. (expand_omp_taskloop_for_inner): Likewise. (expand_oacc_for): Likewise. (expand_omp_for): Likewise. (expand_omp_sections): Likewise. (expand_omp_single): Likewise. (expand_omp_synch): Likewise. (expand_omp_atomic_load): Likewise. (expand_omp_atomic_store): Likewise. (expand_omp_atomic_fetch_op): Likewise. (expand_omp_atomic_pipeline): Likewise. (expand_omp_atomic_mutex): Likewise. (expand_omp_atomic): Likewise. (oacc_launch_pack): and moved to omp-general.c, made public. (OACC_FN_ATTRIB): Likewise. (replace_oacc_fn_attrib): Renamed to oacc_replace_fn_attrib and moved to omp-general.c. (set_oacc_fn_attrib): Renamed to oacc_set_fn_attrib and moved to omp-general.c. (build_oacc_routine_dims): Renamed to oacc_build_routine_dims and moved to omp-general.c. (get_oacc_fn_attrib): Renamed to oacc_get_fn_attrib and moved to omp-general.c. (oacc_fn_attrib_kernels_p): Moved to omp-general.c. (oacc_fn_attrib_level): Moved to omp-offload.c. (get_oacc_fn_dim_size): Renamed to oacc_get_fn_dim_size and moved to omp-general.c. (get_oacc_ifn_dim_arg): Renamed to oacc_get_ifn_dim_arg and moved to omp-general.c. (mark_loops_in_oacc_kernels_region): Moved to omp-expand.c. (grid_launch_attributes_trees): Likewise. (grid_attr_trees): Likewise. (grid_create_kernel_launch_attr_types): Likewise. (grid_insert_store_range_dim): Likewise. (grid_get_kernel_launch_attributes): Likewise. (get_target_argument_identifier_1): Likewise. (get_target_argument_identifier): Likewise. (get_target_argument_value): Likewise. (push_target_argument_according_to_value): Likewise. (get_target_arguments): Likewise. (expand_omp_target): Likewise. (grid_expand_omp_for_loop): Moved to omp-grid.c. (grid_arg_decl_map): Likewise. (grid_remap_kernel_arg_accesses): Likewise. (grid_expand_target_grid_body): Likewise. (expand_omp): Renamed to omp_expand and moved to omp-expand.c. (build_omp_regions_1): Moved to omp-expand.c. (build_omp_regions_root): Likewise. (omp_expand_local): Likewise. (build_omp_regions): Likewise. (execute_expand_omp): Likewise. (pass_data_expand_omp): Likewise. (pass_expand_omp): Likewise. (make_pass_expand_omp): Likewise. (pass_data_expand_omp_ssa): Likewise. (pass_expand_omp_ssa): Likewise. (make_pass_expand_omp_ssa): Likewise. (grid_lastprivate_predicate): Renamed to omp_grid_lastprivate_predicate and moved to omp-grid.c, made public. (grid_prop): Moved to omp-grid.c. (GRID_MISSED_MSG_PREFIX): Likewise. (grid_safe_assignment_p): Likewise. (grid_seq_only_contains_local_assignments): Likewise. (grid_find_single_omp_among_assignments_1): Likewise. (grid_find_single_omp_among_assignments): Likewise. (grid_find_ungridifiable_statement): Likewise. (grid_parallel_clauses_gridifiable): Likewise. (grid_inner_loop_gridifiable_p): Likewise. (grid_dist_follows_simple_pattern): Likewise. (grid_gfor_follows_tiling_pattern): Likewise. (grid_call_permissible_in_distribute_p): Likewise. (grid_handle_call_in_distribute): Likewise. (grid_dist_follows_tiling_pattern): Likewise. (grid_target_follows_gridifiable_pattern): Likewise. (grid_remap_prebody_decls): Likewise. (grid_var_segment): Likewise. (grid_mark_variable_segment): Likewise. (grid_copy_leading_local_assignments): Likewise. (grid_process_grid_body): Likewise. (grid_eliminate_combined_simd_part): Likewise. (grid_mark_tiling_loops): Likewise. (grid_mark_tiling_parallels_and_loops): Likewise. (grid_process_kernel_body_copy): Likewise. (grid_attempt_target_gridification): Likewise. (grid_gridify_all_targets_stmt): Likewise. (grid_gridify_all_targets): Renamed to omp_grid_gridify_all_targets and moved to omp-grid.c, made public. (make_gimple_omp_edges): Renamed to omp_make_gimple_edges and moved to omp-expand.c. (add_decls_addresses_to_decl_constructor): Moved to omp-offload.c. (omp_finish_file): Likewise. (oacc_thread_numbers): Likewise. (oacc_xform_loop): Likewise. (oacc_default_dims, oacc_min_dims): Likewise. (oacc_parse_default_dims): Likewise. (oacc_validate_dims): Likewise. (new_oacc_loop_raw): Likewise. (new_oacc_loop_outer): Likewise. (new_oacc_loop): Likewise. (new_oacc_loop_routine): Likewise. (finish_oacc_loop): Likewise. (free_oacc_loop): Likewise. (dump_oacc_loop_part): Likewise. (dump_oacc_loop): Likewise. (debug_oacc_loop): Likewise. (oacc_loop_discover_walk): Likewise. (oacc_loop_sibling_nreverse): Likewise. (oacc_loop_discovery): Likewise. (oacc_loop_xform_head_tail): Likewise. (oacc_loop_xform_loop): Likewise. (oacc_loop_process): Likewise. (oacc_loop_fixed_partitions): Likewise. (oacc_loop_auto_partitions): Likewise. (oacc_loop_partition): Likewise. (default_goacc_fork_join): Likewise. (default_goacc_reduction): Likewise. (execute_oacc_device_lower): Likewise. (default_goacc_validate_dims): Likewise. (default_goacc_dim_limit): Likewise. (pass_data_oacc_device_lower): Likewise. (pass_oacc_device_lower): Likewise. (make_pass_oacc_device_lower): Likewise. (execute_omp_device_lower): Likewise. (pass_data_omp_device_lower): Likewise. (pass_omp_device_lower): Likewise. (make_pass_omp_device_lower): Likewise. (pass_data_omp_target_link): Likewise. (pass_omp_target_link): Likewise. (find_link_var_op): Likewise. (pass_omp_target_link::execute): Likewise. (make_pass_omp_target_link): Likewise. * Makefile.in (OBJS): Added omp-offload.o, omp-expand.o, omp-general.o and omp-grid.o. (GTFILES): Added omp-offload.h, omp-offload.c and omp-expand.c, removed omp-low.h. * gimple-fold.c: Include omp-general.h instead of omp-low.h. (fold_internal_goacc_dim): Adjusted calls to get_oacc_ifn_dim_arg and get_oacc_fn_dim_size to use their new names. * gimplify.c: Include omp-low.h. (omp_notice_variable): Adjust the call to get_oacc_fn_attrib to use its new name. (gimplify_omp_task): Adjusted calls to find_omp_clause to use its new name. (gimplify_omp_for): Likewise. * lto-cgraph.c: Include omp-offload.h instead of omp-low.h. * toplev.c: Include omp-offload.h instead of omp-low.h. * tree-cfg.c: Include omp-general.h instead of omp-low.h. Also include omp-expand.h. (make_edges_bb): Adjusted the call to make_gimple_omp_edges to use its new name. (make_edges): Adjust the call to free_omp_regions to use its new name. * tree-parloops.c: Include omp-general.h. (create_parallel_loop): Adjusted the call to set_oacc_fn_attrib to use its new name. (parallelize_loops): Adjusted the call to get_oacc_fn_attrib to use its new name. * tree-ssa-loop.c: Include omp-general.h instead of omp-low.h. (gate_oacc_kernels): Adjusted the call to get_oacc_fn_attrib to use its new name. * tree-vrp.c: Include omp-general.h instead of omp-low.h. (extract_range_basic): Adjusted calls to get_oacc_ifn_dim_arg and get_oacc_fn_dim_size to use their new names. * varpool.c: Include omp-offload.h instead of omp-low.h. * gengtype.c (open_base_files): Replace omp-low.h with omp-offload.h in ifiles. * config/nvptx/nvptx.c: Include omp-general.c. (nvptx_expand_call): Adjusted the call to get_oacc_fn_attrib to use its new name. (nvptx_reorg): Likewise. (nvptx_record_offload_symbol): Likewise. gcc/c-family: * c-omp.c: Include omp-general.h instead of omp-low.h. (c_finish_oacc_wait): Adjusted call to find_omp_clause to use its new name. gcc/c/ * c-parser.c: Include omp-general.h and omp-offload.h instead of omp-low.h. (c_finish_oacc_routine): Adjusted call to get_oacc_fn_attrib, build_oacc_routine_dims and replace_oacc_fn_attrib to use their new names. (c_parser_oacc_enter_exit_data): Adjusted call to find_omp_clause to use its new name. (c_parser_oacc_update): Likewise. (c_parser_omp_simd): Likewise. (c_parser_omp_target_update): Likewise. * c-typeck.c: Include omp-general.h instead of omp-low.h. (c_finish_omp_cancel): Adjusted call to find_omp_clause to use its new name. (c_finish_omp_cancellation_point): Likewise. * gimple-parser.c: Do not include omp-low.h gcc/cp/ * parser.c: Include omp-general.h and omp-offload.h instead of omp-low.h. (cp_parser_omp_simd): Adjusted calls to find_omp_clause to use its new name. (cp_parser_omp_target_update): Likewise. (cp_parser_oacc_declare): Likewise. (cp_parser_oacc_enter_exit_data): Likewise. (cp_parser_oacc_update): Likewise. (cp_finalize_oacc_routine): Adjusted call to get_oacc_fn_attrib, build_oacc_routine_dims and replace_oacc_fn_attrib to use their new names. * semantics.c: Include omp-general insteda of omp-low.h. (finish_omp_for): Adjusted calls to find_omp_clause to use its new name. (finish_omp_cancel): Likewise. (finish_omp_cancellation_point): Likewise. fortran/ * trans-openmp.c: Include omp-general.h. From-SVN: r243673
2016-12-14PR middle-end/78786 - GCC hangs/out of memory calling sprintf with large ↵Martin Sebor4-48/+295
precision gcc/ChangeLog: PR middle-end/78786 * gimple-ssa-sprintf.c (target_dir_max): New macro. (get_mpfr_format_length): New function. (format_integer): Use HOST_WIDE_INT instead of int. (format_floating_max): Same. (format_floating): Call get_mpfr_format_length. (format_directive): Use target_dir_max. gcc/testsuite/ChangeLog: PR middle-end/78786 * gcc.dg/tree-ssa/builtin-sprintf-warn-7.c: New test. From-SVN: r243672
2016-12-14re PR target/78791 (ACATS cxf2001 failure)Jakub Jelinek6-2/+41
PR target/78791 * config/i386/i386.h (enum ix86_stack_slot): Add SLOT_STV_TEMP. * config/i386/i386.c (dimode_scalar_chain::make_vector_copies, dimode_scalar_chain::convert_reg): Use SLOT_STV_TEMP instead of SLOT_TEMP. * gcc.c-torture/execute/pr78791.c: New test. * gcc.target/i386/pr78791.c: New test. From-SVN: r243671
2016-12-14re PR c++/72775 (internal compiler error: in finish_expr_stmt, at ↵Marek Polacek6-1/+86
cp/semantics.c:677) PR c++/72775 * init.c (perform_member_init): Diagnose member initializer for flexible array member. * g++.dg/ext/flexary12.C: Adjust dg-error. * g++.dg/ext/flexary20.C: New. * g++.dg/ext/flexary21.C: New. From-SVN: r243669
2016-12-14re PR target/59874 (Missing builtin (__builtin_clzs) when compiling with g++)Uros Bizjak7-2/+83
PR target/59874 * config/i386/i386-builtin.def: Add __builtin_clzs and __builtin_ctzs. (ix86_fold_builtin): Handle IX86_BUILTIN_CTZS and IX86_BUILTIN_CLZS. * config/i386/i386.md (*ctzhi2): New insn_and_split pattern. (*clzhi2): Ditto. testsuite/ChangeLog PR target/59874 * gcc.target/i386/pr59874-1.c: New test. * gcc.target/i386/pr59874-2.c: Ditto. From-SVN: r243668
2016-12-14pr78515.c: Add -Wno-psabi for AIX.David Edelsohn4-1/+9
* gcc.dg/torture/pr78515.c: Add -Wno-psabi for AIX. * gcc.dg/tree-ssa/forwprop-35.c: Add -Wno-psabi for AIX. * gcc.dg/pr69634.c: Add -Wno-psabi for AIX. From-SVN: r243666
2016-12-14re PR debug/77844 (Compilation of simple C++ example exhaust memory)Jakub Jelinek5-8/+89
PR debug/77844 * valtrack.c: Include rtl-iter.h. (struct rtx_subst_pair): Add insn field. (propagate_for_debug_subst): If pair->to contains at least 2 regs, create a DEBUG_INSN with a debug temp before pair->insn and replace from with the debug temp instead of pair->to. (propagate_for_debug): Initialize p.insn. * combine.c (insn_uid_check): New inline function. (INSN_COST, LOG_LINKS): Use it instead of INSN_UID. (find_single_use, combine_instructions, cant_combine_insn_p, try_combine): Use NONDEBUG_INSN_P instead of INSN_P. * g++.dg/opt/pr77844.C: New test. From-SVN: r243662
2016-12-14PR c/78673 - sprintf missing attribute nonnull on destination argumentMartin Sebor11-20/+566
PR c/78673 - sprintf missing attribute nonnull on destination argument PR c/17308 - nonnull attribute not as useful as it could be gcc/ChangeLog: PR c/17308 * builtin-attrs.def (ATTR_NONNULL_1_1, ATTR_NONNULL_1_2): Defined. (ATTR_NONNULL_1_3, ATTR_NONNULL_1_4, ATTR_NONNULL_1_5): Same. (ATTR_NOTHROW_NONNULL_1_1, ATTR_NOTHROW_NONNULL_1_2): Same. (ATTR_NOTHROW_NONNULL_1_3, ATTR_NOTHROW_NONNULL_1_4): Same. (ATTR_NOTHROW_NONNULL_1_5): Same. (ATTR_NONNULL_1_FORMAT_PRINTF_1_2): Same. (ATTR_NONNULL_1_FORMAT_PRINTF_2_0): Same. (ATTR_NONNULL_1_FORMAT_PRINTF_2_3): Same. (ATTR_NONNULL_1_FORMAT_PRINTF_3_0): Same. (ATTR_NONNULL_1_FORMAT_PRINTF_3_4): Same. (ATTR_NONNULL_1_FORMAT_PRINTF_4_0): Same. (ATTR_NONNULL_1_FORMAT_PRINTF_4_5): Same. * builtins.c (validate_arg): Add argument. Treat null pointers passed to nonnull arguments as invalid. (validate_arglist): Same. * builtins.def (fprintf, fprintf_unlocked): Add nonnull attribute. (printf, printf_unlocked, sprintf. vfprintf, vsprintf): Same. (__sprintf_chk, __vsprintf_chk, __fprintf_chk, __vfprintf_chk): Same. * calls.c (get_nonnull_ags, maybe_warn_null_arg): New functions. (initialize_argument_information): Diagnose null pointers passed to arguments declared nonnull. * calls.h (get_nonnull_args): Declared. gcc/c-family/ChangeLog: PR c/17308 * c-common.c (check_nonnull_arg): Disable when optimization is enabled. gcc/testsuite/ChangeLog: PR c/17308 * gcc.dg/builtins-nonnull.c: New test. * gcc.dg/nonnull-4.c: New test. From-SVN: r243661
2016-12-14re PR c++/78701 (ICE: unexpected expression N of kind template_parm_index)Nathan Sidwell4-4/+26
PR c++/78701 * pt.c (type_unification_real): Check tsubst arg doesn't have remaining template parms before converting it. PR c++/78701 * g++.dg/cpp0x/pr78701.C: New. From-SVN: r243657
2016-12-14re PR c++/69481 (ICE with C++11 alias using with templates)Nathan Sidwell2-6/+12
PR c++/69481 * cp-tree.h (TYPE_TEMPLATE_INFO_MAYBE_ALIAS): Always use TYPE_ALIAS_TEMPLATE_INFO for aliases. From-SVN: r243656
2016-12-14rs6000.c (rs6000_split_vec_extract_var): On ISA 3.0/power9, add support to ↵Michael Meissner22-319/+1144
use the VEXTU{B,H,W}{L,R}X extract instructions. [gcc] 2016-12-14 Michael Meissner <meissner@linux.vnet.ibm.com> * config/rs6000/rs6000.c (rs6000_split_vec_extract_var): On ISA 3.0/power9, add support to use the VEXTU{B,H,W}{L,R}X extract instructions. * config/rs6000/vsx.md (VSr2): Add IEEE 128-bit floating point type constraint registers. (VSr3): Likewise. (FL_CONV): New mode iterator for binary floating types that have a direct conversion from 64-bit integer to floating point. (vsx_extract_<mode>_p9): Add support for the ISA 3.0/power9 VEXTU{B,H,W}{L,R}X extract instructions. (vsx_extract_<mode>_p9 splitter): Add splitter to load up the extract byte position into the GPR if we are using the VEXTU{B,H,W}{L,R}X extract instructions. (vsx_extract_<mode>_di_p9): Support extracts to GPRs. (vsx_extract_<mode>_store_p9): Support extracting to GPRs so that we can use reg+offset address instructions. (vsx_extract_<mode>_var): Support extracts to GPRs. (vsx_extract_<VSX_EXTRACT_I:mode>_<SDI:mode>_var): New combiner insn to combine vector extracts with zero_extend. (vsx_ext_<VSX_EXTRACT_I:VS_scalar>_fl_<FL_CONV:mode>): Optimize extracting a small integer vector element and converting it to a floating point type. (vsx_ext_<VSX_EXTRACT_I:VS_scalar>_ufl_<FL_CONV:mode>): Likewise. (UNSPEC_XXEXTRACTUW): New unspec. (UNSPEC_XXINSERTW): Likewise. (vextract4b): Add support for the vec_vextract4b built-in function. (vextract4b_internal): Likewise. (vinsert4b): Add support for the vec_insert4b built-in function. Include both a version that inserts element 1 from a V4SI object and one that inserts a DI object. (vinsert4b_internal): Likewise. (vinsert4b_di): Likewise. (vinsert4b_di_internal): Likewise. * config/rs6000/predicates.md (const_0_to_11_operand): New predicate, match 0..11. * config/rs6000/rs6000-builtin.def (BU_P9V_VSX_3): Set built-in type to ternary, not binary. (BU_P9V_64BIT_VSX_3): Likewise. (P9V_BUILTIN_VEXTRACT4B): Add support for vec_vinsert4b and vec_extract4b non-overloaded built-in functions. (P9V_BUILTIN_VINSERT4B): Likewise. (P9V_BUILTIN_VINSERT4B_DI): Likewise. (P9V_BUILTIN_VEC_VEXTULX): Move to section that adds 2 operand ISA 3.0 built-in functions. (P9V_BUILTIN_VEC_VEXTURX): Likewise. (P9V_BUILTIN_VEC_VEXTRACT4B): Add support for overloaded vec_insert4b and vec_extract4 built-in functions. (P9V_BUILTIN_VEC_VINSERT4B): Likewise. * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add overloaded support for vec_vinsert4b and vec_extract4b. * config/rs6000/rs6000.c (altivec_expand_builtin): Add checks for the vec_insert4b and vec_extract4b byte number being a constant in the range 0..11. * config/rs6000/altivec.h (vec_vinsert4b): Support vec_vinsert4b and vec_extract4b built-in functions. * doc/extend.doc (PowerPC VSX built-in functions): Document vec_insert4b and vec_extract4b. [gcc/testsuite] 2016-12-14 Michael Meissner <meissner@linux.vnet.ibm.com> * gcc/testsuite/gcc.target/powerpc/vec-extract.h: If DO_TRACE is defined, add tracing of the various extracts to stderr. Add support for tests that convert the result to another type. * gcc/testsuite/gcc.target/powerpc/vec-extract-v2df.c: Likewise. * gcc/testsuite/gcc.target/powerpc/vec-extract-v4sf.c: Likewise. * gcc/testsuite/gcc.target/powerpc/vec-extract-v4si-df.c: Add new tests that do an extract and then convert the values double. * gcc/testsuite/gcc.target/powerpc/vec-extract-v4siu-df.c: Likewise. * gcc/testsuite/gcc.target/powerpc/vec-extract-v16qiu-df.c: Likewise. * gcc/testsuite/gcc.target/powerpc/vec-extract-v16qi-df.c: Likewise. * gcc/testsuite/gcc.target/powerpc/vec-extract-v8hiu-df.c: Likewise. * gcc/testsuite/gcc.target/powerpc/vec-extract-v8hi-df.c: Likewise. * gcc.target/powerpc/p9-extract-1.c: Update test to check for VEXTU{B,H,W}{L,R}X instructions being generated by default instead of VEXTRACTU{B,H} and XXEXTRACTUW. * gcc.target/powerpc/p9-extract-3.c: New test for combination of vec_extract and convert to floating point. * gcc.target/powerpc/p9-vinsert4b-1.c: New test for vec_vinsert4b and vec_extract4b. * gcc.target/powerpc/p9-vinsert4b-2.c: Likewise. From-SVN: r243653
2016-12-14MIPS: Remove redundant dg-skip-if from mips16-attributes.c.Toma Tabacu2-1/+5
gcc/testsuite * gcc.target/mips/mips16-attributes.c: Remove dg-skip-if for -mmicromips. From-SVN: r243649
2016-12-14re PR fortran/78780 ([Coarray] ICE in conv_caf_send, at ↵Andre Vehreschild5-4/+62
fortran/trans-intrinsic.c:1936) gcc/testsuite/ChangeLog: 2016-12-14 Andre Vehreschild <vehre@gcc.gnu.org> PR fortran/78780 * gfortran.dg/coarray/alloc_comp_5.f90: New test. * gfortran.dg/coarray_42.f90: New test. gcc/fortran/ChangeLog: 2016-12-14 Andre Vehreschild <vehre@gcc.gnu.org> PR fortran/78780 * trans-expr.c (gfc_trans_assignment_1): Improve check whether detour caf-runtime routines is needed. From-SVN: r243648
2016-12-14re PR fortran/78672 (Gfortran test suite failures with a sanitized compiler)Andre Vehreschild9-40/+76
gcc/fortran/ChangeLog: 2016-12-14 Andre Vehreschild <vehre@gcc.gnu.org> PR fortran/78672 * array.c (gfc_find_array_ref): Add flag to return NULL when no ref is found instead of erroring out. * data.c (gfc_assign_data_value): Only constant expressions are valid for initializers. * gfortran.h: Reflect change of gfc_find_array_ref's signature. * interface.c (compare_actual_formal): Access the non-elemental array-ref. Prevent taking a REF_COMPONENT for a REF_ARRAY. Correct indentation. * module.c (load_omp_udrs): Clear typespec before reading into it. * trans-decl.c (gfc_build_qualified_array): Prevent accessing the array when it is a coarray. * trans-expr.c (gfc_conv_cst_int_power): Use wi::abs()-function instead of crutch preventing sanitizer's bickering here. * trans-stmt.c (gfc_trans_deallocate): Only get data-component when it is a descriptor-array here. From-SVN: r243647