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This ICE was because when adjusting a column offset we could advance
into a linemap for a different file. We only checked the next line
map was not for a line further advanced in any file, forgetting that
it could be for an earlier line in a different file. The testcase
needed adjusting as column 512 was unrepresentable, once that was
taken into consideration.
PR preprocessor/99446
libcpp/
* line-map.c (line-map.c): Do not advance to linemaps for
different files.
gcc/testsuite/
* g++.dg/diagnostic/pr72803.C: Adjust expected column.
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Similarly to PR87763 for bfi, the GCC 9 combiner changes to not combine
moves from hard registers regressed the following testcase where we no
longer recognize bfxil and emit 3 instructions instead.
The following patch adds define_insn patterns that match what the combiner
is trying to match in these cases. I haven't been able to see patterns
with the other order of the IOR operands, seems the IL is canonicalized this
way no matter what is written in the source.
2021-04-13 Jakub Jelinek <jakub@redhat.com>
PR target/100028
* config/aarch64/aarch64.md (*aarch64_bfxil<mode>_extr,
*aarch64_bfxilsi_extrdi): New define_insn patterns.
* gcc.target/aarch64/pr100028.c: New test.
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The problem is that the new IS_MACRO_LOC macro:
inline bool
IS_MACRO_LOC (location_t loc)
{
return !IS_ORDINARY_LOC (loc) && !IS_ADHOC_LOC (loc);
}
is not fully correct since the position of the macro lines is not fixed:
/* Returns the lowest location [of a token resulting from macro
expansion] encoded in this line table. */
inline location_t
LINEMAPS_MACRO_LOWEST_LOCATION (const line_maps *set)
{
return LINEMAPS_MACRO_USED (set)
? MAP_START_LOCATION (LINEMAPS_LAST_MACRO_MAP (set))
: MAX_LOCATION_T + 1;
}
In Ada, LINEMAPS_MACRO_USED is false so LINEMAPS_MACRO_LOWEST_LOCATION is
MAX_LOCATION_T + 1, but IS_MACRO_LOC nevertheless returns true for anything
in the range [LINE_MAP_MAX_LOCATION; MAX_LOCATION_T], thus yielding an ICE
in linemap_macro_map_lookup for very large files.
libcpp/
* include/line-map.h (IS_MACRO_LOC): Delete.
* line-map.c (linemap_location_from_macro_expansion_p): Test
LINEMAPS_MACRO_LOWEST_LOCATION of the linemap.
gcc/cp/
* module.cc (ordinary_loc_of): Test LINEMAPS_MACRO_LOWEST_LOCATION
of the linemap.
(module_state::write_location): Likewise.
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are lost [PR99648]
Similarly to PR95450 done on GIMPLE, this patch punts if we try to
simplify_{gen_,}subreg from some constant into the IBM double double
IFmode (or sometimes TFmode) if the double double format wouldn't preserve
the bits. Not all values are valid in IBM double double, e.g. the format
requires that the upper double is the whole value rounded to double, and
if in some cases such as in the pr71522.c testcase with -m32 -Os -mcpu=power7
some non-floating data is copied through long double variable, we can
simplify a subreg into something that has different value.
Fixed by punting if the planned simplify_immed_subreg result doesn't
encode to bitwise identical values compared to what we were decoding.
As for the simplify_gen_subreg change, I think it would be desirable
to just avoid creating SUBREGs of constants on all targets and for all
constants, if simplify_immed_subreg simplified, fine, otherwise punt,
but as we are late in GCC11 development, the patch instead guards this
behavior on MODE_COMPOSITE_P (outermode) - i.e. only conversions to
powerpc{,64,64le} double double long double - and only for the cases where
simplify_immed_subreg was called.
2021-04-13 Jakub Jelinek <jakub@redhat.com>
PR target/99648
* simplify-rtx.c (simplify_immed_subreg): For MODE_COMPOSITE_P
outermode, return NULL if the result doesn't encode back to the
original byte sequence.
(simplify_gen_subreg): Don't create SUBREGs from constants to
MODE_COMPOSITE_P outermode.
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do_class_deduction handles specially the case where we're deducing one
placeholder from another equivalent one, but here the initializer passed
to do_class_deduction is wrapped in an EXPR_PACK_EXPANSION (we're being
called from unify during get_partial_spec_bindings). This patch makes
do_class_deduction look through EXPR_PACK_EXPANSIONs so that we detect
this case as well.
gcc/cp/ChangeLog:
PR c++/97134
* pt.c (do_class_deduction): Look through EXPR_PACK_EXPANSION
when checking if the initializer is an equivalent class
placeholder template parameter.
gcc/testsuite/ChangeLog:
PR c++/97134
* g++.dg/cpp2a/nontype-class43.C: New test.
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According to [temp.concept]/6 and [temp.pre]/9, a concept definition and
a requires clause are both unevaluated contexts, and hence satisfaction
deals only with unevaluated operands, so we should set cp_unevaluated in
these three situations.
gcc/cp/ChangeLog:
PR c++/99961
PR c++/99994
* constraint.cc (satisfy_normalized_constraints): Set
cp_unevaluated.
* parser.c (cp_parser_concept_definition): Likewise.
(cp_parser_requires_clause_opt): Likewise.
gcc/testsuite/ChangeLog:
PR c++/99961
PR c++/99994
* g++.dg/cpp2a/concepts-uneval1.C: New test.
* g++.dg/cpp2a/concepts-uneval2.C: New test.
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See PR99212. Now, cris-elf isn't the only target for which this line
shows a failure; pru-unknown-elf and m68k-unknown-linux-gnu are two
others. I'll leave adjustments to the respective maintainers, but
trivially appending more triplets should work: no extra bracketing needed.
A specific effective_target specifier would as always be perferable, but I
couldn't without accountable effort find out what was the common factor.
Besides cris-elf, sanity-checked for native x86_64-*-linux*.
gcc/testsuite:
PR analyzer/99212
* gcc.dg/analyzer/data-model-1.c (test_45): Inverse xfail at
line 971 for cris-*-*.
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gimple.h has this comment for gimple's uid field:
/* UID of this statement. This is used by passes that want to
assign IDs to statements. It must be assigned and used by each
pass. By default it should be assumed to contain garbage. */
unsigned uid;
and gimple_set_uid has:
Please note that this UID property is supposed to be undefined at
pass boundaries. This means that a given pass should not assume it
contains any useful value when the pass starts and thus can set it
to any value it sees fit.
which suggests that any pass can use the uid field as an arbitrary
scratch space.
PR analyzer/98599 reports a case where this error occurs in LTO mode:
fatal error: Cgraph edge statement index out of range
on certain inputs with -fanalyzer.
The error occurs in the LTRANS phase after -fanalyzer runs in the
WPA phase. The analyzer pass writes to the uid fields of all stmts.
The error occurs when LTRANS is streaming callgraph edges back in.
The LTO format uses stmt uids to associate call stmts with callgraph
edges between WPA and LTRANS.
For example, in lto-cgraph.c, lto_output_edge writes out the
gimple_uid, and input_edge reads it back in.
lto_prepare_function_for_streaming has code to renumber the stmt UIDs
when the code is streamed back out, but for some reason this isn't
called for clones:
307 /* Do body modifications needed for streaming before we fork out
308 worker processes. */
309 FOR_EACH_FUNCTION_WITH_GIMPLE_BODY (node)
310 if (!node->clone_of && gimple_has_body_p (node->decl))
311 lto_prepare_function_for_streaming (node);
Hence the combination of -fanalyzer and -flto will fail in LTRANS's
stream-in if any function clones are encountered.
It's not fully clear to me why this isn't done for clones, and what the
correct fix should be to allow arbitrary changes to uids within WPA
passes.
In the meantime, this patch works around the issue by updating the
analyzer to save and restore the UIDs, fixing the error.
gcc/analyzer/ChangeLog:
PR analyzer/98599
* supergraph.cc (saved_uids::make_uid_unique): New.
(saved_uids::restore_uids): New.
(supergraph::supergraph): Replace assignments to stmt->uid with
calls to m_stmt_uids.make_uid_unique.
(supergraph::~supergraph): New.
* supergraph.h (class saved_uids): New.
(supergraph::~supergraph): New decl.
(supergraph::m_stmt_uids): New field.
gcc/testsuite/ChangeLog:
PR analyzer/98599
* gcc.dg/analyzer/pr98599-a.c: New test.
* gcc.dg/analyzer/pr98599-b.c: New test.
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The following testcase is miscompiled on x86_64-linux.
expand_compound_operation is called on
(zero_extract:DI (mem/c:TI (reg/f:DI 16 argp) [3 i+0 S16 A128])
(const_int 16 [0x10])
(const_int 63 [0x3f]))
so mode is DImode, inner_mode is TImode, pos 63, len 16 and modewidth 64.
A couple of lines above the problematic spot we have:
if (modewidth >= pos + len)
{
tem = gen_lowpart (mode, XEXP (x, 0));
where the code uses gen_lowpart and then shift left/right to extract it
in mode. But the guarding condition is false - 64 >= 63 + 16
and so we enter the next condition, where the code shifts XEXP (x, 0)
right by pos and then adds AND. It does so incorrectly though.
Given the modewidth < pos + len, inner_mode must be necessarily larger
than mode and XEXP (x, 0) has the innermode, but it was calling
simplify_shift_const with mode rather than inner_mode, which meant
inconsistent arguments to simplify_shift_const and in this case made
a DImode MEM shift out of it.
The following patch fixes it, by doing the shift in inner_mode properly
and then after the shift doing the lowpart subreg and masking already
in mode.
2021-04-13 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/99905
* combine.c (expand_compound_operation): If pos + len > modewidth,
perform the right shift by pos in inner_mode and then convert to mode,
instead of trying to simplify a shift of rtx with inner_mode by pos
as if it was a shift in mode.
* gcc.target/i386/pr99905.c: New test.
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Here is an alternate patch for the PR99830 bug.
As discussed on IRC and in the PR, the reason why a (clobber:TI (const_int 0))
has been propagated into the debug insns is that it got optimized away
during simplification from the i3 instruction pattern.
And that happened because
simplify_and_const_int_1 (SImode, varop, 255)
with varop of
(ashift:SI (subreg:SI (and:TI (clobber:TI (const_int 0 [0]))
(const_int 255 [0xff])) 0)
(const_int 16 [0x10]))
was called and through nonzero_bits determined that (whatever << 16) & 255
is const0_rtx.
It is, but if there are side-effects in varop and such clobbers are
considered as such, we shouldn't optimize those away.
2021-04-13 Jakub Jelinek <jakub@redhat.com>
PR debug/99830
* combine.c (simplify_and_const_int_1): Don't optimize varop
away if it has side-effects.
* gcc.dg/pr99830.c: New test.
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Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/309490
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We can't resolve the call to foo<42> before instantiation of G, because the
template parameter of #1 has dependent type. But we were missing that in
our dependency check, because the tree walk of DECL_TEMPLATE_PARMS doesn't
look into the types of template parameters. So look at them directly.
gcc/cp/ChangeLog:
PR c++/93085
* pt.c (uses_outer_template_parms): Handle non-type and template
template parameters specifically.
gcc/testsuite/ChangeLog:
PR c++/93085
* g++.dg/template/dependent-tmpl1.C: New test.
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* sv.po: Update.
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gcc/ChangeLog:
* doc/extend.texi: Escape @smallexample content.
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gcc/ChangeLog:
* config/s390/s390.md ("*movdi_31", "*movdi_64"): Add
alternative in order to load a DFP zero.
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gcc/ChangeLog:
* doc/extend.texi: Be more precise in documentation
of symver attribute.
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gcc/ChangeLog:
PR sanitizer/99877
* gimplify.c (gimplify_expr): Right now, we unpoison all
variables before a goto <dest>. We should not do it if we are
in a omp context.
gcc/testsuite/ChangeLog:
PR sanitizer/99877
* g++.dg/asan/pr99877.C: New test.
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gcc/
* common/config/i386/cpuinfo.h (get_intel_cpu): Handle
rocketlake.
* common/config/i386/i386-common.c (processor_names): Add
rocketlake.
(processor_alias_table): Add rocketlake.
* common/config/i386/i386-cpuinfo.h (processor_subtypes): Add
INTEL_COREI7_ROCKETLAKE.
* config.gcc: Add -march=rocketlake.
* config/i386/i386-c.c (ix86_target_macros_internal): Handle
rocketlake.
* config/i386/i386-options.c (m_ROCKETLAKE) : Define.
(processor_cost_table): Add rocketlake cost.
* config/i386/i386.h (ix86_size_cost) : Define
TARGET_ROCKETLAKE.
(processor_type) : Add PROCESSOR_ROCKETLAKE.
(PTA_ROCKETLAKE): Ditto.
* doc/extend.texi: Add rocketlake.
* doc/invoke.texi: Add rocketlake.
gcc/testsuite/
* gcc.target/i386/funcspec-56.inc: Handle new march.
* g++.target/i386/mv16.C: Handle new march
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Alder Lake Intel Hybrid Technology will not support Intel® AVX-512. ISA
features such as Intel® AVX, AVX-VNNI, Intel® AVX2, and UMONITOR/UMWAIT/TPAUSE
are supported.
gcc/ChangeLog
* config/i386/i386.h (PTA_ALDERLAKE): Change alderlake ISA list.
* config/i386/i386-options.c (m_CORE_AVX2): Add m_ALDERLAKE.
* common/config/i386/cpuinfo.h (get_intel_cpu): Add AlderLake model.
* doc/invoke.texi: Change alderlake ISA list.
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We have seen an ICE both on trunk and devel/omp/gcc-10 branches which can
be reprodued with this simple testcase. It occurs if an OpenACC loop has
a collapse clause and any of the loop being collapsed uses GT or GE
condition. This issue is specific to OpenACC.
int main (void)
{
int ix, iy;
int dim_x = 16, dim_y = 16;
{
for (iy = dim_y - 1; iy > 0; --iy)
for (ix = dim_x - 1; ix > 0; --ix)
;
}
}
The problem is caused by a failing assertion in expand_oacc_collapse_init.
It checks that cond_code for fd->loop should be same as cond_code for all
the loops that are being collapsed. As the cond_code for fd->loop is
LT_EXPR with collapse clause (set at the end of omp_extract_for_data),
this assertion forces that all the loop in collapse clause should use
< operator.
There does not seem to be anything in the code which demands this
condition as loop with > condition works ok otherwise. I digged old
mailing list a bit but could not find any discussion on this change.
Looking at the code, expand_oacc_for checks that fd->loop->cond_code is
either LT_EXPR or GT_EXPR. I guess the original intention was to have
similar checks on the loop which are being collapsed. But the way check
was written does not acheive that.
I have fixed it by modifying the check in the assertion to be same as
check on fd->loop->cond_code.
I tested goacc and libgomp (with nvptx offloading) and did not see any
regression. I have added new tests to check collapse with GT/GE condition.
PR middle-end/98088
gcc/
* omp-expand.c (expand_oacc_collapse_init): Update condition in
a gcc_assert.
gcc/testsuite/
* c-c++-common/goacc/collapse-2.c: New.
libgomp/
* testsuite/libgomp.oacc-c-c++-common/collapse-2.c: Add check
for loop with GT/GE condition.
* testsuite/libgomp.oacc-c-c++-common/collapse-3.c: Likewise.
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gcc/ada/
* gnat_ugn.texi (Top): Avoid invalid "up" link.
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Here lookup got confused by finding a conversion operator from
lookup_anon_field. Let's avoid this by pruning functions from
CLASSTYPE_MEMBER_VEC as well as TYPE_FIELDS.
gcc/cp/ChangeLog:
PR c++/97974
* decl.c (fixup_anonymous_aggr): Prune all functions from
CLASSTYPE_MEMBER_VEC.
gcc/testsuite/ChangeLog:
PR c++/97974
* g++.dg/lookup/pr84962.C: Adjust diagnostic.
* g++.dg/other/anon-union5.C: New test.
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Here instantiation of the fake 'this' parameter we used when parsing the
trailing return type of func() was failing because there is no actual 'this'
parameter in the instantiation. For PR97399 I told Patrick to do the 'this'
injection even for statics, but now I think I was wrong; the out-of-class
definition case I was concerned about does not break with this patch. And
we don't set current_class_ptr in the body of a static member function.
And the OMP code should continue to parse 'this' and complain about it
rather than give a syntax error.
gcc/cp/ChangeLog:
PR c++/98800
PR c++/97399
* parser.c (cp_parser_direct_declarator): Don't
inject_this_parameter if static_p.
(cp_parser_omp_var_list_no_open): Parse 'this' even if
current_class_ptr isn't set for a better diagnostic.
gcc/testsuite/ChangeLog:
PR c++/98800
* g++.dg/gomp/this-1.C: Adjust diagnostic.
* g++.dg/cpp0x/constexpr-this1.C: New test.
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gcc/analyzer/ChangeLog:
PR analyzer/100011
* region-model.cc (region_model::on_assignment): Avoid NULL
dereference if ctxt is NULL when assigning from a STRING_CST.
gcc/testsuite/ChangeLog:
PR analyzer/100011
* gcc.dg/analyzer/pr100011.c: New test.
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The following testcase ICEs during error recovery, because finish_decl
overwrites TREE_TYPE (error_mark_node), which better should stay always
to be error_mark_node.
2021-04-10 Jakub Jelinek <jakub@redhat.com>
PR c/99990
* c-decl.c (finish_decl): Don't overwrite TREE_TYPE of
error_mark_node.
* gcc.dg/pr99990.c: New test.
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D front-end changes:
- Fix ICE in forward referenced type members of structs.
- Fix ICE passing a member template mixin identifier as alias argument.
- Fix ICE when `__traits' prints error involving a Parameter.
- Fix bugs found in `__traits(allMembers)' returning wrong result.
- Detect and shortcut Alias and AliasSeq template patterns.
Reviewed-on: https://github.com/dlang/dmd/pull/12405
https://github.com/dlang/dmd/pull/12411
gcc/d/ChangeLog:
* dmd/MERGE: Merge upstream dmd 0450061c8.
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Define _serialize as macro for callers with general-regs-only target
attribute to avoid inline failure with always_inline attribute.
gcc/
PR target/99744
* config/i386/serializeintrin.h (_serialize): Defined as macro.
gcc/testsuite/
PR target/99744
* gcc.target/i386/pr99744-2.c: New test.
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The gimplifier optimizes away COMPOUND_LITERAL_EXPRs, but they can remain
in the form of ADDR_EXPR of COMPOUND_LITERAL_EXPRs in static initializers.
By the TREE_STATIC check I meant to check that the underlying decl of
the compound literal is a global rather than automatic variable which
obviously can't be referenced in static initializers, but unfortunately
with LTO it might end up in another partition and thus be DECL_EXTERNAL
instead.
2021-04-10 Jakub Jelinek <jakub@redhat.com>
PR lto/99849
* expr.c (expand_expr_addr_expr_1): Test is_global_var rather than
just TREE_STATIC on COMPOUND_LITERAL_EXPR_DECLs.
* gcc.dg/lto/pr99849_0.c: New test.
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This PR is about a -W*uninitialized warning on riscv64.
alloca_type_and_limit is documented to have limit member only defined
when type is ALLOCA_BOUND_MAYBE_LARGE or ALLOCA_BOUND_DEFINITELY_LARGE
and otherwise just default constructs limit, which for wide_int means
no initialization at all. IMHO it is fine not to use the limit
member otherwise, but trying to not initialize it when it can be e.g.
copied around and then invoke UB doesn't look like a good idea.
2021-04-10 Jakub Jelinek <jakub@redhat.com>
PR middle-end/99989
* gimple-ssa-warn-alloca.c
(alloca_type_and_limit::alloca_type_and_limit): Initialize limit to
0 with integer precision unconditionally.
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This is a sequel to the PR85022 changes, inline-asm can (unfortunately)
introduce VOIDmode MEMs and in PR85022 they have been changed so that
we don't pretend we know their size (as opposed to assuming they have
zero size).
This time we ICE in rtx_addr_can_trap_p_1 because it assumes that
all memory but BLKmode has known size. The patch just treats VOIDmode
MEMs like BLKmode in that regard. And, the STRICT_ALIGNMENT change
is needed because VOIDmode has GET_MODE_SIZE of 0 and we don't want to
check if something is a multiple of 0.
2021-04-10 Jakub Jelinek <jakub@redhat.com>
PR rtl-optimization/98601
* rtlanal.c (rtx_addr_can_trap_p_1): Allow in assert unknown size
not just for BLKmode, but also for VOIDmode. For STRICT_ALIGNMENT
unaligned_mems handle VOIDmode like BLKmode.
* gcc.dg/torture/pr98601.c: New test.
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gcc/ChangeLog:
2021-04-10 Jan Hubicka <hubicka@ucw.cz>
PR lto/99857
* tree.c (free_lang_data_in_decl): Do not release body of
declare_variant_alt.
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alias_ctad_tweaks was expecting that all deduction guides for the class
would be suitable for deduction from the alias definition; in this case, the
deduction guide uses 'true' and the alias B uses 'false', so deduction
fails. But that's OK, we just don't use that deduction guide. I also
noticed that we were giving up on deduction entirely if substitution failed
for some guide; we should only give up on that particular deduction guide.
We ought to give a better diagnostic about this case when deduction fails,
but that can wait.
gcc/cp/ChangeLog:
PR c++/99180
PR c++/93295
PR c++/93867
PR c++/99118
PR c++/96873
* pt.c (alias_ctad_tweaks): Handle failure better.
gcc/testsuite/ChangeLog:
PR c++/99180
PR c++/93295
PR c++/93867
PR c++/95486
* g++.dg/cpp2a/class-deduction-alias5.C: New test.
* g++.dg/cpp2a/class-deduction-alias6.C: New test.
* g++.dg/cpp2a/class-deduction-alias7.C: New test.
* g++.dg/cpp2a/class-deduction-alias8.C: New test.
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Normally cp_parser_base_clause prevents unexpanded packs, but in a lambda
check_for_bare_parameter_packs allows it. Then we weren't finding the
pack when scanning the lambda body.
This doesn't fix a valid variant like
template <class... Ts> void sink (Ts&&...);
template <class... Ts>
void f() {
sink ([] { struct S : Ts { }; }...);
}
int main() {
f<int>();
}
but that's a much bigger project.
gcc/cp/ChangeLog:
PR c++/100006
* pt.c (find_parameter_packs_r) [TAG_DEFN]: Look into bases.
gcc/testsuite/ChangeLog:
PR c++/100006
* g++.dg/cpp0x/lambda/lambda-variadic13.C: New test.
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A TEMPLATE_INFO is a natural fit for what LAMBDA_EXPR_REGENERATED_FROM
and LAMBDA_EXPR_REGENERATING_TARGS hold, so let's use it instead.
gcc/cp/ChangeLog:
* cp-tree.h (LAMBDA_EXPR_REGENERATED_FROM)
(LAMBDA_EXPR_REGENERATING_TARGS): Replace these with ...
(LAMBDA_EXPR_REGEN_INFO): ... this.
(tree_lambda_expr::regenerated_from)
(tree_lambda_expr::regenerating_targs): Replace these with ...
(tree_lambda_expr::regen_info): ... this.
* constraint.cc (satisfy_declaration_constraints): Adjust
accordingly.
* lambda.c (build_lambda_expr): Likewise.
* pt.c (regenerated_lambda_fn_p): Likewise.
(most_general_lambda): Likewise.
(tsubst_lambda_expr): Likewise.
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warnings
gcc/testsuite/ChangeLog:
PR middle-end/55288
* g++.dg/warn/uninit-pr55288.C: New test.
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If a toolchain is configured with --with-cpu=X and gcc is
then run with an explicit -march=Y option, we ignore the
X cpu setting and tune for generic Y code:
if (!selected_cpu)
{
if (selected_arch)
{
------> selected_cpu = &all_cores[selected_arch->ident];
aarch64_isa_flags = arch_isa;
explicit_arch = selected_arch->arch;
}
else
{
/* Get default configure-time CPU. */
selected_cpu = aarch64_get_tune_cpu (aarch64_none);
aarch64_isa_flags = TARGET_CPU_DEFAULT >> 6;
}
if (selected_tune)
explicit_tune_core = selected_tune->ident;
}
…
if (!selected_tune)
selected_tune = selected_cpu;
But after a push/pop_options pair, we simply did:
selected_tune = aarch64_get_tune_cpu (ptr->x_explicit_tune_core);
In the above scenario, ptr->x_explicit_tune_core is aarch64_none,
so we fall back on the default configure-time CPU. This means
that before the push_options we tuned for generic Y but after
the pop_options we tuned for X.
This was picked up by an assertion failure in cl_optimization_compare.
The ICE itself is a GCC 11 regression, but the problem that it shows
up is much older.
gcc/
* config/aarch64/aarch64.c (aarch64_option_restore): If the
architecture was specified explicitly and the tuning wasn't,
tune for the architecture rather than the configured default CPU.
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We accept this testcase after r11-7985.
gcc/testsuite/ChangeLog:
PR c++/90215
* g++.dg/cpp1z/fold-lambda4.C: New test.
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When we have a member function with auto parameter like this:
struct S {
void f(auto);
};
cp_parser_member_declaration -> grokfield produces a FUNCTION_DECL
"void S::foo(auto:1)", and then finish_fully_implicit_template turns
that FUNCTION_DECL into a TEMPLATE_DECL. The bug here is that we only
call cp_parser_save_default_args for a FUNCTION_DECL. As a consequence,
abbrev10.C is rejected because we complain that the default argument has
not been defined, and abbrev11.C ICEs, because we don't re-parse the
delayed noexcept, so the DEFERRED_PARSE tree leaks into tsubst* where we
crash. This patch fixes both issues.
gcc/cp/ChangeLog:
PR c++/99806
* parser.c (cp_parser_member_declaration): Call
cp_parser_save_default_args even for function templates. Use
STRIP_TEMPLATE on the declaration we're passing.
gcc/testsuite/ChangeLog:
PR c++/99806
* g++.dg/concepts/abbrev10.C: New test.
* g++.dg/concepts/abbrev11.C: New test.
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Not all hosts can link static executables. It depends on which
development libraries are installed.
gcc/testsuite/
* gcc.target/aarch64/pr70398.c: Require a target that can link
static executables.
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These tests are passing on all my runs, and it looks like
they are for Christophe's runs too. We can reapply with a
tighter target selector if this is still a problem for some
configurations.
gcc/testsuite/
* g++.target/aarch64/bfloat_cpp_typecheck.C: Remove XFAILs.
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With SVE we can vectorise an additional loop. (Well, more really,
since the count doesn't include epilogue loops for SVE.)
gcc/testsuite/
* gfortran.dg/vect/vect-8.f90: Expect 24 loops to be vectorized
with SVE.
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This patch adds XFAILs for some tests that fail with variable-length
vectors.
For pr96573.c I'd wondered about instead extending the regexp.
The code we generate isn't very good though, so it doesn't seem
worth matching. (Fixing the bad code is on the todo list.)
gcc/testsuite/
* g++.dg/tree-ssa/pr83518.C: XFAIL for vect_variable_length.
* gcc.dg/pr96573.c: Likewise.
* gcc.dg/tree-ssa/pr84512.c: Likewise.
* gcc.dg/vect/bb-slp-43.c: Likewise.
* gcc.dg/vect/slp-reduc-11.c: Likewise.
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This test was failing on aarch64 targets because we inlined the
test function into main, making it vectorisable.
gcc/testsuite/
* gcc.dg/vect/pr65947-7.c: Add a noipa attribute. Expect the
loop to vectorized if vect_fold_extract_last.
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mem-shift-canonical.c started failing after the fix for PR97684.
We used to generate things like:
add x7, x1, x5, lsl 2 // 54 [c=4 l=4] *add_lsl_di
ld1 {v0.s}[1], [x7] // 18 [c=4 l=4] aarch64_simd_vec_setv4si/2
where the add_lsl_di was generated by LRA. After PR97684 we generate:
ldr s1, [x1, x5, lsl 2] // 17 [c=4 l=4] *zero_extendsidi2_aarch64/3
ins v0.s[1], v1.s[0] // 18 [c=4 l=4] aarch64_simd_vec_setv4si/0
Which one is better is an interesting question. However, it was really
only a fluke that we generated the original code. The pseudo that
becomes s1 in the new code above has a REG_EQUIV note:
(insn 17 16 18 3 (set (reg:SI 111 [ MEM[(int *)b_25(D) + ivtmp.9_30 * 4] ])
(mem:SI (plus:DI (mult:DI (reg:DI 101 [ ivtmp.9 ])
(const_int 4 [0x4]))
(reg/v/f:DI 105 [ b ])) [2 MEM[(int *)b_25(D) + ivtmp.9_30 * 4]+0 S4 A32])) "gcc/testsuite/gcc.target/aarch64/mem-shift-canonical.c":21:18 52 {*movsi_aarch64}
(expr_list:REG_EQUIV (mem:SI (plus:DI (mult:DI (reg:DI 101 [ ivtmp.9 ])
(const_int 4 [0x4]))
(reg/v/f:DI 105 [ b ])) [2 MEM[(int *)b_25(D) + ivtmp.9_30 * 4]+0 S4 A32])
(nil)))
(insn 18 17 19 3 (set (reg:V4SI 109 [ MEM[(int *)a_23(D) + ivtmp.9_30 * 4] ])
(vec_merge:V4SI (vec_duplicate:V4SI (reg:SI 111 [ MEM[(int *)b_25(D) + ivtmp.9_30 * 4] ]))
(subreg:V4SI (reg:SI 110 [ MEM[(int *)a_23(D) + ivtmp.9_30 * 4] ]) 0)
(const_int 2 [0x2]))) "gcc/testsuite/gcc.target/aarch64/mem-shift-canonical.c":21:18 1683 {aarch64_simd_vec_setv4si}
(expr_list:REG_DEAD (reg:SI 111 [ MEM[(int *)b_25(D) + ivtmp.9_30 * 4] ])
(expr_list:REG_DEAD (reg:SI 110 [ MEM[(int *)a_23(D) + ivtmp.9_30 * 4] ])
(nil))))
Before the PR, IRA didn't allocate a register to r111 and so LRA
rematerialised the REG_EQUIV note inside insn 18, leading to the
reload. Now IRA allocates a register instead.
So I think this is working as expected, in the sense that IRA is now
doing what the backend asked it to do. If the backend prefers the first
version (and it might not), it needs to do more than it's currently
doing to promote the use of lane loads. E.g. it should probably have a
combine define_split that splits the combination of insn 17 and insn 18
into an ADD + an LD1.
I think for now the best thing is to use a different approach to
triggering the original bug. The asm in the new test ICEs with the
r11-2903 LRA patch reverted and passes with it applied.
gcc/testsuite/
* gcc.target/aarch64/mem-shift-canonical.c: Use an asm instead
of relying on vectorisation.
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This patch XFAILs the remaining regressions in PR87763. We should
still fix them at some point, but that's not GCC 11 material.
gcc/testsuite/
PR target/87763
* gcc.target/aarch64/insv_1.c: XFAIL two scan tests.
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For the reasons discussed in PR78314, ieee_support_halting
doesn't work correctly for arm* and aarch64*. I think the
easiest thing is to skip these tests until the PR is fixed.
This doesn't mean that the PR is unimportant. It just doesn't
seem useful to have the unpredictable failures described in the
PR trail given that the problem is known and has been analysed.
gcc/testsuite/
PR libfortran/78314
* gfortran.dg/ieee/ieee_6.f90: Skip for arm* and aarch64*.
* gfortran.dg/ieee/ieee_8.f90: Likewise.
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