aboutsummaryrefslogtreecommitdiff
path: root/gcc
AgeCommit message (Collapse)AuthorFilesLines
2021-08-17Do not enable DT_INIT_ARRAY/DT_FINI_ARRAY on uclinuxfdpiceabiChristophe Lyon1-2/+8
Commit r12-1328 enabled DT_INIT_ARRAY/DT_FINI_ARRAY for all Linux targets, but this does not work for arm-none-uclinuxfdpiceabi: it makes all the execution tests fail. This patch restores the original behavior for uclinuxfdpiceabi. 2021-08-12 Christophe Lyon <christophe.lyon@foss.st.com> gcc/ PR target/100896 * config.gcc (gcc_cv_initfini_array): Leave undefined for uclinuxfdpiceabi targets.
2021-08-17retain debug stmt order when moving to successorsAlexandre Oliva1-2/+2
We iterate over debug stmts from the last one in new_bb, and we insert them before the first post-label stmt in each dest block, without moving the insertion iterator, so they end up reversed. Moving the insertion iterator fixes this. for gcc/ChangeLog * tree-inline.c (maybe_move_debug_stmts_to_successors): Don't reverse debug stmts.
2021-08-17don't access cfun in dump_function_to_fileAlexandre Oliva1-5/+5
dump_function_to_file takes the function to dump as a parameter, and parts of it use the local fun variable where cfun would be used elsewhere. Others use cfun, presumably in error. Fixed to use fun uniformly. Added a few more tests for non-NULL fun before dereferencing it. for gcc/ChangeLog * tree-cfg.c (dump_function_to_file): Use fun, not cfun.
2021-08-17aarch64: Remove macros for vld4[q]_lane Neon intrinsicsJonathan Wright1-104/+624
Remove macros for vld4[q]_lane Neon intrinsics. This is a preparatory step before adding new modes for structures of Advanced SIMD vectors. gcc/ChangeLog: 2021-08-16 Jonathan Wright <jonathan.wright@arm.com> * config/aarch64/arm_neon.h (__LD4_LANE_FUNC): Delete. (__LD4Q_LANE_FUNC): Likewise. (vld4_lane_u8): Define without macro. (vld4_lane_u16): Likewise. (vld4_lane_u32): Likewise. (vld4_lane_u64): Likewise. (vld4_lane_s8): Likewise. (vld4_lane_s16): Likewise. (vld4_lane_s32): Likewise. (vld4_lane_s64): Likewise. (vld4_lane_f16): Likewise. (vld4_lane_f32): Likewise. (vld4_lane_f64): Likewise. (vld4_lane_p8): Likewise. (vld4_lane_p16): Likewise. (vld4_lane_p64): Likewise. (vld4q_lane_u8): Likewise. (vld4q_lane_u16): Likewise. (vld4q_lane_u32): Likewise. (vld4q_lane_u64): Likewise. (vld4q_lane_s8): Likewise. (vld4q_lane_s16): Likewise. (vld4q_lane_s32): Likewise. (vld4q_lane_s64): Likewise. (vld4q_lane_f16): Likewise. (vld4q_lane_f32): Likewise. (vld4q_lane_f64): Likewise. (vld4q_lane_p8): Likewise. (vld4q_lane_p16): Likewise. (vld4q_lane_p64): Likewise. (vld4_lane_bf16): Likewise. (vld4q_lane_bf16): Likewise.
2021-08-17aarch64: Remove macros for vld3[q]_lane Neon intrinsicsJonathan Wright1-92/+549
Remove macros for vld3[q]_lane Neon intrinsics. This is a preparatory step before adding new modes for structures of Advanced SIMD vectors. gcc/ChangeLog: 2021-08-16 Jonathan Wright <jonathan.wright@arm.com> * config/aarch64/arm_neon.h (__LD3_LANE_FUNC): Delete. (__LD3Q_LANE_FUNC): Delete. (vld3_lane_u8): Define without macro. (vld3_lane_u16): Likewise. (vld3_lane_u32): Likewise. (vld3_lane_u64): Likewise. (vld3_lane_s8): Likewise. (vld3_lane_s16): Likewise. (vld3_lane_s32): Likewise. (vld3_lane_s64): Likewise. (vld3_lane_f16): Likewise. (vld3_lane_f32): Likewise. (vld3_lane_f64): Likewise. (vld3_lane_p8): Likewise. (vld3_lane_p16): Likewise. (vld3_lane_p64): Likewise. (vld3q_lane_u8): Likewise. (vld3q_lane_u16): Likewise. (vld3q_lane_u32): Likewise. (vld3q_lane_u64): Likewise. (vld3q_lane_s8): Likewise. (vld3q_lane_s16): Likewise. (vld3q_lane_s32): Likewise. (vld3q_lane_s64): Likewise. (vld3q_lane_f16): Likewise. (vld3q_lane_f32): Likewise. (vld3q_lane_f64): Likewise. (vld3q_lane_p8): Likewise. (vld3q_lane_p16): Likewise. (vld3q_lane_p64): Likewise. (vld3_lane_bf16): Likewise. (vld3q_lane_bf16): Likewise.
2021-08-17aarch64: Remove macros for vld2[q]_lane Neon intrinsicsJonathan Wright1-84/+474
Remove macros for vld2[q]_lane Neon intrinsics. This is a preparatory step before adding new modes for structures of Advanced SIMD vectors. gcc/ChangeLog: 2021-08-12 Jonathan Wright <jonathan.wright@arm.com> * config/aarch64/arm_neon.h (__LD2_LANE_FUNC): Delete. (__LD2Q_LANE_FUNC): Likewise. (vld2_lane_u8): Define without macro. (vld2_lane_u16): Likewise. (vld2_lane_u32): Likewise. (vld2_lane_u64): Likewise. (vld2_lane_s8): Likewise. (vld2_lane_s16): Likewise. (vld2_lane_s32): Likewise. (vld2_lane_s64): Likewise. (vld2_lane_f16): Likewise. (vld2_lane_f32): Likewise. (vld2_lane_f64): Likewise. (vld2_lane_p8): Likewise. (vld2_lane_p16): Likewise. (vld2_lane_p64): Likewise. (vld2q_lane_u8): Likewise. (vld2q_lane_u16): Likewise. (vld2q_lane_u32): Likewise. (vld2q_lane_u64): Likewise. (vld2q_lane_s8): Likewise. (vld2q_lane_s16): Likewise. (vld2q_lane_s32): Likewise. (vld2q_lane_s64): Likewise. (vld2q_lane_f16): Likewise. (vld2q_lane_f32): Likewise. (vld2q_lane_f64): Likewise. (vld2q_lane_p8): Likewise. (vld2q_lane_p16): Likewise. (vld2q_lane_p64): Likewise. (vld2_lane_bf16): Likewise. (vld2q_lane_bf16): Likewise.
2021-08-17Improve diff-ability of scheduler logsMaxim Kuvyrkov1-2/+4
* haifa-sched.c (advance_one_cycle): Output more context-synchronization lines for diff.
2021-08-17Add missing entry for rank_for_schedule stats.Maxim Kuvyrkov1-3/+3
* haifa-sched.c (enum rfs_decision, rfs_str): Add RFS_AUTOPREF. (rank_for_schedule): Use it.
2021-08-17Improve autoprefetcher heuristic (partly fix regression in PR91598)Maxim Kuvyrkov1-1/+8
PR rtl-optimization/91598 * haifa-sched.c (autopref_rank_for_schedule): Prioritize "irrelevant" insns after memory reads and before memory writes.
2021-08-17aarch64: Replace some uses of GET_CODE with RTL predicate macrosAlistair Lee2-14/+17
gcc/ 2021-08-17 Alistair_Lee <alistair.lee@arm.com> * rtl.h (CONST_VECTOR_P): New macro. * config/aarch64/aarch64.c (aarch64_get_sve_pred_bits): Use RTL code testing macros. (aarch64_ptrue_all_mode): Likewise. (aarch64_expand_mov_immediate): Likewise. (aarch64_const_vec_all_in_range_p): Likewise. (aarch64_rtx_costs): Likewise. (aarch64_legitimate_constant_p): Likewise. (aarch64_simd_valid_immediate): Likewise. (aarch64_simd_make_constant): Likewise. (aarch64_convert_mult_to_shift): Likewise. (aarch64_expand_sve_vec_perm): Likewise. (aarch64_vec_fpconst_pow_of_2): Likewise.
2021-08-17Special case -TYPE_MIN_VALUE for flag_wrapv in operator_abs::op1_range.Andrew MacLeod2-0/+34
With flag_wrapv, -TYPE_MIN_VALUE = TYPE_MIN_VALUE which is unrepresentable. We currently special case this in the ABS folding routine, but are missing similar treatment in operator_abs::op1_range. Tested on x86-64 Linux. PR tree-optimization/101938 gcc/ChangeLog: * range-op.cc (operator_abs::op1_range): Special case -TYPE_MIN_VALUE for flag_wrapv. gcc/testsuite/ChangeLog: * gcc.dg/pr101938.c: New test.
2021-08-17tree-optimization/101868 - avoid PRE of trapping mems across callsRichard Biener4-0/+75
This adds the testcase from the fix for the PR. 2021-08-17 Richard Biener <rguenther@suse.de> PR tree-optimization/101868 * gcc.dg/lto/pr101868_0.c: New testcase. * gcc.dg/lto/pr101868_1.c: Likewise. * gcc.dg/lto/pr101868_2.c: Likewise. * gcc.dg/lto/pr101868_3.c: Likewise.
2021-08-17vect: Add extraction cost for slp reducKewen Lin1-1/+3
As Richi pointed out, currently for BB reductions we don't actually build a SLP node with IFN_REDUC_* information, ideally we may end up with that eventually. For now, it's costed as shuffles and reduc operations, it misses the cost of lane extraction. This patch is to add one time of vec_to_scalar cost for lane extraction, it's to make the costings consistent and conservative for now. gcc/ChangeLog: * tree-vect-slp.c (vectorizable_bb_reduc_epilogue): Add the cost for value extraction.
2021-08-17openmp: Implement OpenMP 5.1 scope constructJakub Jelinek34-28/+608
This patch implements the OpenMP 5.1 scope construct, which is similar to worksharing constructs in many regards, but isn't one of them. The body of the construct is encountered by all threads though, it can be nested in itself or intermixed with taskgroup and worksharing etc. constructs can appear inside of it (but it can't be nested in worksharing etc. constructs). The main purpose of the construct is to allow reductions (normal and task ones) without the need to close the parallel and reopen another one. If it doesn't have task reductions, it can be implemented without any new library support, with nowait it just does the privatizations at the start if any and reductions before the end of the body, with without nowait emits a normal GOMP_barrier{,_cancel} at the end too. For task reductions, we need to ensure only one thread initializes the task reduction library data structures and other threads copy from that, so a new GOMP_scope_start routine is added to the library for that. It acts as if the start of the scope construct is a nowait worksharing construct (that is ok, it can't be nested in other worksharing constructs and all threads need to encounter the start in the same order) which does the task reduction initialization, but as the body can have other scope constructs and/or worksharing constructs, that is all where we use this dummy worksharing construct. With task reductions, the construct must not have nowait and ends with a GOMP_barrier{,_cancel}, followed by task reductions followed by GOMP_workshare_task_reduction_unregister. Only C/C++ FE support is done. 2021-08-17 Jakub Jelinek <jakub@redhat.com> gcc/ * tree.def (OMP_SCOPE): New tree code. * tree.h (OMP_SCOPE_BODY, OMP_SCOPE_CLAUSES): Define. * tree-nested.c (convert_nonlocal_reference_stmt, convert_local_reference_stmt, convert_gimple_call): Handle GIMPLE_OMP_SCOPE. * tree-pretty-print.c (dump_generic_node): Handle OMP_SCOPE. * gimple.def (GIMPLE_OMP_SCOPE): New gimple code. * gimple.c (gimple_build_omp_scope): New function. (gimple_copy): Handle GIMPLE_OMP_SCOPE. * gimple.h (gimple_build_omp_scope): Declare. (gimple_has_substatements): Handle GIMPLE_OMP_SCOPE. (gimple_omp_scope_clauses, gimple_omp_scope_clauses_ptr, gimple_omp_scope_set_clauses): New inline functions. (CASE_GIMPLE_OMP): Add GIMPLE_OMP_SCOPE. * gimple-pretty-print.c (dump_gimple_omp_scope): New function. (pp_gimple_stmt_1): Handle GIMPLE_OMP_SCOPE. * gimple-walk.c (walk_gimple_stmt): Likewise. * gimple-low.c (lower_stmt): Likewise. * gimplify.c (is_gimple_stmt): Handle OMP_MASTER. (gimplify_scan_omp_clauses): For task reductions, handle OMP_SCOPE like ORT_WORKSHARE constructs. Adjust diagnostics for %<scope%> allowing task reductions. Reject inscan reductions on scope. (omp_find_stores_stmt): Handle GIMPLE_OMP_SCOPE. (gimplify_omp_workshare, gimplify_expr): Handle OMP_SCOPE. * tree-inline.c (remap_gimple_stmt): Handle GIMPLE_OMP_SCOPE. (estimate_num_insns): Likewise. * omp-low.c (build_outer_var_ref): Look through GIMPLE_OMP_SCOPE contexts if var isn't privatized there. (check_omp_nesting_restrictions): Handle GIMPLE_OMP_SCOPE. (scan_omp_1_stmt): Likewise. (maybe_add_implicit_barrier_cancel): Look through outer scope constructs. (lower_omp_scope): New function. (lower_omp_task_reductions): Handle OMP_SCOPE. (lower_omp_1): Handle GIMPLE_OMP_SCOPE. (diagnose_sb_1, diagnose_sb_2): Likewise. * omp-expand.c (expand_omp_single): Support also GIMPLE_OMP_SCOPE. (expand_omp): Handle GIMPLE_OMP_SCOPE. (omp_make_gimple_edges): Likewise. * omp-builtins.def (BUILT_IN_GOMP_SCOPE_START): New built-in. gcc/c-family/ * c-pragma.h (enum pragma_kind): Add PRAGMA_OMP_SCOPE. * c-pragma.c (omp_pragmas): Add scope construct. * c-omp.c (omp_directives): Uncomment scope directive entry. gcc/c/ * c-parser.c (OMP_SCOPE_CLAUSE_MASK): Define. (c_parser_omp_scope): New function. (c_parser_omp_construct): Handle PRAGMA_OMP_SCOPE. gcc/cp/ * parser.c (OMP_SCOPE_CLAUSE_MASK): Define. (cp_parser_omp_scope): New function. (cp_parser_omp_construct, cp_parser_pragma): Handle PRAGMA_OMP_SCOPE. * pt.c (tsubst_expr): Handle OMP_SCOPE. gcc/testsuite/ * c-c++-common/gomp/nesting-2.c (foo): Add scope and masked construct tests. * c-c++-common/gomp/scan-1.c (f3): Add scope construct test.. * c-c++-common/gomp/cancel-1.c (f2): Add scope and masked construct tests. * c-c++-common/gomp/reduction-task-2.c (bar): Add scope construct test. Adjust diagnostics for the addition of scope. * c-c++-common/gomp/loop-1.c (f5): Add master, masked and scope construct tests. * c-c++-common/gomp/clause-dups-1.c (f1): Add scope construct test. * gcc.dg/gomp/nesting-1.c (f1, f2, f3): Add scope construct tests. * c-c++-common/gomp/scope-1.c: New test. * c-c++-common/gomp/scope-2.c: New test. * g++.dg/gomp/attrs-1.C (bar): Add scope construct tests. * g++.dg/gomp/attrs-2.C (bar): Likewise. * gfortran.dg/gomp/reduction4.f90: Adjust expected diagnostics. * gfortran.dg/gomp/reduction7.f90: Likewise. libgomp/ * Makefile.am (libgomp_la_SOURCES): Add scope.c * Makefile.in: Regenerated. * libgomp_g.h (GOMP_scope_start): Declare. * libgomp.map: Add GOMP_scope_start@@GOMP_5.1. * scope.c: New file. * testsuite/libgomp.c-c++-common/scope-1.c: New test. * testsuite/libgomp.c-c++-common/task-reduction-16.c: New test.
2021-08-17c++: Add C++20 #__VA_OPT__ supportJakub Jelinek2-0/+84
The following patch implements C++20 # __VA_OPT__ (...) support. Testcases cover what I came up with myself and what LLVM has for #__VA_OPT__ in its testsuite and the string literals are identical between the two compilers on the va-opt-5.c testcase. 2021-08-17 Jakub Jelinek <jakub@redhat.com> libcpp/ * macro.c (vaopt_state): Add m_stringify member. (vaopt_state::vaopt_state): Initialize it. (vaopt_state::update): Overwrite it. (vaopt_state::stringify): New method. (stringify_arg): Replace arg argument with first, count arguments and add va_opt argument. Use first instead of arg->first and count instead of arg->count, for va_opt add paste_tokens handling. (paste_tokens): Fix up len calculation. Don't spell rhs twice, instead use %.*s to supply lhs and rhs spelling lengths. Don't call _cpp_backup_tokens here. (paste_all_tokens): Call it here instead. (replace_args): Adjust stringify_arg caller. For vaopt_state::END if stringify is true handle __VA_OPT__ stringification. (create_iso_definition): Handle # __VA_OPT__ similarly to # macro_arg. gcc/testsuite/ * c-c++-common/cpp/va-opt-5.c: New test. * c-c++-common/cpp/va-opt-6.c: New test.
2021-08-17tree-optimization/101925 - fix VN with reverse storage orderRichard Biener2-1/+132
This fixes value-numbering breaking reverse storage order accesses due to a missed check. It adds a new overload for reverse_storage_order_for_component_p and sets reversed on the VN IL ops for component and array accesses accordingly. It also compares the reversed reference ops flag on reference lookup. 2021-08-16 Richard Biener <rguenther@suse.de> PR tree-optimization/101925 * tree-ssa-sccvn.c (copy_reference_ops_from_ref): Set reverse on COMPONENT_REF and ARRAY_REF according to what reverse_storage_order_for_component_p does. (vn_reference_eq): Compare reversed on reference ops. (reverse_storage_order_for_component_p): New overload. (vn_reference_lookup_3): Check reverse_storage_order_for_component_p on the reference looked up. * gcc.dg/sso-16.c: New testcase.
2021-08-16Improve SImode shifts for H8Jeff Law1-16/+53
Similar to the H8/300H patch, this improves SImode shifts for the H8/S. It's not as big a win on the H8/S since we can shift two positions at a time. But that also means that we can handle more residuals with minimal ode growth after a special shift-by-16 or shift-by-24 sequence. I think there's more to do here, but this seemed like as good a checkpoint as any. Tested without regressions. gcc/ * config/h8300/h8300.c (shift_alg_si): Avoid loops for most SImode shifts on the H8/S. (h8300_option_override): Use loops on H8/S more often when optimizing for size. (get_shift_alg): Handle new "special" cases on H8/S. Simplify accordingly. Handle various arithmetic right shifts with special sequences that we couldn't handle before.
2021-08-17Adjust testcase.liuhongt1-1/+1
This testcase is used to detect reuse of perm mask in the main loop, in epilog, vpermi2b can still be used, so add the option --param=vect-epilogues-nomask=0. gcc/testsuite/ChangeLog: * gcc.target/i386/pr82460-2.c: Adjust testcase by adding --param=vect-epilogues-nomask=0
2021-08-17Daily bump.GCC Administrator5-1/+188
2021-08-16Drop embeded stabs from rl78 portJeff Law1-1/+1
gcc/ * config.gcc (rl78-*-elf*): Do not include dbxelf.h.
2021-08-16gcov: Add TARGET_GCOV_TYPE_SIZE target hookSebastian Huber10-3/+52
If -fprofile-update=atomic is used, then the target must provide atomic operations for the counters of the type returned by get_gcov_type(). This is a 64-bit type for targets which have a 64-bit long long type. On 32-bit targets this could be an issue since they may not provide 64-bit atomic operations. Allow targets to override the default type size with the new TARGET_GCOV_TYPE_SIZE target hook. If a 32-bit gcov type size is used, then there is currently a warning in libgcov-driver.c in a dead code block due to sizeof (counter) == sizeof (gcov_unsigned_t): libgcc/libgcov-driver.c: In function 'dump_counter': libgcc/libgcov-driver.c:401:46: warning: right shift count >= width of type [-Wshift-count-overflow] 401 | dump_unsigned ((gcov_unsigned_t)(counter >> 32), dump_fn, arg); | ^~ gcc/c-family/ * c-cppbuiltin.c (c_cpp_builtins): Define __LIBGCC_GCOV_TYPE_SIZE if flag_building_libgcc is true. gcc/ * config/sparc/rtemself.h (SPARC_GCOV_TYPE_SIZE): Define. * config/sparc/sparc.c (sparc_gcov_type_size): New. (TARGET_GCOV_TYPE_SIZE): Redefine if SPARC_GCOV_TYPE_SIZE is defined. * coverage.c (get_gcov_type): Use targetm.gcov_type_size(). * doc/tm.texi (TARGET_GCOV_TYPE_SIZE): Add hook under "Misc". * doc/tm.texi.in: Regenerate. * target.def (gcov_type_size): New target hook. * targhooks.c (default_gcov_type_size): New. * targhooks.h (default_gcov_type_size): Declare. * tree-profile.c (gimple_gen_edge_profiler): Use precision of gcov_type_node. (gimple_gen_time_profiler): Likewise. libgcc/ * libgcov.h (gcov_type): Define using __LIBGCC_GCOV_TYPE_SIZE. (gcov_type_unsigned): Likewise.
2021-08-16Fix regression in debug info for Ada with DWARF 5Eric Botcazou1-0/+1
add_scalar_info can directly generate a reference to an existing DIE for a scalar attribute, e.g the upper bound of a VLA, but it does so only if this existing DIE has a location or is a constant: if (get_AT (decl_die, DW_AT_location) || get_AT (decl_die, DW_AT_data_member_location) || get_AT (decl_die, DW_AT_const_value)) Now, in DWARF 5, members of a structure that are bitfields no longer have a DW_AT_data_member_location but a DW_AT_data_bit_offset attribute instead, so the condition is bypassed. gcc/ * dwarf2out.c (add_scalar_info): Deal with DW_AT_data_bit_offset.
2021-08-16[OpenMP] Update omp-low.c's omp_runtime_api_call [PR101931]Tobias Burnus1-0/+10
gcc/ChangeLog: PR middle-end/101931 * omp-low.c (omp_runtime_api_call): Update for routines added in the meanwhile.
2021-08-16Speed up jump table switch detection.Martin Liska2-21/+35
PR tree-optimization/100393 gcc/ChangeLog: * tree-switch-conversion.c (group_cluster::dump): Use get_comparison_count. (jump_table_cluster::find_jump_tables): Pre-compute number of comparisons and then decrement it. Cache also max_ratio. (jump_table_cluster::can_be_handled): Change signature. * tree-switch-conversion.h (get_comparison_count): New.
2021-08-16Disable GNAT encodings by defaultEric Botcazou1-17/+15
Given the latest work in the compiler and debugger, we no longer need to use most GNAT-specific encodings in the debug info generated for an Ada program, so the attached patch disables them, except with -fgnat-encodings=all. gcc/ * dwarf2out.c (add_data_member_location_attribute): Use GNAT encodings only when -fgnat-encodings=all is specified. (add_bound_info): Likewise. (add_byte_size_attribute): Likewise. (gen_member_die): Likewise.
2021-08-16Plug 'par' memory leak in ↵Thomas Schwinge1-0/+2
'gcc/omp-oacc-neuter-broadcast.cc:execute_omp_oacc_neuter_broadcast' Fix-up for recent commit e2a58ed6dc5293602d0d168475109caa81ad0f0d "openacc: Middle-end worker-partitioning support". gcc/ * omp-oacc-neuter-broadcast.cc (execute_omp_oacc_neuter_broadcast): Plug 'par' memory leak.
2021-08-16Clarify memory management for 'prop_set' in 'gcc/omp-oacc-neuter-broadcast.cc'Thomas Schwinge1-5/+5
Clean-up for recent commit e2a58ed6dc5293602d0d168475109caa81ad0f0d "openacc: Middle-end worker-partitioning support". gcc/ * omp-oacc-neuter-broadcast.cc (execute_omp_oacc_neuter_broadcast): Clarify memory management for 'prop_set'.
2021-08-16Avoid 'GTY' use for 'gcc/omp-oacc-neuter-broadcast.cc:field_map'Thomas Schwinge1-22/+26
... and further simplify related things a bit. Fix-up/clean-up for recent commit e2a58ed6dc5293602d0d168475109caa81ad0f0d "openacc: Middle-end worker-partitioning support". gcc/ * omp-oacc-neuter-broadcast.cc (field_map): Move variable into... (execute_omp_oacc_neuter_broadcast): ... here. (install_var_field, build_receiver_ref, build_sender_ref): Take 'field_map_t *' parameter. Adjust all users. (worker_single_copy, neuter_worker_single): Take a 'record_field_map_t *' parameter. Adjust all users.
2021-08-16Fix ICE.liuhongt2-3/+10
gcc/ChangeLog: PR target/101930 * config/i386/i386.md (ldexp<mode>3): Force operands[1] to reg. gcc/testsuite/ChangeLog: PR target/101930 * gcc.target/i386/pr101930.c: New test.
2021-08-16ipa: make target_clone default decl local [PR101726]Martin Liska1-11/+14
PR ipa/101726 gcc/ChangeLog: * multiple_target.c (create_dispatcher_calls): Make default function local only if it is a definition.
2021-08-16ipa: ICF should check SSA_NAME_IS_DEFAULT_DEFMartin Liska2-0/+25
PR ipa/100600 gcc/ChangeLog: * ipa-icf-gimple.c (func_checker::compare_ssa_name): Do not consider equal SSA_NAMEs when one is a param. gcc/testsuite/ChangeLog: * gcc.dg/ipa/pr100600.c: New test.
2021-08-16Optimize __builtin_shuffle_vector.liuhongt7-5/+559
1. Support vpermw/vpermb in ix86_expand_vec_one_operand_perm_avx512. 2. Support 256/128-bits vpermi2b ix86_expand_vec_perm_vpermt2. 3. Add define_insn_and_split to optimize specific vector permutation to opmov{dw,wb,qd}. gcc/ChangeLog: PR target/101846 * config/i386/i386-expand.c (ix86_expand_vec_perm_vpermt2): Support vpermi2b for V32QI/V16QImode. (ix86_extract_perm_from_pool_constant): New function. (ix86_expand_vec_one_operand_perm_avx512): Support vpermw/vpermb under TARGET_AVX512BW/TARGET_AVX512VBMI. (expand_vec_perm_1): Adjust comments for upper. * config/i386/i386-protos.h (ix86_extract_perm_from_pool_constant): New declare. * config/i386/predicates.md (permvar_truncate_operand): New predicate. (pshufb_truncv4siv4hi_operand): Ditto. (pshufb_truncv8hiv8qi_operand): Ditto. * config/i386/sse.md (*avx512bw_permvar_truncv16siv16hi_1): New pre_reload define_insn_and_split. (*avx512f_permvar_truncv8siv8hi_1): Ditto. (*avx512f_vpermvar_truncv8div8si_1): Ditto. (*avx512f_permvar_truncv32hiv32qi_1): Ditto. (*avx512f_permvar_truncv16hiv16qi_1): Ditto. (*avx512f_permvar_truncv4div4si_1): Ditto. (*avx512f_pshufb_truncv8hiv8qi_1): Ditto. (*avx512f_pshufb_truncv4siv4hi_1): Ditto. (*avx512f_pshufd_truncv2div2si_1): Ditto. gcc/testsuite/ChangeLog: PR target/101846 * gcc.target/i386/pr101846-2.c: New test. * gcc.target/i386/pr101846-3.c: New test. * gcc.target/i386/pr101846-4.c: New test.
2021-08-16Fortran/OpenMP: Add support for OpenMP 5.1 masked constructTobias Burnus15-33/+647
Commit r12-2891-gd0befed793b94f3f407be44e6f69f81a02f5f073 added C/C++ support for the masked construct. This patch extends it to Fortran. gcc/fortran/ChangeLog: * dump-parse-tree.c (show_omp_clauses): Handle 'filter' clause. (show_omp_node, show_code_node): Handle (combined) omp masked construct. * frontend-passes.c (gfc_code_walker): Likewise. * gfortran.h (enum gfc_statement): Add ST_OMP_*_MASKED*. (enum gfc_exec_op): Add EXEC_OMP_*_MASKED*. * match.h (gfc_match_omp_masked, gfc_match_omp_masked_taskloop, gfc_match_omp_masked_taskloop_simd, gfc_match_omp_parallel_masked, gfc_match_omp_parallel_masked_taskloop, gfc_match_omp_parallel_masked_taskloop_simd): New prototypes. * openmp.c (enum omp_mask1): Add OMP_CLAUSE_FILTER. (gfc_match_omp_clauses): Match it. (OMP_MASKED_CLAUSES, gfc_match_omp_parallel_masked, gfc_match_omp_parallel_masked_taskloop, gfc_match_omp_parallel_masked_taskloop_simd, gfc_match_omp_masked, gfc_match_omp_masked_taskloop, gfc_match_omp_masked_taskloop_simd): New. (resolve_omp_clauses): Resolve filter clause. (gfc_resolve_omp_parallel_blocks, resolve_omp_do, omp_code_to_statement, gfc_resolve_omp_directive): Handle omp masked constructs. * parse.c (decode_omp_directive, case_exec_markers, gfc_ascii_statement, parse_omp_do, parse_omp_structured_block, parse_executable): Likewise. * resolve.c (gfc_resolve_blocks, gfc_resolve_code): Likewise. * st.c (gfc_free_statement): Likewise. * trans-openmp.c (gfc_trans_omp_clauses): Handle filter clause. (GFC_OMP_SPLIT_MASKED, GFC_OMP_MASK_MASKED): New enum values. (gfc_trans_omp_masked): New. (gfc_split_omp_clauses): Handle combined masked directives. (gfc_trans_omp_master_taskloop): Rename to ... (gfc_trans_omp_master_masked_taskloop): ... this; handle also combined masked directives. (gfc_trans_omp_parallel_master): Rename to ... (gfc_trans_omp_parallel_master_masked): ... this; handle combined masked directives. (gfc_trans_omp_directive): Handle EXEC_OMP_*_MASKED*. * trans.c (trans_code): Likewise. libgomp/ChangeLog: * testsuite/libgomp.fortran/masked-1.f90: New test. gcc/testsuite/ChangeLog: * gfortran.dg/gomp/masked-1.f90: New test. * gfortran.dg/gomp/masked-2.f90: New test. * gfortran.dg/gomp/masked-3.f90: New test. * gfortran.dg/gomp/masked-combined-1.f90: New test. * gfortran.dg/gomp/masked-combined-2.f90: New test.
2021-08-16RISC-V: Allow multi-lib build with different code modelKito Cheng2-30/+73
--with-multilib-generator was only support for different ISA/ABI combination, however code model is effect the code gen a lots it should able to handled in multilib mechanism. Adding `--cmodel=` option to `--with-multilib-generator` to generating multilib combination with different code model. E.g. --with-multilib-generator="rv64ima-lp64--;--cmodel=medlow,medany" will generate 3 multi-lib suppport: 1) rv64ima with lp64 2) rv64ima with lp64 and medlow code model 3) rv64ima with lp64 and medany code model gcc/ * config/riscv/multilib-generator: Support code model option for multi-lib. * doc/install.texi: Add document of new option for --with-multilib-generator.
2021-08-16Daily bump.GCC Administrator4-1/+33
2021-08-15Fortran: fix checks for STAT= and ERRMSG= arguments of SYNC ALL/SYNC IMAGESHarald Anlauf5-16/+70
gcc/fortran/ChangeLog: PR fortran/99351 * match.c (sync_statement): Replace %v code by %e in gfc_match to allow for function references as STAT and ERRMSG arguments. * resolve.c (resolve_sync): Adjust checks of STAT= and ERRMSG= to being definable arguments. Function references with a data pointer result are accepted. * trans-stmt.c (gfc_trans_sync): Adjust assertion. gcc/testsuite/ChangeLog: PR fortran/99351 * gfortran.dg/coarray_sync.f90: New test. * gfortran.dg/coarray_3.f90: Adjust error messages.
2021-08-15aix: 64 bit AIX TLS libpthread dependency.Clément Chigot1-1/+13
64bit XCOFF files will generated TLS access, with local-exec or global-exec models, by an access to R13. Thus, there isn't any reference to a TLS symbol. The problem is that it allows programs with TLS to be compiled and linked even without -pthread. Most of the time, it will result in a segfault when trying to access a TLS variable. But sometimes, it might create a memory corruption. This patch forces a reference to __tls_get_addr() to ensure link will fail without -pthread. gcc/ChangeLog: 2021-08-11 Clément Chigot <clement.chigot@atos.net> * config/rs6000/rs6000.c (xcoff_tls_exec_model_detected): New. (rs6000_legitimize_tls_address_aix): Use it. (rs6000_xcoff_file_end): Add ".ref __tls_get_addr" when xcoff_tls_exec_model_detected is true.
2021-08-15Improve many SImode shifts on the H8/300HJeff Law1-11/+41
As I've mentioned before, the H8/300H can only shift a single bit position at a time. Naturally this means many shifts are implemented as loops. There's a variety of special cases that we can do without loops by using rotates, sub-word moves, etc. The general guidance for the port has been to only use inline or special sequences if they're shorter or just one instruction longer than the loop. This was pretty reasonable guidance for QI/HI mode. It was relaxed a bit about 10 years ago for HImode in particular where the kpit team realized they could save 50-100 cycles for some shifts by allowing 2 instructions of code growth over the loop implementation. But they only re-tuned HImode shifts. There's even bigger benefits for re-tuning SImode shifts. There's cases where we can save close to 200 cycles by allowing 2 additional instructions. This patch re-tunes SImode shifts on the H8/300H primarily by inlining more often or using a special sequence + inlining for residuals. Both cases were already supported and this just uses those existing capabilities more often, so it was trivial to implement. I think there's some cases were entirely new special sequences could be used, but I haven't tried those yet. gcc/ * config/h8300/h8300.c (shift_alg_si): Retune H8/300H shifts to allow a bit more code growth, saving many dozens of cycles. (h8300_option_override): Adjus shift_alg_si if optimizing for code size. (get_shift_alg): Use special + inline shifts for residuals in more cases.
2021-08-14libgo: various fixes for Solaris supportIan Lance Taylor1-1/+1
Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/342189
2021-08-15Daily bump.GCC Administrator3-1/+39
2021-08-15or1k: Add mcmodel option to handle large GOTsStafford Horne5-3/+76
When building libgeos we get an error with: linux-uclibc/9.3.0/crtbeginS.o: in function `__do_global_dtors_aux': crtstuff.c:(.text+0x118): relocation truncated to fit: R_OR1K_GOT16 against symbol `__cxa_finalize' defined in .text section in /home/shorne/work/openrisc/3eb9f9d0f6d8274b2d19753c006bd83f7d536e3c/output/host/or1k-buildroot-linux-uclibc/sysroot/lib/libc.so. This is caused by GOT code having a limit of 64k. In OpenRISC this looks to be the only relocation code pattern to be limited to 64k. This patch allows specifying a new option -mcmodel=large which can be used to generate 2 more instructions to construct 32-bit addresses for up to 4G GOTs. gcc/ChangeLog: PR target/99783 * config/or1k/or1k-opts.h: New file. * config/or1k/or1k.c (or1k_legitimize_address_1, print_reloc): Support generating gotha relocations if -mcmodel=large is specified. * config/or1k/or1k.h (TARGET_CMODEL_SMALL, TARGET_CMODEL_LARGE): New macros. * config/or1k/or1k.opt (mcmodel=): New option. * doc/invoke.texi (OpenRISC Options): Document mcmodel.
2021-08-14Diagnose mismatches between array and scalar new and delete [PR101791].Martin Sebor5-6/+284
Resolves: PR middle-end/101791 - missing warning on a mismatch between scalar and array forms of new and delete gcc/ChangeLog: PR middle-end/101791 * gimple-ssa-warn-access.cc (new_delete_mismatch_p): Use new argument to valid_new_delete_pair_p. * tree.c (valid_new_delete_pair_p): Add argument. * tree.h (valid_new_delete_pair_p): Same. gcc/testsuite/ChangeLog: PR middle-end/101791 * g++.dg/warn/Wmismatched-new-delete-6.C: New test. * g++.dg/warn/Wmismatched-new-delete-7.C: New test.
2021-08-14i386: Fix ICE with V64QImode broadcast permutation with -mavx512f -mno-avx512bwJakub Jelinek2-1/+9
The testcase shows another problem, for TARGET_AVX512BW we have a single insn doing broadcast from the first element, but don't have one for broadcast of 2nd+ element (so for d->perm[0] we must return false), but for TARGET_AVX512F && !TARGET_AVX512BW we don't even have support for that other broadcast. V64QImode case was just added to the AVX2 cases which had gcc_assert (!TARGET_AVX2 || d->perm[0]); but for V64QImode we actually need gcc_assert (!TARGET_AVX512BW || d->perm[0]); 2021-08-14 Jakub Jelinek <jakub@redhat.com> PR target/101896 * config/i386/i386-expand.c (expand_vec_perm_broadcast_1) <case E_V64QImode>: For this mode assert !TARGET_AVX512BW || d->perm[0] rather than !TARGET_AVX2 || d->perm[0]. * gcc.target/i386/avx512f-pr101896.c: New test.
2021-08-14Daily bump.GCC Administrator3-1/+80
2021-08-13Fix xxeval predicates (PR 99921).Michael Meissner1-3/+3
I noticed that the xxeval built-in function used the altivec_register_operand predicate. Since it takes vsx registers, this might force the register allocate to issue a move when it could use a traditional floating point register. This patch fixes that. 2021-08-13 Michael Meissner <meissner@linux.ibm.com> gcc/ PR target/99921 * config/rs6000/altivec.md (xxeval): Use register_predicate instead of altivec_register_predicate.
2021-08-13Warn for reads from write-only arguments [PR101734].Martin Sebor2-9/+167
Resolves: PR middle-end/101734 - missing warning reading from a write-only object gcc/ChangeLog: PR middle-end/101734 * tree-ssa-uninit.c (maybe_warn_read_write_only): New function. (maybe_warn_operand): Call it. gcc/testsuite/ChangeLog: PR middle-end/101734 * gcc.dg/uninit-42.c: New test.
2021-08-13runtime: use C cast syntax in stack.cIan Lance Taylor1-1/+1
Didn't notice earlier because this code is only used on systems that do not support -fsplit-stack. Reviewed-on: https://go-review.googlesource.com/c/gofrontend/+/342051
2021-08-13ipa: "naked" attribute implies "noipa" attributeMartin Liska1-8/+3
PR ipa/101354 gcc/ChangeLog: * attribs.c (decl_attributes): Make naked functions "noipa" functions.
2021-08-13ipa: do not make localaliases for target_clones [PR101261]Martin Liska2-0/+13
PR ipa/101261 gcc/ChangeLog: * symtab.c (symtab_node::noninterposable_alias): Do not create local aliases for target_clone functions as the clonning pass rejects aliases. gcc/testsuite/ChangeLog: * gcc.target/i386/pr101261.c: New test.
2021-08-13opts: do not repeat a string in errorsMartin Liska1-30/+23
gcc/ChangeLog: * opts.c (LIVE_PATCHING_OPTION): Define. (control_options_for_live_patching): Use it in error messages.
generated by cgit v1.1 at 2025-08-05 15:54:14 +0000